git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF52259_CodeWarrior/cpu/mcf5xxx.c

   1 /*\r
   2  * File:    mcf5xxx.c\r
   3  * Purpose: Generic high-level routines for generic ColdFire processors\r
   4  *\r
   5  * Notes:       \r
   6  * \r
   7  * License:     All software covered by license agreement in -\r
   8  *              docs/Freescale_Software_License.pdf\r
   9  */\r
  10 \r
  11 #include "common.h"\r
  12 \r
  13 /********************************************************************/\r
  14 \r
  15 #define EXCEPTFMT  "%s -- PC = %#08X\n"\r
  16 \r
  17 /********************************************************************/\r
  18 /*\r
  19  * This is the exception handler for all defined exceptions.  Most\r
  20  * exceptions do nothing, but some of the more important ones are\r
  21  * handled to some extent.\r
  22  *\r
  23  * Called by asm_exception_handler \r
  24  */\r
  25 void \r
  26 mcf5xxx_exception_handler (void *framep) \r
  27 {\r
  28     switch (MCF5XXX_RD_SF_FORMAT(framep))\r
  29     {\r
  30         case 4:\r
  31         case 5:\r
  32         case 6:\r
  33         case 7:\r
  34             break;\r
  35         default:\r
  36             printf(EXCEPTFMT,"Illegal stack type", MCF5XXX_SF_PC(framep));\r
  37             break;\r
  38     }\r
  39 \r
  40     switch (MCF5XXX_RD_SF_VECTOR(framep))\r
  41     {\r
  42         case 2:\r
  43             printf(EXCEPTFMT, "Access Error", MCF5XXX_SF_PC(framep));\r
  44             switch (MCF5XXX_RD_SF_FS(framep))\r
  45             {\r
  46                 case 4:\r
  47                     printf("Error on instruction fetch\n");\r
  48                     break;\r
  49                 case 8:\r
  50                     printf("Error on operand write\n");\r
  51                     break;\r
  52                 case 9:\r
  53                     printf("Attempted write to write-protected space\n");\r
  54                     break;\r
  55                 case 12:\r
  56                     printf("Error on operand read\n");\r
  57                     break;\r
  58                 default:\r
  59                     printf("Reserved Fault Status Encoding\n");\r
  60                     break;\r
  61             }\r
  62             break;\r
  63         case 3:\r
  64             printf(EXCEPTFMT, "Address Error", MCF5XXX_SF_PC(framep));\r
  65             switch (MCF5XXX_RD_SF_FS(framep))\r
  66             {\r
  67                 case 4:\r
  68                     printf("Error on instruction fetch\n");\r
  69                     break;\r
  70                 case 8:\r
  71                     printf("Error on operand write\n");\r
  72                     break;\r
  73                 case 9:\r
  74                     printf("Attempted write to write-protected space\n");\r
  75                     break;\r
  76                 case 12:\r
  77                     printf("Error on operand read\n");\r
  78                     break;\r
  79                 default:\r
  80                     printf("Reserved Fault Status Encoding\n");\r
  81                     break;\r
  82             }\r
  83             break;\r
  84         case 4:\r
  85             printf(EXCEPTFMT, "Illegal instruction", MCF5XXX_SF_PC(framep));\r
  86             break;\r
  87         case 8:\r
  88             printf(EXCEPTFMT, "Privilege violation", MCF5XXX_SF_PC(framep));\r
  89             break;\r
  90         case 9:\r
  91             printf(EXCEPTFMT, "Trace Exception", MCF5XXX_SF_PC(framep));\r
  92             break;\r
  93         case 10:\r
  94             printf(EXCEPTFMT, "Unimplemented A-Line Instruction", \\r
  95                 MCF5XXX_SF_PC(framep));\r
  96             break;\r
  97         case 11:\r
  98             printf(EXCEPTFMT, "Unimplemented F-Line Instruction", \\r
  99                 MCF5XXX_SF_PC(framep));\r
 100             break;\r
 101         case 12:\r
 102             printf(EXCEPTFMT, "Debug Interrupt", MCF5XXX_SF_PC(framep));\r
 103             break;\r
 104         case 14:\r
 105             printf(EXCEPTFMT, "Format Error", MCF5XXX_SF_PC(framep));\r
 106             break;\r
 107         case 15:\r
 108             printf(EXCEPTFMT, "Unitialized Interrupt", MCF5XXX_SF_PC(framep));\r
 109             break;\r
 110         case 24:\r
 111             printf(EXCEPTFMT, "Spurious Interrupt", MCF5XXX_SF_PC(framep));\r
 112             break;\r
 113         case 25:\r
 114         case 26:\r
 115         case 27:\r
 116         case 28:\r
 117         case 29:\r
 118         case 30:\r
 119         case 31:\r
 120             printf("Autovector interrupt level %d\n",\r
 121                 MCF5XXX_RD_SF_VECTOR(framep) - 24);\r
 122             break;\r
 123         case 32:\r
 124         case 33:\r
 125         case 34:\r
 126         case 35:\r
 127         case 36:\r
 128         case 37:\r
 129         case 38:\r
 130         case 39:\r
 131         case 40:\r
 132         case 41:\r
 133         case 42:\r
 134         case 43:\r
 135         case 44:\r
 136         case 45:\r
 137         case 46:\r
 138         case 47:\r
 139             printf("TRAP #%d\n", MCF5XXX_RD_SF_VECTOR(framep) - 32);\r
 140             break;\r
 141         case 5:\r
 142         case 6:\r
 143         case 7:\r
 144         case 13:\r
 145         case 16:\r
 146         case 17:\r
 147         case 18:\r
 148         case 19:\r
 149         case 20:\r
 150         case 21:\r
 151         case 22:\r
 152         case 23:\r
 153         case 48:\r
 154         case 49:\r
 155         case 50:\r
 156         case 51:\r
 157         case 52:\r
 158         case 53:\r
 159         case 54:\r
 160         case 55:\r
 161         case 56:\r
 162         case 57:\r
 163         case 58:\r
 164         case 59:\r
 165         case 60:\r
 166         case 61:\r
 167         case 62:\r
 168         case 63:\r
 169             printf("Reserved: #%d\n", MCF5XXX_RD_SF_VECTOR(framep));\r
 170             break;\r
 171         default:\r
 172             cpu_handle_interrupt(MCF5XXX_RD_SF_VECTOR(framep));\r
 173             break;\r
 174     }\r
 175 }\r
 176 \r
 177 /********************************************************************/\r
 178 /*\r
 179  * Interpret the reset values of D0 and D1\r
 180  *\r
 181  * Parameters:\r
 182  *  d0  - the reset value of data register zero\r
 183  *  d1  - the reset value of data register one\r
 184  */\r
 185 void\r
 186 mcf5xxx_interpret_d0d1(int d0, int d1)\r
 187 {\r
 188 #ifdef DEBUG_PRINT\r
 189     printf("\nColdFire Core Configuration:\n");\r
 190     printf("----------------------------\n");\r
 191     printf("Processor Family       %#02x\n",MCF5XXX_D0_PF(d0));\r
 192     printf("ColdFire Core Version: %d\n",MCF5XXX_D0_VER(d0));\r
 193     printf("Processor Revision:    %d\n",MCF5XXX_D0_REV(d1));\r
 194     printf("Bus Width:             ");\r
 195     switch (MCF5XXX_D1_BUSW(d1))\r
 196     {\r
 197         case 0:\r
 198             printf("32-bit\n");\r
 199             break;\r
 200         default:\r
 201             printf("Reserved\n");\r
 202     }\r
 203     printf("ISA Version:           ");\r
 204     switch (MCF5XXX_D0_ISA(d0))\r
 205     {\r
 206         case 0:\r
 207             printf("A\n");\r
 208             break;\r
 209         case 1:\r
 210             printf("B\n");\r
 211             break;\r
 212         case 2:\r
 213             printf("C\n");\r
 214             break;\r
 215         case 8:\r
 216             printf("A+\n");\r
 217             break;\r
 218         default:\r
 219             printf("Reserved\n");\r
 220     }\r
 221     printf("Debug Version:         ");\r
 222     switch (MCF5XXX_D0_DEBUG(d0))\r
 223     {\r
 224         case 0:\r
 225             printf("A\n");\r
 226             break;\r
 227         case 1:\r
 228             printf("B\n");\r
 229             break;\r
 230         case 2:\r
 231             printf("C\n");\r
 232             break;\r
 233         case 3:\r
 234             printf("D\n");\r
 235             break;\r
 236         case 4:\r
 237             printf("E\n");\r
 238             break;\r
 239         case 9:\r
 240             printf("B+\n");\r
 241             break;\r
 242         default :\r
 243             printf("Reserved\n");\r
 244     }\r
 245     printf("MAC:                   %s\n", MCF5XXX_D0_MAC(d0) ? "Yes" : "No");\r
 246     printf("DIV:                   %s\n", MCF5XXX_D0_DIV(d0) ? "Yes" : "No");\r
 247     printf("EMAC:                  %s\n", MCF5XXX_D0_EMAC(d0) ? "Yes" : "No");\r
 248     printf("FPU:                   %s\n", MCF5XXX_D0_FPU(d0) ? "Yes" : "No");\r
 249     printf("MMU:                   %s\n", MCF5XXX_D0_MMU(d0) ? "Yes" : "No");\r
 250     printf("RAM Bank 0 Size:       ");\r
 251     switch (MCF5XXX_D1_RAM0SIZ(d1))\r
 252     {\r
 253         case 0:\r
 254         case 1:\r
 255         case 2:\r
 256         case 3:\r
 257             printf("None\n");\r
 258             break;\r
 259         case 4:\r
 260             printf("4KB\n");\r
 261             break;\r
 262         case 5:\r
 263             printf("8KB\n");\r
 264             break;\r
 265         case 6:\r
 266             printf("16KB\n");\r
 267             break;\r
 268         case 7:\r
 269             printf("32KB\n");\r
 270             break;\r
 271         case 8:\r
 272             printf("64KB\n");\r
 273             break;\r
 274         case 9:\r
 275             printf("128KB\n");\r
 276             break;\r
 277         case 10:\r
 278             printf("256KB\n");\r
 279             break;\r
 280         case 11:\r
 281             printf("512KB\n");\r
 282             break;\r
 283         default:\r
 284             printf("Reserved\n");\r
 285     }\r
 286     printf("RAM Bank 1 Size:       ");\r
 287     switch (MCF5XXX_D1_RAM1SIZ(d1))\r
 288     {\r
 289         case 0:\r
 290         case 1:\r
 291         case 2:\r
 292         case 3:\r
 293             printf("None\n");\r
 294             break;\r
 295         case 4:\r
 296             printf("4KB\n");\r
 297             break;\r
 298         case 5:\r
 299             printf("8KB\n");\r
 300             break;\r
 301         case 6:\r
 302             printf("16KB\n");\r
 303             break;\r
 304         case 7:\r
 305             printf("32KB\n");\r
 306             break;\r
 307         case 8:\r
 308             printf("64KB\n");\r
 309             break;\r
 310         case 9:\r
 311             printf("128KB\n");\r
 312             break;\r
 313         case 10:\r
 314             printf("256KB\n");\r
 315             break;\r
 316         case 11:\r
 317             printf("512KB\n");\r
 318             break;\r
 319         default:\r
 320             printf("Reserved\n");\r
 321     }\r
 322     printf("ROM Bank 0 Size:       ");\r
 323     switch (MCF5XXX_D1_ROM0SIZ(d1))\r
 324     {\r
 325         case 0:\r
 326         case 1:\r
 327         case 2:\r
 328         case 3:\r
 329             printf("None\n");\r
 330             break;\r
 331         case 4:\r
 332             printf("4KB\n");\r
 333             break;\r
 334         case 5:\r
 335             printf("8KB\n");\r
 336             break;\r
 337         case 6:\r
 338             printf("16KB\n");\r
 339             break;\r
 340         case 7:\r
 341             printf("32KB\n");\r
 342             break;\r
 343         case 8:\r
 344             printf("64KB\n");\r
 345             break;\r
 346         case 9:\r
 347             printf("128KB\n");\r
 348         default:\r
 349             printf("Reserved\n");\r
 350     }\r
 351     printf("ROM Bank 1 Size:       ");\r
 352     switch (MCF5XXX_D1_ROM1SIZ(d1))\r
 353     {\r
 354         case 0:\r
 355         case 1:\r
 356         case 2:\r
 357         case 3:\r
 358             printf("None\n");\r
 359             break;\r
 360         case 4:\r
 361             printf("4KB\n");\r
 362             break;\r
 363         case 5:\r
 364             printf("8KB\n");\r
 365             break;\r
 366         case 6:\r
 367             printf("16KB\n");\r
 368             break;\r
 369         case 7:\r
 370             printf("32KB\n");\r
 371             break;\r
 372         case 8:\r
 373             printf("64KB\n");\r
 374             break;\r
 375         case 9:\r
 376             printf("128KB\n");\r
 377         default:\r
 378             printf("Reserved\n");\r
 379     }\r
 380     printf("Cache Line Size:       ");\r
 381     switch (MCF5XXX_D1_CL(d1))\r
 382     {\r
 383         case 0:\r
 384             printf("16-byte\n");\r
 385             break;\r
 386         default:\r
 387             printf("Reserved\n");\r
 388     }\r
 389     printf("I-Cache Associativity: ");\r
 390     switch (MCF5XXX_D1_ICA(d1))\r
 391     {\r
 392         case 0:\r
 393             printf("Four-way\n");\r
 394             break;\r
 395         case 1:\r
 396             printf("Direct mapped\n");\r
 397             break;\r
 398         default:\r
 399             printf("Reserved\n");\r
 400     }\r
 401     printf("D-Cache Associativity: ");\r
 402     switch (MCF5XXX_D1_DCA(d1))\r
 403     {\r
 404         case 0:\r
 405             printf("Four-way\n");\r
 406             break;\r
 407         case 1:\r
 408             printf("Direct mapped\n");\r
 409             break;\r
 410         default:\r
 411             printf("Reserved\n");\r
 412     }\r
 413     printf("I-Cache Size:          ");\r
 414     switch (MCF5XXX_D1_ICSIZ(d1))\r
 415     {\r
 416         case 0:\r
 417             printf("None\n");\r
 418             break;\r
 419         case 1:\r
 420             printf("512B\n");\r
 421             break;\r
 422         case 2:\r
 423             printf("1KB\n"); \r
 424             break;\r
 425         case 3:\r
 426             printf("2KB\n");\r
 427             break;\r
 428         case 4:\r
 429             printf("4KB\n");\r
 430             break;\r
 431         case 5:\r
 432             printf("8KB\n");\r
 433             break;\r
 434         case 6:\r
 435             printf("16KB\n");\r
 436             break;\r
 437         case 7:\r
 438             printf("32KB\n");\r
 439             break;\r
 440         case 8:\r
 441             printf("64KB\n");\r
 442             break;\r
 443         default:\r
 444             printf("Reserved\n");\r
 445     }\r
 446     printf("D-Cache Size:          ");\r
 447     switch (MCF5XXX_D1_DCSIZ(d1))\r
 448     {\r
 449         case 0:\r
 450             printf("None\n");\r
 451             break;\r
 452         case 1:\r
 453             printf("512B\n");\r
 454             break;\r
 455         case 2:\r
 456             printf("1KB\n");\r
 457             break;\r
 458         case 3:\r
 459             printf("2KB\n");\r
 460             break;\r
 461         case 4:\r
 462             printf("4KB\n");\r
 463             break;\r
 464         case 5:\r
 465             printf("8KB\n");\r
 466             break;\r
 467         case 6:\r
 468             printf("16KB\n");\r
 469             break;\r
 470         case 7:\r
 471             printf("32KB\n");\r
 472             break;\r
 473         case 8:\r
 474             printf("64KB\n");\r
 475             break;\r
 476         default:\r
 477             printf("Reserved\n");\r
 478     }\r
 479     printf("\n");\r
 480 #else\r
 481         /* Remove compiler warnings. */\r
 482         ( void ) d0;\r
 483         ( void ) d1;\r
 484 #endif\r
 485 }\r
 486 \r
 487 /********************************************************************/\r
 488 void\r
 489 mcf5xxx_irq_enable (void)\r
 490 {\r
 491     asm_set_ipl(0);\r
 492 }\r
 493 /********************************************************************/\r
 494 void\r
 495 mcf5xxx_irq_disable (void)\r
 496 {\r
 497     asm_set_ipl(7);\r
 498 }\r
 499 /********************************************************************/\r
 500 /*\r
 501  * Write new interrupt vector handler into the vector table\r
 502  * Return previous handler address\r
 503  */ \r
 504 \r
 505 ADDRESS\r
 506 mcf5xxx_set_handler (int vector, ADDRESS new_handler)\r
 507 {\r
 508     ADDRESS old_handler;\r
 509     extern uint32 __VECTOR_RAM[];\r
 510 \r
 511     old_handler = (ADDRESS) __VECTOR_RAM[vector];\r
 512     __VECTOR_RAM[vector] = (uint32)new_handler;\r
 513     return old_handler;\r
 514 }\r
 515 \r
 516 /********************************************************************/\r