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1 /*\r
2         FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
7         it under the terms of the GNU General Public License as published by\r
8         the Free Software Foundation; either version 2 of the License, or\r
9         (at your option) any later version.\r
10 \r
11         FreeRTOS.org is distributed in the hope that it will be useful,\r
12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14         GNU General Public License for more details.\r
15 \r
16         You should have received a copy of the GNU General Public License\r
17         along with FreeRTOS.org; if not, write to the Free Software\r
18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19 \r
20         A special exception to the GPL can be applied should you wish to distribute\r
21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
22         the source code for any proprietary components.  See the licensing section\r
23         of http://www.FreeRTOS.org for full details of how and when the exception\r
24         can be applied.\r
25 \r
26     ***************************************************************************\r
27     ***************************************************************************\r
28     *                                                                         *\r
29     * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
30         *                                                                         *\r
31         * This is a concise, step by step, 'hands on' guide that describes both   *\r
32         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
33         * explains numerous examples that are written using the FreeRTOS API.     *\r
34         * Full source code for all the examples is provided in an accompanying    *\r
35         * .zip file.                                                              *\r
36     *                                                                         *\r
37     ***************************************************************************\r
38     ***************************************************************************\r
39 \r
40         Please ensure to read the configuration and relevant port sections of the\r
41         online documentation.\r
42 \r
43         http://www.FreeRTOS.org - Documentation, latest information, license and\r
44         contact details.\r
45 \r
46         http://www.SafeRTOS.com - A version that is certified for use in safety\r
47         critical systems.\r
48 \r
49         http://www.OpenRTOS.com - Commercial support, development, porting,\r
50         licensing and training services.\r
51 */\r
52 \r
53 \r
54 /*\r
55  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
56  * documentation provides more details of the standard demo application tasks.\r
57  * In addition to the standard demo tasks, the following tasks and tests are\r
58  * defined and/or created within this file:\r
59  *\r
60  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
61  * simply generates a page that shows the current state of all the tasks within\r
62  * the system, including the high water mark of each task stack. The high water\r
63  * mark is displayed as the amount of stack that has never been used, so the\r
64  * closer the value is to zero the closer the task has come to overflowing its\r
65  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
66  *\r
67  * "Check" task -  This only executes every five seconds but has a high priority\r
68  * to ensure it gets processor time.  Its main function is to check that all the\r
69  * standard demo tasks are still operational.  While no errors have been\r
70  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
71  * rate increasing to 500ms being a visual indication that at least one task has\r
72  * reported unexpected behaviour.\r
73  *\r
74  * "Reg test" tasks - These fill the registers with known values, then check\r
75  * that each register still contains its expected value.  Each task uses\r
76  * different values.  The tasks run with very low priority so get preempted very\r
77  * frequently.  A register containing an unexpected value is indicative of an\r
78  * error in the context switching mechanism.\r
79  *\r
80  */\r
81 \r
82 /* Standard includes. */\r
83 #include <stdio.h>\r
84 \r
85 /* Scheduler includes. */\r
86 #include "FreeRTOS.h"\r
87 #include "task.h"\r
88 #include "queue.h"\r
89 #include "semphr.h"\r
90 \r
91 /* Demo app includes. */\r
92 #include "BlockQ.h"\r
93 #include "death.h"\r
94 #include "flash.h"\r
95 #include "partest.h"\r
96 #include "semtest.h"\r
97 #include "PollQ.h"\r
98 #include "GenQTest.h"\r
99 #include "QPeek.h"\r
100 #include "recmutex.h"\r
101 \r
102 /*-----------------------------------------------------------*/\r
103 \r
104 /* The time between cycles of the 'check' functionality - as described at the\r
105 top of this file. */\r
106 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
107 \r
108 /* The rate at which the LED controlled by the 'check' task will flash should an\r
109 error have been detected. */\r
110 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
111 \r
112 /* The LED controlled by the 'check' task. */\r
113 #define mainCHECK_LED                                           ( 3 )\r
114 \r
115 /* ComTest constants - there is no free LED for the comtest tasks. */\r
116 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
117 #define mainCOM_TEST_LED                                        ( 5 )\r
118 \r
119 /* Task priorities. */\r
120 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
121 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
122 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
123 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
124 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
125 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
126 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
127 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
128 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
129 \r
130 /*\r
131  * Configure the hardware for the demo.\r
132  */\r
133 static void prvSetupHardware( void );\r
134 \r
135 /*\r
136  * Implements the 'check' task functionality as described at the top of this\r
137  * file.\r
138  */\r
139 static void prvCheckTask( void *pvParameters );\r
140 \r
141 /*\r
142  * Implement the 'Reg test' functionality as described at the top of this file.\r
143  */\r
144 static void vRegTest1Task( void *pvParameters );\r
145 static void vRegTest2Task( void *pvParameters );\r
146 \r
147 /*-----------------------------------------------------------*/\r
148 \r
149 /* Counters used to detect errors within the reg test tasks. */\r
150 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
151 \r
152 /*-----------------------------------------------------------*/\r
153 \r
154 int main( void )\r
155 {\r
156 extern void vBasicWEBServer( void *pv );\r
157 \r
158         /* Setup the hardware ready for this demo. */\r
159         prvSetupHardware();\r
160         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
161 \r
162         /* Start the standard demo tasks. */\r
163         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
164         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
165         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
166         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
167         vStartQueuePeekTasks();\r
168         vStartRecursiveMutexTasks();\r
169         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
170 \r
171         /* Start the reg test tasks - defined in this file. */\r
172         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
173         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
174 \r
175         /* Create the check task. */\r
176         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
177 \r
178         /* The suicide tasks must be created last as they need to know how many\r
179         tasks were running prior to their creation in order to ascertain whether\r
180         or not the correct/expected number of tasks are running at any given time. */\r
181     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
182 \r
183         /* Start the scheduler. */\r
184         vTaskStartScheduler();\r
185 \r
186     /* Will only get here if there was insufficient memory to create the idle\r
187     task. */\r
188         for( ;; )\r
189         {\r
190         }\r
191 }\r
192 /*-----------------------------------------------------------*/\r
193 \r
194 static void prvCheckTask( void *pvParameters )\r
195 {\r
196 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
197 portTickType xLastExecutionTime;\r
198 \r
199         ( void ) pvParameters;\r
200 \r
201         /* Initialise the variable used to control our iteration rate prior to\r
202         its first use. */\r
203         xLastExecutionTime = xTaskGetTickCount();\r
204 \r
205         for( ;; )\r
206         {\r
207                 /* Wait until it is time to run the tests again. */\r
208                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
209 \r
210                 /* Has an error been found in any task? */\r
211                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
212                 {\r
213                         ulError |= 0x01UL;\r
214                 }\r
215 \r
216                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
217                 {\r
218                         ulError |= 0x02UL;\r
219                 }\r
220 \r
221                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
222                 {\r
223                         ulError |= 0x04UL;\r
224                 }\r
225 \r
226                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
227             {\r
228                 ulError |= 0x20UL;\r
229             }\r
230 \r
231                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
232             {\r
233                 ulError |= 0x40UL;\r
234             }\r
235 \r
236                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
237             {\r
238                 ulError |= 0x80UL;\r
239             }\r
240 \r
241                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
242             {\r
243                 ulError |= 0x200UL;\r
244             }\r
245 \r
246                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
247                 {\r
248                         ulError |= 0x1000UL;\r
249                 }\r
250 \r
251                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
252                 {\r
253                         ulError |= 0x1000UL;\r
254                 }\r
255 \r
256                 ulLastRegTest1Count = ulRegTest1Counter;\r
257                 ulLastRegTest2Count = ulRegTest2Counter;\r
258 \r
259                 /* If an error has been found then increase our cycle rate, and in so\r
260                 going increase the rate at which the check task LED toggles. */\r
261                 if( ulError != 0 )\r
262                 {\r
263                 ulTicksToWait = mainERROR_PERIOD;\r
264                 }\r
265 \r
266                 /* Toggle the LED each itteration. */\r
267                 vParTestToggleLED( mainCHECK_LED );\r
268         }\r
269 }\r
270 /*-----------------------------------------------------------*/\r
271 \r
272 void prvSetupHardware( void )\r
273 {\r
274         portDISABLE_INTERRUPTS();\r
275 \r
276         /* Setup the port used to toggle LEDs. */\r
277         vParTestInitialise();\r
278 }\r
279 /*-----------------------------------------------------------*/\r
280 \r
281 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
282 {\r
283         /* This will get called if a stack overflow is detected during the context\r
284         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
285         problems within nested interrupts, but only do this for debug purposes as\r
286         it will increase the context switch time. */\r
287 \r
288         ( void ) pxTask;\r
289         ( void ) pcTaskName;\r
290 \r
291         for( ;; )\r
292         {\r
293         }\r
294 }\r
295 /*-----------------------------------------------------------*/\r
296 \r
297 static void vRegTest1Task( void *pvParameters )\r
298 {\r
299         /* Sanity check - did we receive the parameter expected? */\r
300         if( pvParameters != &ulRegTest1Counter )\r
301         {\r
302                 /* Change here so the check task can detect that an error occurred. */\r
303                 for( ;; )\r
304                 {\r
305                 }\r
306         }\r
307 \r
308         /* Set all the registers to known values, then check that each retains its\r
309         expected value - as described at the top of this file.  If an error is\r
310         found then the loop counter will no longer be incremented allowing the check\r
311         task to recognise the error. */\r
312         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
313                                                 "       moveq           #1, d0                                  \n\t"\r
314                                                 "       moveq           #2, d1                                  \n\t"\r
315                                                 "       moveq           #3, d2                                  \n\t"\r
316                                                 "       moveq           #4, d3                                  \n\t"\r
317                                                 "       moveq           #5, d4                                  \n\t"\r
318                                                 "       moveq           #6, d5                                  \n\t"\r
319                                                 "       moveq           #7, d6                                  \n\t"\r
320                                                 "       moveq           #8, d7                                  \n\t"\r
321                                                 "       move            #9, a0                                  \n\t"\r
322                                                 "       move            #10, a1                                 \n\t"\r
323                                                 "       move            #11, a2                                 \n\t"\r
324                                                 "       move            #12, a3                                 \n\t"\r
325                                                 "       move            #13, a4                                 \n\t"\r
326                                                 "       move            #14, a5                                 \n\t"\r
327                                                 "       move            #15, a6                                 \n\t"\r
328                                                 "                                                                               \n\t"\r
329                                                 "       cmpi.l          #1, d0                                  \n\t"\r
330                                                 "       bne                     reg_test_1_error                \n\t"\r
331                                                 "       cmpi.l          #2, d1                                  \n\t"\r
332                                                 "       bne                     reg_test_1_error                \n\t"\r
333                                                 "       cmpi.l          #3, d2                                  \n\t"\r
334                                                 "       bne                     reg_test_1_error                \n\t"\r
335                                                 "       cmpi.l          #4, d3                                  \n\t"\r
336                                                 "       bne                     reg_test_1_error                \n\t"\r
337                                                 "       cmpi.l          #5, d4                                  \n\t"\r
338                                                 "       bne                     reg_test_1_error                \n\t"\r
339                                                 "       cmpi.l          #6, d5                                  \n\t"\r
340                                                 "       bne                     reg_test_1_error                \n\t"\r
341                                                 "       cmpi.l          #7, d6                                  \n\t"\r
342                                                 "       bne                     reg_test_1_error                \n\t"\r
343                                                 "       cmpi.l          #8, d7                                  \n\t"\r
344                                                 "       bne                     reg_test_1_error                \n\t"\r
345                                                 "       move            a0, d0                                  \n\t"\r
346                                                 "       cmpi.l          #9, d0                                  \n\t"\r
347                                                 "       bne                     reg_test_1_error                \n\t"\r
348                                                 "       move            a1, d0                                  \n\t"\r
349                                                 "       cmpi.l          #10, d0                                 \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       move            a2, d0                                  \n\t"\r
352                                                 "       cmpi.l          #11, d0                                 \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       move            a3, d0                                  \n\t"\r
355                                                 "       cmpi.l          #12, d0                                 \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       move            a4, d0                                  \n\t"\r
358                                                 "       cmpi.l          #13, d0                                 \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       move            a5, d0                                  \n\t"\r
361                                                 "       cmpi.l          #14, d0                                 \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       move            a6, d0                                  \n\t"\r
364                                                 "       cmpi.l          #15, d0                                 \n\t"\r
365                                                 "       bne                     reg_test_1_error                \n\t"\r
366                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
367                                                 "       addq            #1, d0                                  \n\t"\r
368                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
369                                                 "       bra                     reg_test_1_start                \n\t"\r
370                                                 "reg_test_1_error:                                              \n\t"\r
371                                                 "       bra                     reg_test_1_error                \n\t"\r
372                                         );\r
373 }\r
374 /*-----------------------------------------------------------*/\r
375 \r
376 static void vRegTest2Task( void *pvParameters )\r
377 {\r
378         /* Sanity check - did we receive the parameter expected? */\r
379         if( pvParameters != &ulRegTest2Counter )\r
380         {\r
381                 /* Change here so the check task can detect that an error occurred. */\r
382                 for( ;; )\r
383                 {\r
384                 }\r
385         }\r
386 \r
387         /* Set all the registers to known values, then check that each retains its\r
388         expected value - as described at the top of this file.  If an error is\r
389         found then the loop counter will no longer be incremented allowing the check\r
390         task to recognise the error. */\r
391         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
392                                                 "       moveq           #10, d0                                 \n\t"\r
393                                                 "       moveq           #20, d1                                 \n\t"\r
394                                                 "       moveq           #30, d2                                 \n\t"\r
395                                                 "       moveq           #40, d3                                 \n\t"\r
396                                                 "       moveq           #50, d4                                 \n\t"\r
397                                                 "       moveq           #60, d5                                 \n\t"\r
398                                                 "       moveq           #70, d6                                 \n\t"\r
399                                                 "       moveq           #80, d7                                 \n\t"\r
400                                                 "       move            #90, a0                                 \n\t"\r
401                                                 "       move            #100, a1                                \n\t"\r
402                                                 "       move            #110, a2                                \n\t"\r
403                                                 "       move            #120, a3                                \n\t"\r
404                                                 "       move            #130, a4                                \n\t"\r
405                                                 "       move            #140, a5                                \n\t"\r
406                                                 "       move            #150, a6                                \n\t"\r
407                                                 "                                                                               \n\t"\r
408                                                 "       cmpi.l          #10, d0                                 \n\t"\r
409                                                 "       bne                     reg_test_2_error                \n\t"\r
410                                                 "       cmpi.l          #20, d1                                 \n\t"\r
411                                                 "       bne                     reg_test_2_error                \n\t"\r
412                                                 "       cmpi.l          #30, d2                                 \n\t"\r
413                                                 "       bne                     reg_test_2_error                \n\t"\r
414                                                 "       cmpi.l          #40, d3                                 \n\t"\r
415                                                 "       bne                     reg_test_2_error                \n\t"\r
416                                                 "       cmpi.l          #50, d4                                 \n\t"\r
417                                                 "       bne                     reg_test_2_error                \n\t"\r
418                                                 "       cmpi.l          #60, d5                                 \n\t"\r
419                                                 "       bne                     reg_test_2_error                \n\t"\r
420                                                 "       cmpi.l          #70, d6                                 \n\t"\r
421                                                 "       bne                     reg_test_2_error                \n\t"\r
422                                                 "       cmpi.l          #80, d7                                 \n\t"\r
423                                                 "       bne                     reg_test_2_error                \n\t"\r
424                                                 "       move            a0, d0                                  \n\t"\r
425                                                 "       cmpi.l          #90, d0                                 \n\t"\r
426                                                 "       bne                     reg_test_2_error                \n\t"\r
427                                                 "       move            a1, d0                                  \n\t"\r
428                                                 "       cmpi.l          #100, d0                                \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       move            a2, d0                                  \n\t"\r
431                                                 "       cmpi.l          #110, d0                                \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       move            a3, d0                                  \n\t"\r
434                                                 "       cmpi.l          #120, d0                                \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       move            a4, d0                                  \n\t"\r
437                                                 "       cmpi.l          #130, d0                                \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       move            a5, d0                                  \n\t"\r
440                                                 "       cmpi.l          #140, d0                                \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       move            a6, d0                                  \n\t"\r
443                                                 "       cmpi.l          #150, d0                                \n\t"\r
444                                                 "       bne                     reg_test_2_error                \n\t"\r
445                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
446                                                 "       addq            #1, d0                                  \n\t"\r
447                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
448                                                 "       bra                     reg_test_2_start                \n\t"\r
449                                                 "reg_test_2_error:                                              \n\t"\r
450                                                 "       bra                     reg_test_2_error                \n\t"\r
451                                         );\r
452 }\r
453 /*-----------------------------------------------------------*/\r
454 \r
455 \r
456 \r