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1 /*\r
2         FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify it \r
7         under the terms of the GNU General Public License (version 2) as published\r
8         by the Free Software Foundation and modified by the FreeRTOS exception.\r
9 \r
10         FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
11         ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or \r
12         FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for \r
13         more details.\r
14 \r
15         You should have received a copy of the GNU General Public License along \r
16         with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59 \r
17         Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
18 \r
19         A special exception to the GPL is included to allow you to distribute a \r
20         combined work that includes FreeRTOS.org without being obliged to provide\r
21         the source code for any proprietary components.  See the licensing section\r
22         of http://www.FreeRTOS.org for full details.\r
23 \r
24 \r
25         ***************************************************************************\r
26         *                                                                         *\r
27         * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
28         *                                                                         *\r
29         * This is a concise, step by step, 'hands on' guide that describes both   *\r
30         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
31         * explains numerous examples that are written using the FreeRTOS API.     *\r
32         * Full source code for all the examples is provided in an accompanying    *\r
33         * .zip file.                                                              *\r
34         *                                                                         *\r
35         ***************************************************************************\r
36 \r
37         1 tab == 4 spaces!\r
38 \r
39         Please ensure to read the configuration and relevant port sections of the\r
40         online documentation.\r
41 \r
42         http://www.FreeRTOS.org - Documentation, latest information, license and\r
43         contact details.\r
44 \r
45         http://www.SafeRTOS.com - A version that is certified for use in safety\r
46         critical systems.\r
47 \r
48         http://www.OpenRTOS.com - Commercial support, development, porting,\r
49         licensing and training services.\r
50 */\r
51 \r
52 \r
53 /*\r
54  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
55  * documentation provides more details of the standard demo application tasks.\r
56  * In addition to the standard demo tasks, the following tasks and tests are\r
57  * defined and/or created within this file:\r
58  *\r
59  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
60  * simply generates a page that shows the current state of all the tasks within\r
61  * the system, including the high water mark of each task stack. The high water\r
62  * mark is displayed as the amount of stack that has never been used, so the\r
63  * closer the value is to zero the closer the task has come to overflowing its\r
64  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
65  *\r
66  * "Check" task -  This only executes every five seconds but has a high priority\r
67  * to ensure it gets processor time.  Its main function is to check that all the\r
68  * standard demo tasks are still operational.  While no errors have been\r
69  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
70  * rate increasing to 500ms being a visual indication that at least one task has\r
71  * reported unexpected behaviour.\r
72  *\r
73  * "Reg test" tasks - These fill the registers with known values, then check\r
74  * that each register still contains its expected value.  Each task uses\r
75  * different values.  The tasks run with very low priority so get preempted very\r
76  * frequently.  A register containing an unexpected value is indicative of an\r
77  * error in the context switching mechanism.\r
78  *\r
79  */\r
80 \r
81 /* Standard includes. */\r
82 #include <stdio.h>\r
83 \r
84 /* Scheduler includes. */\r
85 #include "FreeRTOS.h"\r
86 #include "task.h"\r
87 #include "queue.h"\r
88 #include "semphr.h"\r
89 \r
90 /* Demo app includes. */\r
91 #include "BlockQ.h"\r
92 #include "death.h"\r
93 #include "flash.h"\r
94 #include "partest.h"\r
95 #include "semtest.h"\r
96 #include "PollQ.h"\r
97 #include "GenQTest.h"\r
98 #include "QPeek.h"\r
99 #include "recmutex.h"\r
100 \r
101 /*-----------------------------------------------------------*/\r
102 \r
103 /* The time between cycles of the 'check' functionality - as described at the\r
104 top of this file. */\r
105 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
106 \r
107 /* The rate at which the LED controlled by the 'check' task will flash should an\r
108 error have been detected. */\r
109 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
110 \r
111 /* The LED controlled by the 'check' task. */\r
112 #define mainCHECK_LED                                           ( 3 )\r
113 \r
114 /* ComTest constants - there is no free LED for the comtest tasks. */\r
115 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
116 #define mainCOM_TEST_LED                                        ( 5 )\r
117 \r
118 /* Task priorities. */\r
119 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
120 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
121 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
122 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
123 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
124 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
125 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
126 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
127 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
128 \r
129 /*\r
130  * Configure the hardware for the demo.\r
131  */\r
132 static void prvSetupHardware( void );\r
133 \r
134 /*\r
135  * Implements the 'check' task functionality as described at the top of this\r
136  * file.\r
137  */\r
138 static void prvCheckTask( void *pvParameters );\r
139 \r
140 /*\r
141  * Implement the 'Reg test' functionality as described at the top of this file.\r
142  */\r
143 static void vRegTest1Task( void *pvParameters );\r
144 static void vRegTest2Task( void *pvParameters );\r
145 \r
146 /*-----------------------------------------------------------*/\r
147 \r
148 /* Counters used to detect errors within the reg test tasks. */\r
149 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
150 \r
151 /*-----------------------------------------------------------*/\r
152 \r
153 int main( void )\r
154 {\r
155 extern void vBasicWEBServer( void *pv );\r
156 \r
157         /* Setup the hardware ready for this demo. */\r
158         prvSetupHardware();\r
159         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
160 \r
161         /* Start the standard demo tasks. */\r
162         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
163         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
164         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
165         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
166         vStartQueuePeekTasks();\r
167         vStartRecursiveMutexTasks();\r
168         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
169 \r
170         /* Start the reg test tasks - defined in this file. */\r
171         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
172         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
173 \r
174         /* Create the check task. */\r
175         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
176 \r
177         /* The suicide tasks must be created last as they need to know how many\r
178         tasks were running prior to their creation in order to ascertain whether\r
179         or not the correct/expected number of tasks are running at any given time. */\r
180     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
181 \r
182         /* Start the scheduler. */\r
183         vTaskStartScheduler();\r
184 \r
185     /* Will only get here if there was insufficient memory to create the idle\r
186     task. */\r
187         for( ;; )\r
188         {\r
189         }\r
190 }\r
191 /*-----------------------------------------------------------*/\r
192 \r
193 static void prvCheckTask( void *pvParameters )\r
194 {\r
195 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
196 portTickType xLastExecutionTime;\r
197 \r
198         ( void ) pvParameters;\r
199 \r
200         /* Initialise the variable used to control our iteration rate prior to\r
201         its first use. */\r
202         xLastExecutionTime = xTaskGetTickCount();\r
203 \r
204         for( ;; )\r
205         {\r
206                 /* Wait until it is time to run the tests again. */\r
207                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
208 \r
209                 /* Has an error been found in any task? */\r
210                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
211                 {\r
212                         ulError |= 0x01UL;\r
213                 }\r
214 \r
215                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
216                 {\r
217                         ulError |= 0x02UL;\r
218                 }\r
219 \r
220                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
221                 {\r
222                         ulError |= 0x04UL;\r
223                 }\r
224 \r
225                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
226             {\r
227                 ulError |= 0x20UL;\r
228             }\r
229 \r
230                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
231             {\r
232                 ulError |= 0x40UL;\r
233             }\r
234 \r
235                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
236             {\r
237                 ulError |= 0x80UL;\r
238             }\r
239 \r
240                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
241             {\r
242                 ulError |= 0x200UL;\r
243             }\r
244 \r
245                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
246                 {\r
247                         ulError |= 0x1000UL;\r
248                 }\r
249 \r
250                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
251                 {\r
252                         ulError |= 0x1000UL;\r
253                 }\r
254 \r
255                 ulLastRegTest1Count = ulRegTest1Counter;\r
256                 ulLastRegTest2Count = ulRegTest2Counter;\r
257 \r
258                 /* If an error has been found then increase our cycle rate, and in so\r
259                 going increase the rate at which the check task LED toggles. */\r
260                 if( ulError != 0 )\r
261                 {\r
262                 ulTicksToWait = mainERROR_PERIOD;\r
263                 }\r
264 \r
265                 /* Toggle the LED each itteration. */\r
266                 vParTestToggleLED( mainCHECK_LED );\r
267         }\r
268 }\r
269 /*-----------------------------------------------------------*/\r
270 \r
271 void prvSetupHardware( void )\r
272 {\r
273         portDISABLE_INTERRUPTS();\r
274 \r
275         /* Setup the port used to toggle LEDs. */\r
276         vParTestInitialise();\r
277 }\r
278 /*-----------------------------------------------------------*/\r
279 \r
280 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
281 {\r
282         /* This will get called if a stack overflow is detected during the context\r
283         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
284         problems within nested interrupts, but only do this for debug purposes as\r
285         it will increase the context switch time. */\r
286 \r
287         ( void ) pxTask;\r
288         ( void ) pcTaskName;\r
289 \r
290         for( ;; )\r
291         {\r
292         }\r
293 }\r
294 /*-----------------------------------------------------------*/\r
295 \r
296 static void vRegTest1Task( void *pvParameters )\r
297 {\r
298         /* Sanity check - did we receive the parameter expected? */\r
299         if( pvParameters != &ulRegTest1Counter )\r
300         {\r
301                 /* Change here so the check task can detect that an error occurred. */\r
302                 for( ;; )\r
303                 {\r
304                 }\r
305         }\r
306 \r
307         /* Set all the registers to known values, then check that each retains its\r
308         expected value - as described at the top of this file.  If an error is\r
309         found then the loop counter will no longer be incremented allowing the check\r
310         task to recognise the error. */\r
311         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
312                                                 "       moveq           #1, d0                                  \n\t"\r
313                                                 "       moveq           #2, d1                                  \n\t"\r
314                                                 "       moveq           #3, d2                                  \n\t"\r
315                                                 "       moveq           #4, d3                                  \n\t"\r
316                                                 "       moveq           #5, d4                                  \n\t"\r
317                                                 "       moveq           #6, d5                                  \n\t"\r
318                                                 "       moveq           #7, d6                                  \n\t"\r
319                                                 "       moveq           #8, d7                                  \n\t"\r
320                                                 "       move            #9, a0                                  \n\t"\r
321                                                 "       move            #10, a1                                 \n\t"\r
322                                                 "       move            #11, a2                                 \n\t"\r
323                                                 "       move            #12, a3                                 \n\t"\r
324                                                 "       move            #13, a4                                 \n\t"\r
325                                                 "       move            #14, a5                                 \n\t"\r
326                                                 "       move            #15, a6                                 \n\t"\r
327                                                 "                                                                               \n\t"\r
328                                                 "       cmpi.l          #1, d0                                  \n\t"\r
329                                                 "       bne                     reg_test_1_error                \n\t"\r
330                                                 "       cmpi.l          #2, d1                                  \n\t"\r
331                                                 "       bne                     reg_test_1_error                \n\t"\r
332                                                 "       cmpi.l          #3, d2                                  \n\t"\r
333                                                 "       bne                     reg_test_1_error                \n\t"\r
334                                                 "       cmpi.l          #4, d3                                  \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       cmpi.l          #5, d4                                  \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       cmpi.l          #6, d5                                  \n\t"\r
339                                                 "       bne                     reg_test_1_error                \n\t"\r
340                                                 "       cmpi.l          #7, d6                                  \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       cmpi.l          #8, d7                                  \n\t"\r
343                                                 "       bne                     reg_test_1_error                \n\t"\r
344                                                 "       move            a0, d0                                  \n\t"\r
345                                                 "       cmpi.l          #9, d0                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       move            a1, d0                                  \n\t"\r
348                                                 "       cmpi.l          #10, d0                                 \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       move            a2, d0                                  \n\t"\r
351                                                 "       cmpi.l          #11, d0                                 \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       move            a3, d0                                  \n\t"\r
354                                                 "       cmpi.l          #12, d0                                 \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       move            a4, d0                                  \n\t"\r
357                                                 "       cmpi.l          #13, d0                                 \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       move            a5, d0                                  \n\t"\r
360                                                 "       cmpi.l          #14, d0                                 \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       move            a6, d0                                  \n\t"\r
363                                                 "       cmpi.l          #15, d0                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
366                                                 "       addq            #1, d0                                  \n\t"\r
367                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
368                                                 "       bra                     reg_test_1_start                \n\t"\r
369                                                 "reg_test_1_error:                                              \n\t"\r
370                                                 "       bra                     reg_test_1_error                \n\t"\r
371                                         );\r
372 }\r
373 /*-----------------------------------------------------------*/\r
374 \r
375 static void vRegTest2Task( void *pvParameters )\r
376 {\r
377         /* Sanity check - did we receive the parameter expected? */\r
378         if( pvParameters != &ulRegTest2Counter )\r
379         {\r
380                 /* Change here so the check task can detect that an error occurred. */\r
381                 for( ;; )\r
382                 {\r
383                 }\r
384         }\r
385 \r
386         /* Set all the registers to known values, then check that each retains its\r
387         expected value - as described at the top of this file.  If an error is\r
388         found then the loop counter will no longer be incremented allowing the check\r
389         task to recognise the error. */\r
390         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
391                                                 "       moveq           #10, d0                                 \n\t"\r
392                                                 "       moveq           #20, d1                                 \n\t"\r
393                                                 "       moveq           #30, d2                                 \n\t"\r
394                                                 "       moveq           #40, d3                                 \n\t"\r
395                                                 "       moveq           #50, d4                                 \n\t"\r
396                                                 "       moveq           #60, d5                                 \n\t"\r
397                                                 "       moveq           #70, d6                                 \n\t"\r
398                                                 "       moveq           #80, d7                                 \n\t"\r
399                                                 "       move            #90, a0                                 \n\t"\r
400                                                 "       move            #100, a1                                \n\t"\r
401                                                 "       move            #110, a2                                \n\t"\r
402                                                 "       move            #120, a3                                \n\t"\r
403                                                 "       move            #130, a4                                \n\t"\r
404                                                 "       move            #140, a5                                \n\t"\r
405                                                 "       move            #150, a6                                \n\t"\r
406                                                 "                                                                               \n\t"\r
407                                                 "       cmpi.l          #10, d0                                 \n\t"\r
408                                                 "       bne                     reg_test_2_error                \n\t"\r
409                                                 "       cmpi.l          #20, d1                                 \n\t"\r
410                                                 "       bne                     reg_test_2_error                \n\t"\r
411                                                 "       cmpi.l          #30, d2                                 \n\t"\r
412                                                 "       bne                     reg_test_2_error                \n\t"\r
413                                                 "       cmpi.l          #40, d3                                 \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       cmpi.l          #50, d4                                 \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       cmpi.l          #60, d5                                 \n\t"\r
418                                                 "       bne                     reg_test_2_error                \n\t"\r
419                                                 "       cmpi.l          #70, d6                                 \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       cmpi.l          #80, d7                                 \n\t"\r
422                                                 "       bne                     reg_test_2_error                \n\t"\r
423                                                 "       move            a0, d0                                  \n\t"\r
424                                                 "       cmpi.l          #90, d0                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       move            a1, d0                                  \n\t"\r
427                                                 "       cmpi.l          #100, d0                                \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       move            a2, d0                                  \n\t"\r
430                                                 "       cmpi.l          #110, d0                                \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       move            a3, d0                                  \n\t"\r
433                                                 "       cmpi.l          #120, d0                                \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       move            a4, d0                                  \n\t"\r
436                                                 "       cmpi.l          #130, d0                                \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       move            a5, d0                                  \n\t"\r
439                                                 "       cmpi.l          #140, d0                                \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       move            a6, d0                                  \n\t"\r
442                                                 "       cmpi.l          #150, d0                                \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
445                                                 "       addq            #1, d0                                  \n\t"\r
446                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
447                                                 "       bra                     reg_test_2_start                \n\t"\r
448                                                 "reg_test_2_error:                                              \n\t"\r
449                                                 "       bra                     reg_test_2_error                \n\t"\r
450                                         );\r
451 }\r
452 /*-----------------------------------------------------------*/\r
453 \r
454 \r
455 \r