1 /* Coldfire C Header File
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2 * Copyright Freescale Semiconductor Inc
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3 * All rights reserved.
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5 * 2007/03/19 Revision: 0.9
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8 #ifndef __MCF5282_CS_H__
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9 #define __MCF5282_CS_H__
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12 /*********************************************************************
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14 * Chip Select Module (CS)
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16 *********************************************************************/
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18 /* Register read/write macros */
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19 #define MCF_CS0_CSAR (*(vuint16*)(&__IPSBAR[0x80]))
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20 #define MCF_CS0_CSMR (*(vuint32*)(&__IPSBAR[0x84]))
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21 #define MCF_CS0_CSCR (*(vuint16*)(&__IPSBAR[0x8A]))
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23 #define MCF_CS1_CSAR (*(vuint16*)(&__IPSBAR[0x8C]))
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24 #define MCF_CS1_CSMR (*(vuint32*)(&__IPSBAR[0x90]))
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25 #define MCF_CS1_CSCR (*(vuint16*)(&__IPSBAR[0x96]))
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27 #define MCF_CS2_CSAR (*(vuint16*)(&__IPSBAR[0x98]))
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28 #define MCF_CS2_CSMR (*(vuint32*)(&__IPSBAR[0x9C]))
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29 #define MCF_CS2_CSCR (*(vuint16*)(&__IPSBAR[0xA2]))
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31 #define MCF_CS3_CSAR (*(vuint16*)(&__IPSBAR[0xA4]))
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32 #define MCF_CS3_CSMR (*(vuint32*)(&__IPSBAR[0xA8]))
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33 #define MCF_CS3_CSCR (*(vuint16*)(&__IPSBAR[0xAE]))
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35 #define MCF_CS4_CSAR (*(vuint16*)(&__IPSBAR[0xB0]))
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36 #define MCF_CS4_CSMR (*(vuint32*)(&__IPSBAR[0xB4]))
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37 #define MCF_CS4_CSCR (*(vuint16*)(&__IPSBAR[0xBA]))
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39 #define MCF_CS5_CSAR (*(vuint16*)(&__IPSBAR[0xBC]))
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40 #define MCF_CS5_CSMR (*(vuint32*)(&__IPSBAR[0xC0]))
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41 #define MCF_CS5_CSCR (*(vuint16*)(&__IPSBAR[0xC6]))
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43 #define MCF_CS6_CSAR (*(vuint16*)(&__IPSBAR[0xC8]))
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44 #define MCF_CS6_CSMR (*(vuint32*)(&__IPSBAR[0xCC]))
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45 #define MCF_CS6_CSCR (*(vuint16*)(&__IPSBAR[0xD2]))
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47 #define MCF_CS_CSAR(x) (*(vuint16*)(&__IPSBAR[0x80 + ((x)*0xC)]))
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48 #define MCF_CS_CSMR(x) (*(vuint32*)(&__IPSBAR[0x84 + ((x)*0xC)]))
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49 #define MCF_CS_CSCR(x) (*(vuint16*)(&__IPSBAR[0x8A + ((x)*0xC)]))
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52 /* Bit definitions and macros for MCF_CS_CSAR */
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53 #define MCF_CS_CSAR_BA(x) (vuint16)(((x)&0xFFFF0000)>>0x10)
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55 /* Bit definitions and macros for MCF_CS_CSMR */
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56 #define MCF_CS_CSMR_V (0x1)
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57 #define MCF_CS_CSMR_UD (0x2)
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58 #define MCF_CS_CSMR_UC (0x4)
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59 #define MCF_CS_CSMR_SD (0x8)
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60 #define MCF_CS_CSMR_SC (0x10)
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61 #define MCF_CS_CSMR_CI (0x20)
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62 #define MCF_CS_CSMR_AM (0x40)
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63 #define MCF_CS_CSMR_WP (0x100)
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64 #define MCF_CS_CSMR_BAM(x) (((x)&0xFFFF)<<0x10)
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65 #define MCF_CS_CSMR_BAM_4G (0xFFFF0000)
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66 #define MCF_CS_CSMR_BAM_2G (0x7FFF0000)
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67 #define MCF_CS_CSMR_BAM_1G (0x3FFF0000)
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68 #define MCF_CS_CSMR_BAM_1024M (0x3FFF0000)
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69 #define MCF_CS_CSMR_BAM_512M (0x1FFF0000)
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70 #define MCF_CS_CSMR_BAM_256M (0xFFF0000)
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71 #define MCF_CS_CSMR_BAM_128M (0x7FF0000)
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72 #define MCF_CS_CSMR_BAM_64M (0x3FF0000)
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73 #define MCF_CS_CSMR_BAM_32M (0x1FF0000)
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74 #define MCF_CS_CSMR_BAM_16M (0xFF0000)
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75 #define MCF_CS_CSMR_BAM_8M (0x7F0000)
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76 #define MCF_CS_CSMR_BAM_4M (0x3F0000)
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77 #define MCF_CS_CSMR_BAM_2M (0x1F0000)
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78 #define MCF_CS_CSMR_BAM_1M (0xF0000)
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79 #define MCF_CS_CSMR_BAM_1024K (0xF0000)
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80 #define MCF_CS_CSMR_BAM_512K (0x70000)
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81 #define MCF_CS_CSMR_BAM_256K (0x30000)
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82 #define MCF_CS_CSMR_BAM_128K (0x10000)
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83 #define MCF_CS_CSMR_BAM_64K (0)
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85 /* Bit definitions and macros for MCF_CS_CSCR */
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86 #define MCF_CS_CSCR_BSTW (0x8)
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87 #define MCF_CS_CSCR_BSTR (0x10)
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88 #define MCF_CS_CSCR_BEM (0x20)
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89 #define MCF_CS_CSCR_PS(x) (((x)&0x3)<<0x6)
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90 #define MCF_CS_CSCR_PS_32 (0)
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91 #define MCF_CS_CSCR_PS_8 (0x40)
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92 #define MCF_CS_CSCR_PS_16 (0x80)
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93 #define MCF_CS_CSCR_AA (0x100)
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94 #define MCF_CS_CSCR_WS(x) (((x)&0xF)<<0xA)
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97 #endif /* __MCF5282_CS_H__ */
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