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1 /*\r
2     FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43 \r
44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
45     contact details.\r
46 \r
47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
48     critical systems.\r
49 \r
50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
51     licensing and training services.\r
52 */\r
53 \r
54 \r
55 /*\r
56  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
57  * documentation provides more details of the standard demo application tasks.\r
58  * In addition to the standard demo tasks, the following tasks and tests are\r
59  * defined and/or created within this file:\r
60  *\r
61  * "Check" task -  This only executes every five seconds but has a high priority\r
62  * to ensure it gets processor time.  Its main function is to check that all the\r
63  * standard demo tasks are still operational.  While no errors have been\r
64  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
65  * rate increasing to 500ms being a visual indication that at least one task has\r
66  * reported unexpected behaviour.\r
67  *\r
68  * "Reg test" tasks - These fill the registers with known values, then check\r
69  * that each register still contains its expected value.  Each task uses\r
70  * different values.  The tasks run with very low priority so get preempted very\r
71  * frequently.  A register containing an unexpected value is indicative of an\r
72  * error in the context switching mechanism.\r
73  *\r
74  */\r
75 \r
76 /* Standard includes. */\r
77 #include <stdio.h>\r
78 \r
79 /* Scheduler includes. */\r
80 #include "FreeRTOS.h"\r
81 #include "task.h"\r
82 #include "queue.h"\r
83 #include "semphr.h"\r
84 \r
85 /* Demo app includes. */\r
86 #include "BlockQ.h"\r
87 #include "death.h"\r
88 #include "integer.h"\r
89 #include "flash.h"\r
90 #include "partest.h"\r
91 #include "semtest.h"\r
92 #include "PollQ.h"\r
93 #include "GenQTest.h"\r
94 #include "QPeek.h"\r
95 #include "recmutex.h"\r
96 #include "IntQueue.h"\r
97 #include "comtest2.h"\r
98 \r
99 /*-----------------------------------------------------------*/\r
100 \r
101 /* The time between cycles of the 'check' functionality - as described at the\r
102 top of this file. */\r
103 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
104 \r
105 /* The rate at which the LED controlled by the 'check' task will flash should an\r
106 error have been detected. */\r
107 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
108 \r
109 /* The LED controlled by the 'check' task. */\r
110 #define mainCHECK_LED                                           ( 3 )\r
111 \r
112 /* ComTest constants - there is no free LED for the comtest tasks. */\r
113 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
114 #define mainCOM_TEST_LED                                        ( 5 )\r
115 \r
116 /* Task priorities. */\r
117 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
118 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
119 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
120 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
121 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
122 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
123 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
124 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
125 \r
126 /*\r
127  * Configure the hardware for the demo.\r
128  */\r
129 static void prvSetupHardware( void );\r
130 \r
131 /*\r
132  * Implements the 'check' task functionality as described at the top of this\r
133  * file.\r
134  */\r
135 static void prvCheckTask( void *pvParameters );\r
136 \r
137 /*\r
138  * Implement the 'Reg test' functionality as described at the top of this file.\r
139  */\r
140 static void vRegTest1Task( void *pvParameters );\r
141 static void vRegTest2Task( void *pvParameters );\r
142 \r
143 /*-----------------------------------------------------------*/\r
144 \r
145 /* Counters used to detect errors within the reg test tasks. */\r
146 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
147 \r
148 /*-----------------------------------------------------------*/\r
149 \r
150 int main( void )\r
151 {\r
152         /* Setup the hardware ready for this demo. */\r
153         prvSetupHardware();\r
154 \r
155         /* Start the standard demo tasks. */\r
156         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
157         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
158         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
159         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
160         vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
161         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
162         vStartQueuePeekTasks();\r
163         vStartRecursiveMutexTasks();\r
164         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
165         vStartInterruptQueueTasks();\r
166 \r
167         /* Start the reg test tasks - defined in this file. */\r
168         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
169         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
170 \r
171         /* Create the check task. */\r
172         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
173 \r
174         /* The suicide tasks must be created last as they need to know how many\r
175         tasks were running prior to their creation in order to ascertain whether\r
176         or not the correct/expected number of tasks are running at any given time. */\r
177     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
178 \r
179         /* Start the scheduler. */\r
180         vTaskStartScheduler();\r
181 \r
182     /* Will only get here if there was insufficient memory to create the idle\r
183     task. */\r
184         for( ;; );\r
185 }\r
186 /*-----------------------------------------------------------*/\r
187 \r
188 static void prvCheckTask( void *pvParameters )\r
189 {\r
190 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
191 portTickType xLastExecutionTime;\r
192 \r
193         ( void ) pvParameters;\r
194 \r
195         /* Initialise the variable used to control our iteration rate prior to\r
196         its first use. */\r
197         xLastExecutionTime = xTaskGetTickCount();\r
198 \r
199         for( ;; )\r
200         {\r
201                 /* Wait until it is time to run the tests again. */\r
202                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
203 \r
204                 /* Has an error been found in any task? */\r
205                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
206                 {\r
207                         ulError |= 0x01UL;\r
208                 }\r
209 \r
210                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
211                 {\r
212                         ulError |= 0x02UL;\r
213                 }\r
214 \r
215                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
216                 {\r
217                         ulError |= 0x04UL;\r
218                 }\r
219 \r
220                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
221             {\r
222                 ulError |= 0x20UL;\r
223             }\r
224 \r
225                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
226             {\r
227                 ulError |= 0x40UL;\r
228             }\r
229 \r
230                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
231             {\r
232                 ulError |= 0x80UL;\r
233             }\r
234 \r
235                 if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
236             {\r
237                 ulError |= 0x100UL;\r
238             }\r
239 \r
240                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
241             {\r
242                 ulError |= 0x200UL;\r
243             }\r
244 \r
245                 if( xAreComTestTasksStillRunning() != pdTRUE )\r
246                 {\r
247                 ulError |= 0x400UL;\r
248                 }\r
249 \r
250                 if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
251             {\r
252                 ulError |= 0x800UL;\r
253             }\r
254 \r
255                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
256                 {\r
257                         ulError |= 0x1000UL;\r
258                 }\r
259 \r
260                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
261                 {\r
262                         ulError |= 0x1000UL;\r
263                 }\r
264 \r
265                 ulLastRegTest1Count = ulRegTest1Counter;\r
266                 ulLastRegTest2Count = ulRegTest2Counter;\r
267 \r
268                 /* If an error has been found then increase our cycle rate, and in so\r
269                 going increase the rate at which the check task LED toggles. */\r
270                 if( ulError != 0 )\r
271                 {\r
272                 ulTicksToWait = mainERROR_PERIOD;\r
273                 }\r
274 \r
275                 /* Toggle the LED each itteration. */\r
276                 vParTestToggleLED( mainCHECK_LED );\r
277         }\r
278 }\r
279 /*-----------------------------------------------------------*/\r
280 \r
281 void prvSetupHardware( void )\r
282 {\r
283 extern void mcf5xxx_wr_cacr( unsigned portLONG );\r
284 \r
285         portDISABLE_INTERRUPTS();\r
286 \r
287         /* Enable the cache. */\r
288         mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
289         asm volatile( "NOP" ); /* As per errata. */\r
290 \r
291         /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
292         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
293 \r
294         /* Wait for PLL to lock. */\r
295         while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
296         {\r
297                 __asm__ volatile ( "NOP" );\r
298         }\r
299 \r
300         /* Setup the port used to toggle LEDs. */\r
301         vParTestInitialise();\r
302 }\r
303 /*-----------------------------------------------------------*/\r
304 \r
305 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
306 {\r
307         /* This will get called if a stack overflow is detected during the context\r
308         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
309         problems within nested interrupts, but only do this for debug purposes as\r
310         it will increase the context switch time. */\r
311 \r
312         ( void ) pxTask;\r
313         ( void ) pcTaskName;\r
314 \r
315         for( ;; );\r
316 }\r
317 /*-----------------------------------------------------------*/\r
318 \r
319 static void vRegTest1Task( void *pvParameters )\r
320 {\r
321         /* Sanity check - did we receive the parameter expected? */\r
322         if( pvParameters != &ulRegTest1Counter )\r
323         {\r
324                 /* Change here so the check task can detect that an error occurred. */\r
325                 for( ;; );\r
326         }\r
327 \r
328         /* Set all the registers to known values, then check that each retains its\r
329         expected value - as described at the top of this file.  If an error is\r
330         found then the loop counter will no longer be incremented allowing the check\r
331         task to recognise the error. */\r
332         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
333                                                 "       moveq           #1, %d0                                 \n\t"\r
334                                                 "       moveq           #2, %d1                                 \n\t"\r
335                                                 "       moveq           #3, %d2                                 \n\t"\r
336                                                 "       moveq           #4, %d3                                 \n\t"\r
337                                                 "       moveq           #5, %d4                                 \n\t"\r
338                                                 "       moveq           #6, %d5                                 \n\t"\r
339                                                 "       moveq           #7, %d6                                 \n\t"\r
340                                                 "       moveq           #8, %d7                                 \n\t"\r
341                                                 "       move            #9, %a0                                 \n\t"\r
342                                                 "       move            #10, %a1                                \n\t"\r
343                                                 "       move            #11, %a2                                \n\t"\r
344                                                 "       move            #12, %a3                                \n\t"\r
345                                                 "       move            #13, %a4                                \n\t"\r
346                                                 "       move            #14, %a5                                \n\t"\r
347                                                 "       move            #15, %a6                                \n\t"\r
348                                                 "                                                                               \n\t"\r
349                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       move            %a0, %d0                                \n\t"\r
366                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
367                                                 "       bne                     reg_test_1_error                \n\t"\r
368                                                 "       move            %a1, %d0                                \n\t"\r
369                                                 "       cmpi.l          #10, %d0                                \n\t"\r
370                                                 "       bne                     reg_test_1_error                \n\t"\r
371                                                 "       move            %a2, %d0                                \n\t"\r
372                                                 "       cmpi.l          #11, %d0                                \n\t"\r
373                                                 "       bne                     reg_test_1_error                \n\t"\r
374                                                 "       move            %a3, %d0                                \n\t"\r
375                                                 "       cmpi.l          #12, %d0                                \n\t"\r
376                                                 "       bne                     reg_test_1_error                \n\t"\r
377                                                 "       move            %a4, %d0                                \n\t"\r
378                                                 "       cmpi.l          #13, %d0                                \n\t"\r
379                                                 "       bne                     reg_test_1_error                \n\t"\r
380                                                 "       move            %a5, %d0                                \n\t"\r
381                                                 "       cmpi.l          #14, %d0                                \n\t"\r
382                                                 "       bne                     reg_test_1_error                \n\t"\r
383                                                 "       move            %a6, %d0                                \n\t"\r
384                                                 "       cmpi.l          #15, %d0                                \n\t"\r
385                                                 "       bne                     reg_test_1_error                \n\t"\r
386                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
387                                                 "       addql           #1, %d0                                 \n\t"\r
388                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
389                                                 "       bra                     reg_test_1_start                \n\t"\r
390                                                 "reg_test_1_error:                                              \n\t"\r
391                                                 "       bra                     reg_test_1_error                \n\t"\r
392                                         );\r
393 }\r
394 /*-----------------------------------------------------------*/\r
395 \r
396 static void vRegTest2Task( void *pvParameters )\r
397 {\r
398         /* Sanity check - did we receive the parameter expected? */\r
399         if( pvParameters != &ulRegTest2Counter )\r
400         {\r
401                 /* Change here so the check task can detect that an error occurred. */\r
402                 for( ;; );\r
403         }\r
404 \r
405         /* Set all the registers to known values, then check that each retains its\r
406         expected value - as described at the top of this file.  If an error is\r
407         found then the loop counter will no longer be incremented allowing the check\r
408         task to recognise the error. */\r
409         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
410                                                 "       moveq           #10, %d0                                \n\t"\r
411                                                 "       moveq           #20, %d1                                \n\t"\r
412                                                 "       moveq           #30, %d2                                \n\t"\r
413                                                 "       moveq           #40, %d3                                \n\t"\r
414                                                 "       moveq           #50, %d4                                \n\t"\r
415                                                 "       moveq           #60, %d5                                \n\t"\r
416                                                 "       moveq           #70, %d6                                \n\t"\r
417                                                 "       moveq           #80, %d7                                \n\t"\r
418                                                 "       move            #90, %a0                                \n\t"\r
419                                                 "       move            #100, %a1                               \n\t"\r
420                                                 "       move            #110, %a2                               \n\t"\r
421                                                 "       move            #120, %a3                               \n\t"\r
422                                                 "       move            #130, %a4                               \n\t"\r
423                                                 "       move            #140, %a5                               \n\t"\r
424                                                 "       move            #150, %a6                               \n\t"\r
425                                                 "                                                                               \n\t"\r
426                                                 "       cmpi.l          #10, %d0                                \n\t"\r
427                                                 "       bne                     reg_test_2_error                \n\t"\r
428                                                 "       cmpi.l          #20, %d1                                \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       cmpi.l          #30, %d2                                \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       cmpi.l          #40, %d3                                \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       cmpi.l          #50, %d4                                \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       cmpi.l          #60, %d5                                \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       cmpi.l          #70, %d6                                \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       cmpi.l          #80, %d7                                \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       move            %a0, %d0                                \n\t"\r
443                                                 "       cmpi.l          #90, %d0                                \n\t"\r
444                                                 "       bne                     reg_test_2_error                \n\t"\r
445                                                 "       move            %a1, %d0                                \n\t"\r
446                                                 "       cmpi.l          #100, %d0                               \n\t"\r
447                                                 "       bne                     reg_test_2_error                \n\t"\r
448                                                 "       move            %a2, %d0                                \n\t"\r
449                                                 "       cmpi.l          #110, %d0                               \n\t"\r
450                                                 "       bne                     reg_test_2_error                \n\t"\r
451                                                 "       move            %a3, %d0                                \n\t"\r
452                                                 "       cmpi.l          #120, %d0                               \n\t"\r
453                                                 "       bne                     reg_test_2_error                \n\t"\r
454                                                 "       move            %a4, %d0                                \n\t"\r
455                                                 "       cmpi.l          #130, %d0                               \n\t"\r
456                                                 "       bne                     reg_test_2_error                \n\t"\r
457                                                 "       move            %a5, %d0                                \n\t"\r
458                                                 "       cmpi.l          #140, %d0                               \n\t"\r
459                                                 "       bne                     reg_test_2_error                \n\t"\r
460                                                 "       move            %a6, %d0                                \n\t"\r
461                                                 "       cmpi.l          #150, %d0                               \n\t"\r
462                                                 "       bne                     reg_test_2_error                \n\t"\r
463                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
464                                                 "       addql           #1, %d0                                 \n\t"\r
465                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
466                                                 "       bra                     reg_test_2_start                \n\t"\r
467                                                 "reg_test_2_error:                                              \n\t"\r
468                                                 "       bra                     reg_test_2_error                \n\t"\r
469                                         );\r
470 }\r
471 /*-----------------------------------------------------------*/\r
472 \r