git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/main.c

   1 /*\r
   2         FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section\r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26     ***************************************************************************\r
  27     ***************************************************************************\r
  28     *                                                                         *\r
  29     * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
  30     * and even write all or part of your application on your behalf.          *\r
  31     * See http://www.OpenRTOS.com for details of the services we provide to   *\r
  32     * expedite your project.                                                  *\r
  33     *                                                                         *\r
  34     ***************************************************************************\r
  35     ***************************************************************************\r
  36 \r
  37         Please ensure to read the configuration and relevant port sections of the\r
  38         online documentation.\r
  39 \r
  40         http://www.FreeRTOS.org - Documentation, latest information, license and\r
  41         contact details.\r
  42 \r
  43         http://www.SafeRTOS.com - A version that is certified for use in safety\r
  44         critical systems.\r
  45 \r
  46         http://www.OpenRTOS.com - Commercial support, development, porting,\r
  47         licensing and training services.\r
  48 */\r
  49 \r
  50 \r
  51 /*\r
  52  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  53  * documentation provides more details of the standard demo application tasks.\r
  54  * In addition to the standard demo tasks, the following tasks and tests are\r
  55  * defined and/or created within this file:\r
  56  *\r
  57  * "Check" task -  This only executes every five seconds but has a high priority\r
  58  * to ensure it gets processor time.  Its main function is to check that all the\r
  59  * standard demo tasks are still operational.  While no errors have been\r
  60  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  61  * rate increasing to 500ms then being a visual indication that at least one\r
  62  * task has reported unexpected behaviour.\r
  63  *\r
  64  */\r
  65 \r
  66 /* Standard includes. */\r
  67 #include <stdio.h>\r
  68 \r
  69 /* Scheduler includes. */\r
  70 #include "FreeRTOS.h"\r
  71 #include "task.h"\r
  72 #include "queue.h"\r
  73 #include "semphr.h"\r
  74 \r
  75 /* Demo app includes. */\r
  76 #include "BlockQ.h"\r
  77 #include "death.h"\r
  78 #include "integer.h"\r
  79 #include "blocktim.h"\r
  80 #include "flash.h"\r
  81 #include "partest.h"\r
  82 #include "semtest.h"\r
  83 #include "PollQ.h"\r
  84 #include "GenQTest.h"\r
  85 #include "QPeek.h"\r
  86 #include "recmutex.h"\r
  87 #include "IntQueue.h"\r
  88 #include "comtest2.h"\r
  89 \r
  90 /*-----------------------------------------------------------*/\r
  91 \r
  92 /* The time between cycles of the 'check' functionality (defined within the\r
  93 tick hook. */\r
  94 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
  95 \r
  96 /* The rate at which the LED controlled by the 'check' task will flash when an\r
  97 error has been detected. */\r
  98 #define mainERROR_PERIOD                                        ( 500 )\r
  99 \r
 100 /* The LED controlled by the 'check' task. */\r
 101 #define mainCHECK_LED                                           ( 3 )\r
 102 \r
 103 /* Contest constants - there is no free LED for the comtest. */\r
 104 #define mainCOM_TEST_BAUD_RATE  ( ( unsigned portLONG ) 115200 )\r
 105 #define mainCOM_TEST_LED                ( 5 )\r
 106 \r
 107 /* Task priorities. */\r
 108 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 109 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 110 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 111 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 112 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 113 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )\r
 114 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
 115 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 116 \r
 117 /*\r
 118  * Configure the hardware for the demo.\r
 119  */\r
 120 static void prvSetupHardware( void );\r
 121 \r
 122 /*\r
 123  * Implements the 'check' task functionality as described at the top of this\r
 124  * file.\r
 125  */\r
 126 static void prvCheckTask( void *pvParameters );\r
 127 static void vRegTest1Task( void *pvParameters );\r
 128 static void vRegTest2Task( void *pvParameters );\r
 129 \r
 130 /*-----------------------------------------------------------*/\r
 131 static volatile unsigned portLONG ulRegTest1Counter = 0, ulRegTest2Counter = 0;\r
 132 \r
 133 int main( void )\r
 134 {\r
 135         prvSetupHardware();\r
 136 \r
 137         /* Start the standard demo tasks. */\r
 138         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 139         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 140         vCreateBlockTimeTasks();\r
 141         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 142         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 143         vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
 144         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 145         vStartQueuePeekTasks();\r
 146         vStartRecursiveMutexTasks();\r
 147         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
 148         vStartInterruptQueueTasks();\r
 149 \r
 150         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 151         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 152 \r
 153         /* Create the check task. */\r
 154         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 155 \r
 156         /* The suicide tasks must be created last as they need to know how many\r
 157         tasks were running prior to their creation in order to ascertain whether\r
 158         or not the correct/expected number of tasks are running at any given time. */\r
 159     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
 160 \r
 161         /* Start the scheduler. */\r
 162         vTaskStartScheduler();\r
 163 \r
 164     /* Will only get here if there was insufficient memory to create the idle\r
 165     task. */\r
 166         for( ;; );\r
 167 }\r
 168 /*-----------------------------------------------------------*/\r
 169 \r
 170 static void prvCheckTask( void *pvParameters )\r
 171 {\r
 172 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 173 portTickType xLastExecutionTime;\r
 174 \r
 175         ( void ) pvParameters;\r
 176 \r
 177         /* Initialise the variable used to control our iteration rate prior to\r
 178         its first use. */\r
 179         xLastExecutionTime = xTaskGetTickCount();\r
 180 \r
 181         for( ;; )\r
 182         {\r
 183                 /* Wait until it is time to run the tests again. */\r
 184                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 185 \r
 186                 /* Has an error been found in any task? */\r
 187                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 188                 {\r
 189                         ulError |= 0x01UL;\r
 190                 }\r
 191 \r
 192                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 193                 {\r
 194                         ulError |= 0x02UL;\r
 195                 }\r
 196 \r
 197                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 198                 {\r
 199                         ulError |= 0x04UL;\r
 200                 }\r
 201 \r
 202                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
 203                 {\r
 204                         ulError |= 0x10UL;\r
 205                 }\r
 206 \r
 207                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 208             {\r
 209                 ulError |= 0x20UL;\r
 210             }\r
 211 \r
 212                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 213             {\r
 214                 ulError |= 0x40UL;\r
 215             }\r
 216 \r
 217                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
 218             {\r
 219                 ulError |= 0x80UL;\r
 220             }\r
 221 \r
 222                 if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
 223             {\r
 224                 ulError |= 0x100UL;\r
 225             }\r
 226 \r
 227                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 228             {\r
 229                 ulError |= 0x200UL;\r
 230             }\r
 231 \r
 232                 if( xAreComTestTasksStillRunning() != pdTRUE )\r
 233                 {\r
 234                 ulError |= 0x400UL;\r
 235                 }\r
 236 \r
 237                 if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
 238             {\r
 239                 ulError |= 0x800UL;\r
 240             }\r
 241 \r
 242                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 243                 {\r
 244                         ulError |= 0x1000UL;\r
 245                 }\r
 246 \r
 247                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 248                 {\r
 249                         ulError |= 0x1000UL;\r
 250                 }\r
 251 \r
 252                 ulLastRegTest1Count = ulRegTest1Counter;\r
 253                 ulLastRegTest2Count = ulRegTest2Counter;\r
 254 \r
 255                 if( ulError != 0 )\r
 256                 {\r
 257                 ulTicksToWait = mainERROR_PERIOD;\r
 258                 }\r
 259 \r
 260                 vParTestToggleLED( mainCHECK_LED );\r
 261         }\r
 262 }\r
 263 /*-----------------------------------------------------------*/\r
 264 \r
 265 void prvSetupHardware( void )\r
 266 {\r
 267 extern void mcf5xxx_wr_cacr( unsigned portLONG );\r
 268 \r
 269         /* Enable the cache. */\r
 270         mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
 271 \r
 272         /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
 273         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
 274 \r
 275         /* Wait for PLL to lock. */\r
 276         while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
 277         {\r
 278                 __asm__ volatile ( "NOP" );\r
 279         }\r
 280 \r
 281         vParTestInitialise();\r
 282 }\r
 283 /*-----------------------------------------------------------*/\r
 284 \r
 285 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 286 {\r
 287         ( void ) pxTask;\r
 288         ( void ) pcTaskName;\r
 289 \r
 290         for( ;; );\r
 291 }\r
 292 /*-----------------------------------------------------------*/\r
 293 \r
 294 static void vRegTest1Task( void *pvParameters )\r
 295 {\r
 296         ( void ) pvParameters;\r
 297 \r
 298         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 299                                                 "       moveq           #1, %d0                                 \n\t"\r
 300                                                 "       moveq           #2, %d1                                 \n\t"\r
 301                                                 "       moveq           #3, %d2                                 \n\t"\r
 302                                                 "       moveq           #4, %d3                                 \n\t"\r
 303                                                 "       moveq           #5, %d4                                 \n\t"\r
 304                                                 "       moveq           #6, %d5                                 \n\t"\r
 305                                                 "       moveq           #7, %d6                                 \n\t"\r
 306                                                 "       moveq           #8, %d7                                 \n\t"\r
 307                                                 "       move            #9, %a0                                 \n\t"\r
 308                                                 "       move            #10, %a1                                        \n\t"\r
 309                                                 "       move            #11, %a2                                \n\t"\r
 310                                                 "       move            #12, %a3                                \n\t"\r
 311                                                 "       move            #13, %a4                                \n\t"\r
 312                                                 "       move            #14, %a5                                \n\t"\r
 313                                                 "       move            #15, %a6                                \n\t"\r
 314                                                 "                                                                               \n\t"\r
 315                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 316                                                 "       bne                     reg_test_1_error                \n\t"\r
 317                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 318                                                 "       bne                     reg_test_1_error                \n\t"\r
 319                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 320                                                 "       bne                     reg_test_1_error                \n\t"\r
 321                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 322                                                 "       bne                     reg_test_1_error                \n\t"\r
 323                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 324                                                 "       bne                     reg_test_1_error                \n\t"\r
 325                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 326                                                 "       bne                     reg_test_1_error                \n\t"\r
 327                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 328                                                 "       bne                     reg_test_1_error                \n\t"\r
 329                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 330                                                 "       bne                     reg_test_1_error                \n\t"\r
 331                                                 "       move            %a0, %d0                                \n\t"\r
 332                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 333                                                 "       bne                     reg_test_1_error                \n\t"\r
 334                                                 "       move            %a1, %d0                                \n\t"\r
 335                                                 "       cmpi.l          #10, %d0                                        \n\t"\r
 336                                                 "       bne                     reg_test_1_error                \n\t"\r
 337                                                 "       move            %a2, %d0                                \n\t"\r
 338                                                 "       cmpi.l          #11, %d0                                        \n\t"\r
 339                                                 "       bne                     reg_test_1_error                \n\t"\r
 340                                                 "       move            %a3, %d0                                \n\t"\r
 341                                                 "       cmpi.l          #12, %d0                                        \n\t"\r
 342                                                 "       bne                     reg_test_1_error                \n\t"\r
 343                                                 "       move            %a4, %d0                                \n\t"\r
 344                                                 "       cmpi.l          #13, %d0                                        \n\t"\r
 345                                                 "       bne                     reg_test_1_error                \n\t"\r
 346                                                 "       move            %a5, %d0                                \n\t"\r
 347                                                 "       cmpi.l          #14, %d0                                        \n\t"\r
 348                                                 "       bne                     reg_test_1_error                \n\t"\r
 349                                                 "       move            %a6, %d0                                \n\t"\r
 350                                                 "       cmpi.l          #15, %d0                                        \n\t"\r
 351                                                 "       bne                     reg_test_1_error                \n\t"\r
 352                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 353                                                 "       addql           #1, %d0                                 \n\t"\r
 354                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 355                                                 "       bra                     reg_test_1_start                \n\t"\r
 356                                                 "reg_test_1_error:                                              \n\t"\r
 357                                                 "       bra                     reg_test_1_error                \n\t"\r
 358                                         );\r
 359 }\r
 360 /*-----------------------------------------------------------*/\r
 361 \r
 362 static void vRegTest2Task( void *pvParameters )\r
 363 {\r
 364         ( void ) pvParameters;\r
 365 \r
 366         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 367                                                 "       moveq           #10, %d0                                        \n\t"\r
 368                                                 "       moveq           #20, %d1                                        \n\t"\r
 369                                                 "       moveq           #30, %d2                                        \n\t"\r
 370                                                 "       moveq           #40, %d3                                        \n\t"\r
 371                                                 "       moveq           #50, %d4                                        \n\t"\r
 372                                                 "       moveq           #60, %d5                                        \n\t"\r
 373                                                 "       moveq           #70, %d6                                        \n\t"\r
 374                                                 "       moveq           #80, %d7                                        \n\t"\r
 375                                                 "       move            #90, %a0                                        \n\t"\r
 376                                                 "       move            #100, %a1                                       \n\t"\r
 377                                                 "       move            #110, %a2                               \n\t"\r
 378                                                 "       move            #120, %a3                               \n\t"\r
 379                                                 "       move            #130, %a4                               \n\t"\r
 380                                                 "       move            #140, %a5                               \n\t"\r
 381                                                 "       move            #150, %a6                               \n\t"\r
 382                                                 "                                                                               \n\t"\r
 383                                                 "       cmpi.l          #10, %d0                                        \n\t"\r
 384                                                 "       bne                     reg_test_2_error                \n\t"\r
 385                                                 "       cmpi.l          #20, %d1                                        \n\t"\r
 386                                                 "       bne                     reg_test_2_error                \n\t"\r
 387                                                 "       cmpi.l          #30, %d2                                        \n\t"\r
 388                                                 "       bne                     reg_test_2_error                \n\t"\r
 389                                                 "       cmpi.l          #40, %d3                                        \n\t"\r
 390                                                 "       bne                     reg_test_2_error                \n\t"\r
 391                                                 "       cmpi.l          #50, %d4                                        \n\t"\r
 392                                                 "       bne                     reg_test_2_error                \n\t"\r
 393                                                 "       cmpi.l          #60, %d5                                        \n\t"\r
 394                                                 "       bne                     reg_test_2_error                \n\t"\r
 395                                                 "       cmpi.l          #70, %d6                                        \n\t"\r
 396                                                 "       bne                     reg_test_2_error                \n\t"\r
 397                                                 "       cmpi.l          #80, %d7                                        \n\t"\r
 398                                                 "       bne                     reg_test_2_error                \n\t"\r
 399                                                 "       move            %a0, %d0                                \n\t"\r
 400                                                 "       cmpi.l          #90, %d0                                        \n\t"\r
 401                                                 "       bne                     reg_test_2_error                \n\t"\r
 402                                                 "       move            %a1, %d0                                \n\t"\r
 403                                                 "       cmpi.l          #100, %d0                                       \n\t"\r
 404                                                 "       bne                     reg_test_2_error                \n\t"\r
 405                                                 "       move            %a2, %d0                                \n\t"\r
 406                                                 "       cmpi.l          #110, %d0                                       \n\t"\r
 407                                                 "       bne                     reg_test_2_error                \n\t"\r
 408                                                 "       move            %a3, %d0                                \n\t"\r
 409                                                 "       cmpi.l          #120, %d0                                       \n\t"\r
 410                                                 "       bne                     reg_test_2_error                \n\t"\r
 411                                                 "       move            %a4, %d0                                \n\t"\r
 412                                                 "       cmpi.l          #130, %d0                                       \n\t"\r
 413                                                 "       bne                     reg_test_2_error                \n\t"\r
 414                                                 "       move            %a5, %d0                                \n\t"\r
 415                                                 "       cmpi.l          #140, %d0                                       \n\t"\r
 416                                                 "       bne                     reg_test_2_error                \n\t"\r
 417                                                 "       move            %a6, %d0                                \n\t"\r
 418                                                 "       cmpi.l          #150, %d0                                       \n\t"\r
 419                                                 "       bne                     reg_test_2_error                \n\t"\r
 420                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 421                                                 "       addql           #1, %d0                                 \n\t"\r
 422                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 423                                                 "       bra                     reg_test_2_start                \n\t"\r
 424                                                 "reg_test_2_error:                                              \n\t"\r
 425                                                 "       bra                     reg_test_2_error                \n\t"\r
 426                                         );\r
 427 }\r
 428 /*-----------------------------------------------------------*/\r
 429 \r