]> git.sur5r.net Git - freertos/blob - Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/main.c
Update to V5.1.2.
[freertos] / Demo / ColdFire_MCF5282_Eclipse / RTOSDemo / main.c
1 /*\r
2         FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
7         it under the terms of the GNU General Public License as published by\r
8         the Free Software Foundation; either version 2 of the License, or\r
9         (at your option) any later version.\r
10 \r
11         FreeRTOS.org is distributed in the hope that it will be useful,\r
12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14         GNU General Public License for more details.\r
15 \r
16         You should have received a copy of the GNU General Public License\r
17         along with FreeRTOS.org; if not, write to the Free Software\r
18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19 \r
20         A special exception to the GPL can be applied should you wish to distribute\r
21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
22         the source code for any proprietary components.  See the licensing section\r
23         of http://www.FreeRTOS.org for full details of how and when the exception\r
24         can be applied.\r
25 \r
26     ***************************************************************************\r
27     ***************************************************************************\r
28     *                                                                         *\r
29     * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
30         *                                                                         *\r
31         * This is a concise, step by step, 'hands on' guide that describes both   *\r
32         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
33         * explains numerous examples that are written using the FreeRTOS API.     *\r
34         * Full source code for all the examples is provided in an accompanying    *\r
35         * .zip file.                                                              *\r
36     *                                                                         *\r
37     ***************************************************************************\r
38     ***************************************************************************\r
39 \r
40         Please ensure to read the configuration and relevant port sections of the\r
41         online documentation.\r
42 \r
43         http://www.FreeRTOS.org - Documentation, latest information, license and\r
44         contact details.\r
45 \r
46         http://www.SafeRTOS.com - A version that is certified for use in safety\r
47         critical systems.\r
48 \r
49         http://www.OpenRTOS.com - Commercial support, development, porting,\r
50         licensing and training services.\r
51 */\r
52 \r
53 \r
54 /*\r
55  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
56  * documentation provides more details of the standard demo application tasks.\r
57  * In addition to the standard demo tasks, the following tasks and tests are\r
58  * defined and/or created within this file:\r
59  *\r
60  * "Check" task -  This only executes every five seconds but has a high priority\r
61  * to ensure it gets processor time.  Its main function is to check that all the\r
62  * standard demo tasks are still operational.  While no errors have been\r
63  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
64  * rate increasing to 500ms being a visual indication that at least one task has\r
65  * reported unexpected behaviour.\r
66  *\r
67  * "Reg test" tasks - These fill the registers with known values, then check\r
68  * that each register still contains its expected value.  Each task uses\r
69  * different values.  The tasks run with very low priority so get preempted very\r
70  * frequently.  A register containing an unexpected value is indicative of an\r
71  * error in the context switching mechanism.\r
72  *\r
73  */\r
74 \r
75 /* Standard includes. */\r
76 #include <stdio.h>\r
77 \r
78 /* Scheduler includes. */\r
79 #include "FreeRTOS.h"\r
80 #include "task.h"\r
81 #include "queue.h"\r
82 #include "semphr.h"\r
83 \r
84 /* Demo app includes. */\r
85 #include "BlockQ.h"\r
86 #include "death.h"\r
87 #include "integer.h"\r
88 #include "flash.h"\r
89 #include "partest.h"\r
90 #include "semtest.h"\r
91 #include "PollQ.h"\r
92 #include "GenQTest.h"\r
93 #include "QPeek.h"\r
94 #include "recmutex.h"\r
95 #include "IntQueue.h"\r
96 #include "comtest2.h"\r
97 \r
98 /*-----------------------------------------------------------*/\r
99 \r
100 /* The time between cycles of the 'check' functionality - as described at the\r
101 top of this file. */\r
102 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
103 \r
104 /* The rate at which the LED controlled by the 'check' task will flash should an\r
105 error have been detected. */\r
106 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
107 \r
108 /* The LED controlled by the 'check' task. */\r
109 #define mainCHECK_LED                                           ( 3 )\r
110 \r
111 /* ComTest constants - there is no free LED for the comtest tasks. */\r
112 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
113 #define mainCOM_TEST_LED                                        ( 5 )\r
114 \r
115 /* Task priorities. */\r
116 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
117 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
118 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
119 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
120 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
121 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
122 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
123 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
124 \r
125 /*\r
126  * Configure the hardware for the demo.\r
127  */\r
128 static void prvSetupHardware( void );\r
129 \r
130 /*\r
131  * Implements the 'check' task functionality as described at the top of this\r
132  * file.\r
133  */\r
134 static void prvCheckTask( void *pvParameters );\r
135 \r
136 /*\r
137  * Implement the 'Reg test' functionality as described at the top of this file.\r
138  */\r
139 static void vRegTest1Task( void *pvParameters );\r
140 static void vRegTest2Task( void *pvParameters );\r
141 \r
142 /*-----------------------------------------------------------*/\r
143 \r
144 /* Counters used to detect errors within the reg test tasks. */\r
145 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
146 \r
147 /*-----------------------------------------------------------*/\r
148 \r
149 int main( void )\r
150 {\r
151         /* Setup the hardware ready for this demo. */\r
152         prvSetupHardware();\r
153 \r
154         /* Start the standard demo tasks. */\r
155         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
156         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
157         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
158         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
159         vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
160         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
161         vStartQueuePeekTasks();\r
162         vStartRecursiveMutexTasks();\r
163         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
164         vStartInterruptQueueTasks();\r
165 \r
166         /* Start the reg test tasks - defined in this file. */\r
167         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
168         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
169 \r
170         /* Create the check task. */\r
171         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
172 \r
173         /* The suicide tasks must be created last as they need to know how many\r
174         tasks were running prior to their creation in order to ascertain whether\r
175         or not the correct/expected number of tasks are running at any given time. */\r
176     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
177 \r
178         /* Start the scheduler. */\r
179         vTaskStartScheduler();\r
180 \r
181     /* Will only get here if there was insufficient memory to create the idle\r
182     task. */\r
183         for( ;; );\r
184 }\r
185 /*-----------------------------------------------------------*/\r
186 \r
187 static void prvCheckTask( void *pvParameters )\r
188 {\r
189 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
190 portTickType xLastExecutionTime;\r
191 \r
192         ( void ) pvParameters;\r
193 \r
194         /* Initialise the variable used to control our iteration rate prior to\r
195         its first use. */\r
196         xLastExecutionTime = xTaskGetTickCount();\r
197 \r
198         for( ;; )\r
199         {\r
200                 /* Wait until it is time to run the tests again. */\r
201                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
202 \r
203                 /* Has an error been found in any task? */\r
204                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
205                 {\r
206                         ulError |= 0x01UL;\r
207                 }\r
208 \r
209                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
210                 {\r
211                         ulError |= 0x02UL;\r
212                 }\r
213 \r
214                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
215                 {\r
216                         ulError |= 0x04UL;\r
217                 }\r
218 \r
219                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
220             {\r
221                 ulError |= 0x20UL;\r
222             }\r
223 \r
224                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
225             {\r
226                 ulError |= 0x40UL;\r
227             }\r
228 \r
229                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
230             {\r
231                 ulError |= 0x80UL;\r
232             }\r
233 \r
234                 if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
235             {\r
236                 ulError |= 0x100UL;\r
237             }\r
238 \r
239                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
240             {\r
241                 ulError |= 0x200UL;\r
242             }\r
243 \r
244                 if( xAreComTestTasksStillRunning() != pdTRUE )\r
245                 {\r
246                 ulError |= 0x400UL;\r
247                 }\r
248 \r
249                 if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
250             {\r
251                 ulError |= 0x800UL;\r
252             }\r
253 \r
254                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
255                 {\r
256                         ulError |= 0x1000UL;\r
257                 }\r
258 \r
259                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
260                 {\r
261                         ulError |= 0x1000UL;\r
262                 }\r
263 \r
264                 ulLastRegTest1Count = ulRegTest1Counter;\r
265                 ulLastRegTest2Count = ulRegTest2Counter;\r
266 \r
267                 /* If an error has been found then increase our cycle rate, and in so\r
268                 going increase the rate at which the check task LED toggles. */\r
269                 if( ulError != 0 )\r
270                 {\r
271                 ulTicksToWait = mainERROR_PERIOD;\r
272                 }\r
273 \r
274                 /* Toggle the LED each itteration. */\r
275                 vParTestToggleLED( mainCHECK_LED );\r
276         }\r
277 }\r
278 /*-----------------------------------------------------------*/\r
279 \r
280 void prvSetupHardware( void )\r
281 {\r
282 extern void mcf5xxx_wr_cacr( unsigned portLONG );\r
283 \r
284         portDISABLE_INTERRUPTS();\r
285 \r
286         /* Enable the cache. */\r
287         mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
288         asm volatile( "NOP" ); /* As per errata. */\r
289 \r
290         /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
291         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
292 \r
293         /* Wait for PLL to lock. */\r
294         while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
295         {\r
296                 __asm__ volatile ( "NOP" );\r
297         }\r
298 \r
299         /* Setup the port used to toggle LEDs. */\r
300         vParTestInitialise();\r
301 }\r
302 /*-----------------------------------------------------------*/\r
303 \r
304 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
305 {\r
306         /* This will get called if a stack overflow is detected during the context\r
307         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
308         problems within nested interrupts, but only do this for debug purposes as\r
309         it will increase the context switch time. */\r
310 \r
311         ( void ) pxTask;\r
312         ( void ) pcTaskName;\r
313 \r
314         for( ;; );\r
315 }\r
316 /*-----------------------------------------------------------*/\r
317 \r
318 static void vRegTest1Task( void *pvParameters )\r
319 {\r
320         /* Sanity check - did we receive the parameter expected? */\r
321         if( pvParameters != &ulRegTest1Counter )\r
322         {\r
323                 /* Change here so the check task can detect that an error occurred. */\r
324                 for( ;; );\r
325         }\r
326 \r
327         /* Set all the registers to known values, then check that each retains its\r
328         expected value - as described at the top of this file.  If an error is\r
329         found then the loop counter will no longer be incremented allowing the check\r
330         task to recognise the error. */\r
331         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
332                                                 "       moveq           #1, %d0                                 \n\t"\r
333                                                 "       moveq           #2, %d1                                 \n\t"\r
334                                                 "       moveq           #3, %d2                                 \n\t"\r
335                                                 "       moveq           #4, %d3                                 \n\t"\r
336                                                 "       moveq           #5, %d4                                 \n\t"\r
337                                                 "       moveq           #6, %d5                                 \n\t"\r
338                                                 "       moveq           #7, %d6                                 \n\t"\r
339                                                 "       moveq           #8, %d7                                 \n\t"\r
340                                                 "       move            #9, %a0                                 \n\t"\r
341                                                 "       move            #10, %a1                                \n\t"\r
342                                                 "       move            #11, %a2                                \n\t"\r
343                                                 "       move            #12, %a3                                \n\t"\r
344                                                 "       move            #13, %a4                                \n\t"\r
345                                                 "       move            #14, %a5                                \n\t"\r
346                                                 "       move            #15, %a6                                \n\t"\r
347                                                 "                                                                               \n\t"\r
348                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
351                                                 "       bne                     reg_test_1_error                \n\t"\r
352                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
357                                                 "       bne                     reg_test_1_error                \n\t"\r
358                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            %a0, %d0                                \n\t"\r
365                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            %a1, %d0                                \n\t"\r
368                                                 "       cmpi.l          #10, %d0                                \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            %a2, %d0                                \n\t"\r
371                                                 "       cmpi.l          #11, %d0                                \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            %a3, %d0                                \n\t"\r
374                                                 "       cmpi.l          #12, %d0                                \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            %a4, %d0                                \n\t"\r
377                                                 "       cmpi.l          #13, %d0                                \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            %a5, %d0                                \n\t"\r
380                                                 "       cmpi.l          #14, %d0                                \n\t"\r
381                                                 "       bne                     reg_test_1_error                \n\t"\r
382                                                 "       move            %a6, %d0                                \n\t"\r
383                                                 "       cmpi.l          #15, %d0                                \n\t"\r
384                                                 "       bne                     reg_test_1_error                \n\t"\r
385                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
386                                                 "       addql           #1, %d0                                 \n\t"\r
387                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
388                                                 "       bra                     reg_test_1_start                \n\t"\r
389                                                 "reg_test_1_error:                                              \n\t"\r
390                                                 "       bra                     reg_test_1_error                \n\t"\r
391                                         );\r
392 }\r
393 /*-----------------------------------------------------------*/\r
394 \r
395 static void vRegTest2Task( void *pvParameters )\r
396 {\r
397         /* Sanity check - did we receive the parameter expected? */\r
398         if( pvParameters != &ulRegTest2Counter )\r
399         {\r
400                 /* Change here so the check task can detect that an error occurred. */\r
401                 for( ;; );\r
402         }\r
403 \r
404         /* Set all the registers to known values, then check that each retains its\r
405         expected value - as described at the top of this file.  If an error is\r
406         found then the loop counter will no longer be incremented allowing the check\r
407         task to recognise the error. */\r
408         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
409                                                 "       moveq           #10, %d0                                \n\t"\r
410                                                 "       moveq           #20, %d1                                \n\t"\r
411                                                 "       moveq           #30, %d2                                \n\t"\r
412                                                 "       moveq           #40, %d3                                \n\t"\r
413                                                 "       moveq           #50, %d4                                \n\t"\r
414                                                 "       moveq           #60, %d5                                \n\t"\r
415                                                 "       moveq           #70, %d6                                \n\t"\r
416                                                 "       moveq           #80, %d7                                \n\t"\r
417                                                 "       move            #90, %a0                                \n\t"\r
418                                                 "       move            #100, %a1                               \n\t"\r
419                                                 "       move            #110, %a2                               \n\t"\r
420                                                 "       move            #120, %a3                               \n\t"\r
421                                                 "       move            #130, %a4                               \n\t"\r
422                                                 "       move            #140, %a5                               \n\t"\r
423                                                 "       move            #150, %a6                               \n\t"\r
424                                                 "                                                                               \n\t"\r
425                                                 "       cmpi.l          #10, %d0                                \n\t"\r
426                                                 "       bne                     reg_test_2_error                \n\t"\r
427                                                 "       cmpi.l          #20, %d1                                \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       cmpi.l          #30, %d2                                \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       cmpi.l          #40, %d3                                \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       cmpi.l          #50, %d4                                \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       cmpi.l          #60, %d5                                \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       cmpi.l          #70, %d6                                \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       cmpi.l          #80, %d7                                \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       move            %a0, %d0                                \n\t"\r
442                                                 "       cmpi.l          #90, %d0                                \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       move            %a1, %d0                                \n\t"\r
445                                                 "       cmpi.l          #100, %d0                               \n\t"\r
446                                                 "       bne                     reg_test_2_error                \n\t"\r
447                                                 "       move            %a2, %d0                                \n\t"\r
448                                                 "       cmpi.l          #110, %d0                               \n\t"\r
449                                                 "       bne                     reg_test_2_error                \n\t"\r
450                                                 "       move            %a3, %d0                                \n\t"\r
451                                                 "       cmpi.l          #120, %d0                               \n\t"\r
452                                                 "       bne                     reg_test_2_error                \n\t"\r
453                                                 "       move            %a4, %d0                                \n\t"\r
454                                                 "       cmpi.l          #130, %d0                               \n\t"\r
455                                                 "       bne                     reg_test_2_error                \n\t"\r
456                                                 "       move            %a5, %d0                                \n\t"\r
457                                                 "       cmpi.l          #140, %d0                               \n\t"\r
458                                                 "       bne                     reg_test_2_error                \n\t"\r
459                                                 "       move            %a6, %d0                                \n\t"\r
460                                                 "       cmpi.l          #150, %d0                               \n\t"\r
461                                                 "       bne                     reg_test_2_error                \n\t"\r
462                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
463                                                 "       addql           #1, %d0                                 \n\t"\r
464                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
465                                                 "       bra                     reg_test_2_start                \n\t"\r
466                                                 "reg_test_2_error:                                              \n\t"\r
467                                                 "       bra                     reg_test_2_error                \n\t"\r
468                                         );\r
469 }\r
470 /*-----------------------------------------------------------*/\r
471 \r