2 FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
\r
4 This file is part of the FreeRTOS distribution.
\r
6 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
7 the terms of the GNU General Public License (version 2) as published by the
\r
8 Free Software Foundation and modified by the FreeRTOS exception.
\r
9 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
10 combined work that includes FreeRTOS without being obliged to provide the
\r
11 source code for proprietary components outside of the FreeRTOS kernel.
\r
12 Alternative commercial license and support terms are also available upon
\r
13 request. See the licensing section of http://www.FreeRTOS.org for full
\r
16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
\r
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
21 You should have received a copy of the GNU General Public License along
\r
22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
\r
23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
26 ***************************************************************************
\r
28 * The FreeRTOS eBook and reference manual are available to purchase for a *
\r
29 * small fee. Help yourself get started quickly while also helping the *
\r
30 * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
\r
32 ***************************************************************************
\r
36 Please ensure to read the configuration and relevant port sections of the
\r
37 online documentation.
\r
39 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
42 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
45 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
46 licensing and training services.
\r
50 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
\r
52 NOTE: This driver is primarily to test the scheduler functionality. It does
\r
53 not effectively use the buffers or DMA and is therefore not intended to be
\r
54 an example of an efficient driver. */
\r
56 /* Standard include file. */
\r
59 /* Scheduler include files. */
\r
60 #include "FreeRTOS.h"
\r
64 /* Demo app include files. */
\r
67 /* Hardware definitions. */
\r
68 #define serNO_PARITY ( ( unsigned portCHAR ) 0x02 << 3 )
\r
69 #define ser8DATA_BITS ( ( unsigned portCHAR ) 0x03 )
\r
70 #define ser1STOP_BIT ( ( unsigned portCHAR ) 0x07 )
\r
71 #define serSYSTEM_CLOCK ( ( unsigned portCHAR ) 0xdd )
\r
72 #define serTX_OUTPUT ( ( unsigned portCHAR ) 0x04 )
\r
73 #define serRX_INPUT ( ( unsigned portCHAR ) 0x08 )
\r
74 #define serTX_ENABLE ( ( unsigned portCHAR ) 0x04 )
\r
75 #define serRX_ENABLE ( ( unsigned portCHAR ) 0x01 )
\r
76 #define serTX_INT ( ( unsigned portCHAR ) 0x01 )
\r
77 #define serRX_INT ( ( unsigned portCHAR ) 0x02 )
\r
80 /* The queues used to communicate between tasks and ISR's. */
\r
81 static xQueueHandle xRxedChars;
\r
82 static xQueueHandle xCharsForTx;
\r
84 /* Flag used to indicate the tx status. */
\r
85 static portBASE_TYPE xTxHasEnded = pdTRUE;
\r
87 /*-----------------------------------------------------------*/
\r
89 /* The UART interrupt handler. */
\r
90 void __attribute__( ( interrupt ) ) __cs3_isr_interrupt_78( void );
\r
92 /*-----------------------------------------------------------*/
\r
94 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
\r
96 const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );
\r
98 /* Create the queues used by the com test task. */
\r
99 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
100 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
102 xTxHasEnded = pdTRUE;
\r
104 /* Set the pins to UART mode. */
\r
105 MCF_PAD_PUAPAR |= ( serTX_OUTPUT | serRX_INPUT );
\r
107 /* Reset the peripheral. */
\r
108 MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;
\r
109 MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;
\r
110 MCF_UART1_UCR = MCF_UART_UCR_RESET_ERROR;
\r
111 MCF_UART1_UCR = MCF_UART_UCR_RESET_BKCHGINT;
\r
112 MCF_UART1_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;
\r
114 /* Configure the UART. */
\r
115 MCF_UART1_UMR1 = serNO_PARITY | ser8DATA_BITS;
\r
116 MCF_UART1_UMR2 = ser1STOP_BIT;
\r
117 MCF_UART1_UCSR = serSYSTEM_CLOCK;
\r
119 MCF_UART1_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );
\r
120 MCF_UART1_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );
\r
123 MCF_UART1_UCR = serTX_ENABLE | serRX_ENABLE;
\r
125 /* Configure the interrupt controller. Run the UARTs above the kernel
\r
126 interrupt priority for demo purposes. */
\r
127 MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 ) << 3 );
\r
128 MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );
\r
130 /* The Tx interrupt is not enabled until there is data to send. */
\r
131 MCF_UART1_UIMR = serRX_INT;
\r
133 /* Only a single port is implemented so we don't need to return anything. */
\r
136 /*-----------------------------------------------------------*/
\r
138 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
\r
140 /* Only one port is supported. */
\r
143 /* Get the next character from the buffer. Return false if no characters
\r
144 are available or arrive before xBlockTime expires. */
\r
145 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\r
154 /*-----------------------------------------------------------*/
\r
156 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
\r
158 /* Only one port is supported. */
\r
161 /* Return false if after the block time there is no room on the Tx queue. */
\r
162 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
167 /* A critical section should not be required as xTxHasEnded will not be
\r
168 written to by the ISR if it is already 0 (is this correct?). */
\r
169 if( xTxHasEnded != pdFALSE )
\r
171 xTxHasEnded = pdFALSE;
\r
172 MCF_UART1_UIMR = serRX_INT | serTX_INT;
\r
177 /*-----------------------------------------------------------*/
\r
179 void vSerialClose( xComPortHandle xPort )
\r
183 /*-----------------------------------------------------------*/
\r
185 void __cs3_isr_interrupt_78( void )
\r
187 unsigned portCHAR ucChar;
\r
188 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;
\r
190 while( xDoneSomething != pdFALSE )
\r
192 xDoneSomething = pdFALSE;
\r
194 /* Does the tx buffer contain space? */
\r
195 if( ( MCF_UART1_USR & MCF_UART_USR_TXRDY ) != 0x00 )
\r
197 /* Are there any characters queued to be sent? */
\r
198 if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
\r
200 /* Send the next char. */
\r
201 MCF_UART1_UTB = ucChar;
\r
202 xDoneSomething = pdTRUE;
\r
206 /* Turn off the Tx interrupt until such time as another character
\r
207 is being transmitted. */
\r
208 MCF_UART1_UIMR = serRX_INT;
\r
209 xTxHasEnded = pdTRUE;
\r
213 if( MCF_UART1_USR & MCF_UART_USR_RXRDY )
\r
215 ucChar = MCF_UART1_URB;
\r
216 xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
\r
217 xDoneSomething = pdTRUE;
\r
221 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
\r