2 FreeRTOS V5.4.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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49 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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51 NOTE: This driver is primarily to test the scheduler functionality. It does
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52 not effectively use the buffers or DMA and is therefore not intended to be
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53 an example of an efficient driver. */
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55 /* Standard include file. */
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58 /* Scheduler include files. */
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59 #include "FreeRTOS.h"
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63 /* Demo app include files. */
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66 /* Hardware definitions. */
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67 #define serNO_PARITY ( ( unsigned portCHAR ) 0x02 << 3 )
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68 #define ser8DATA_BITS ( ( unsigned portCHAR ) 0x03 )
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69 #define ser1STOP_BIT ( ( unsigned portCHAR ) 0x07 )
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70 #define serSYSTEM_CLOCK ( ( unsigned portCHAR ) 0xdd )
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71 #define serTX_OUTPUT ( ( unsigned portCHAR ) 0x04 )
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72 #define serRX_INPUT ( ( unsigned portCHAR ) 0x08 )
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73 #define serTX_ENABLE ( ( unsigned portCHAR ) 0x04 )
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74 #define serRX_ENABLE ( ( unsigned portCHAR ) 0x01 )
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75 #define serTX_INT ( ( unsigned portCHAR ) 0x01 )
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76 #define serRX_INT ( ( unsigned portCHAR ) 0x02 )
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79 /* The queues used to communicate between tasks and ISR's. */
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80 static xQueueHandle xRxedChars;
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81 static xQueueHandle xCharsForTx;
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83 /* Flag used to indicate the tx status. */
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84 static portBASE_TYPE xTxHasEnded = pdTRUE;
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86 /*-----------------------------------------------------------*/
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88 /* The UART interrupt handler. */
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89 void __attribute__( ( interrupt ) ) __cs3_isr_interrupt_78( void );
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91 /*-----------------------------------------------------------*/
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93 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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95 const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );
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97 /* Create the queues used by the com test task. */
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98 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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99 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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101 xTxHasEnded = pdTRUE;
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103 /* Set the pins to UART mode. */
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104 MCF_PAD_PUAPAR |= ( serTX_OUTPUT | serRX_INPUT );
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106 /* Reset the peripheral. */
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107 MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;
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108 MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;
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109 MCF_UART1_UCR = MCF_UART_UCR_RESET_ERROR;
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110 MCF_UART1_UCR = MCF_UART_UCR_RESET_BKCHGINT;
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111 MCF_UART1_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;
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113 /* Configure the UART. */
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114 MCF_UART1_UMR1 = serNO_PARITY | ser8DATA_BITS;
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115 MCF_UART1_UMR2 = ser1STOP_BIT;
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116 MCF_UART1_UCSR = serSYSTEM_CLOCK;
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118 MCF_UART1_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );
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119 MCF_UART1_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );
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122 MCF_UART1_UCR = serTX_ENABLE | serRX_ENABLE;
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124 /* Configure the interrupt controller. Run the UARTs above the kernel
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125 interrupt priority for demo purposes. */
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126 MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 ) << 3 );
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127 MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );
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129 /* The Tx interrupt is not enabled until there is data to send. */
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130 MCF_UART1_UIMR = serRX_INT;
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132 /* Only a single port is implemented so we don't need to return anything. */
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135 /*-----------------------------------------------------------*/
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137 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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139 /* Only one port is supported. */
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142 /* Get the next character from the buffer. Return false if no characters
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143 are available or arrive before xBlockTime expires. */
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144 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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153 /*-----------------------------------------------------------*/
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155 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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157 /* Only one port is supported. */
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160 /* Return false if after the block time there is no room on the Tx queue. */
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161 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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166 /* A critical section should not be required as xTxHasEnded will not be
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167 written to by the ISR if it is already 0 (is this correct?). */
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168 if( xTxHasEnded != pdFALSE )
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170 xTxHasEnded = pdFALSE;
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171 MCF_UART1_UIMR = serRX_INT | serTX_INT;
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176 /*-----------------------------------------------------------*/
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178 void vSerialClose( xComPortHandle xPort )
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182 /*-----------------------------------------------------------*/
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184 void __cs3_isr_interrupt_78( void )
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186 unsigned portCHAR ucChar;
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187 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;
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189 while( xDoneSomething != pdFALSE )
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191 xDoneSomething = pdFALSE;
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193 /* Does the tx buffer contain space? */
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194 if( ( MCF_UART1_USR & MCF_UART_USR_TXRDY ) != 0x00 )
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196 /* Are there any characters queued to be sent? */
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197 if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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199 /* Send the next char. */
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200 MCF_UART1_UTB = ucChar;
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201 xDoneSomething = pdTRUE;
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205 /* Turn off the Tx interrupt until such time as another character
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206 is being transmitted. */
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207 MCF_UART1_UIMR = serRX_INT;
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208 xTxHasEnded = pdTRUE;
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212 if( MCF_UART1_USR & MCF_UART_USR_RXRDY )
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214 ucChar = MCF_UART1_URB;
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215 xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
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216 xDoneSomething = pdTRUE;
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220 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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