1 /* ----------------------------------------------------------------------------
\r
2 * ATMEL Microcontroller Software Support
\r
3 * ----------------------------------------------------------------------------
\r
4 * Copyright (c) 2008, Atmel Corporation
\r
6 * All rights reserved.
\r
8 * Redistribution and use in source and binary forms, with or without
\r
9 * modification, are permitted provided that the following conditions are met:
\r
11 * - Redistributions of source code must retain the above copyright notice,
\r
12 * this list of conditions and the disclaimer below.
\r
14 * Atmel's name may not be used to endorse or promote products derived from
\r
15 * this software without specific prior written permission.
\r
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
\r
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
\r
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
\r
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
\r
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
\r
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
\r
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
\r
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
\r
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
27 * ----------------------------------------------------------------------------
\r
30 //------------------------------------------------------------------------------
\r
34 /// Definition and functions for using AT91SAM9XE-related features, such
\r
35 /// has PIO pins, memories, etc.
\r
38 /// -# The code for booting the board is provided by board_cstartup.S and
\r
39 /// board_lowlevel.c.
\r
40 /// -# For using board PIOs, board characteristics (clock, etc.) and external
\r
41 /// components, see board.h.
\r
42 /// -# For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
\r
43 //------------------------------------------------------------------------------
\r
45 //------------------------------------------------------------------------------
\r
49 /// Definition of AT91SAM9XE-EK characteristics, AT91SAM9XE-dependant PIOs and
\r
50 /// external components interfacing.
\r
53 /// -# For operating frequency information, see "SAM9XE-EK - Operating frequencies".
\r
54 /// -# For using portable PIO definitions, see "SAM9XE-EK - PIO definitions".
\r
55 /// -# Several USB definitions are included here (see "SAM9XE-EK - USB device").
\r
56 /// -# For external components definitions, see "SAM79260-EK - External components".
\r
57 /// -# For memory-related definitions, see "SAM79260-EK - Memories".
\r
58 //------------------------------------------------------------------------------
\r
63 //------------------------------------------------------------------------------
\r
65 //------------------------------------------------------------------------------
\r
67 #if defined(at91sam9xe128)
\r
68 #include "at91sam9xe128/AT91SAM9XE128.h"
\r
69 #elif defined(at91sam9xe256)
\r
70 #include "at91sam9xe256/AT91SAM9XE256.h"
\r
71 #elif defined(at91sam9xe512)
\r
72 #include "at91sam9xe512/AT91SAM9XE512.h"
\r
74 #error Board does not support the specified chip.
\r
77 //------------------------------------------------------------------------------
\r
79 //------------------------------------------------------------------------------
\r
81 //------------------------------------------------------------------------------
\r
82 /// \page "SAM9XE-EK - Board Description"
\r
83 /// This page lists several definition related to the board description.
\r
88 /// Name of the board.
\r
89 #define BOARD_NAME "AT91SAM9XE-EK"
\r
90 /// Board definition.
\r
91 #define at91sam9xeek
\r
92 /// Family definition.
\r
94 //------------------------------------------------------------------------------
\r
96 //------------------------------------------------------------------------------
\r
97 /// \page "SAM9XE-EK - Operating frequencies"
\r
98 /// This page lists several definition related to the board operating frequency
\r
99 /// (when using the initialization done by board_lowlevel.c).
\r
102 /// - BOARD_MAINOSC
\r
105 /// Frequency of the board main oscillator.
\r
106 #define BOARD_MAINOSC 18432000
\r
108 /// Master clock frequency (when using board_lowlevel.c).
\r
109 #define BOARD_MCK ((18432000 * 97 / 9) / 2)
\r
110 //------------------------------------------------------------------------------
\r
112 //------------------------------------------------------------------------------
\r
113 /// \page "SAM9XE-EK - USB device"
\r
114 /// This page lists constants describing several characteristics (controller
\r
115 /// type, D+ pull-up type, etc.) of the USB device controller of the chip/board.
\r
118 /// - BOARD_USB_UDP
\r
119 /// - BOARD_USB_PULLUP_INTERNAL
\r
120 /// - BOARD_USB_NUMENDPOINTS
\r
121 /// - BOARD_USB_ENDPOINTS_MAXPACKETSIZE
\r
122 /// - BOARD_USB_ENDPOINTS_BANKS
\r
123 /// - BOARD_USB_BMATTRIBUTES
\r
125 /// Chip has a UDP controller.
\r
126 #define BOARD_USB_UDP
\r
128 /// Indicates the D+ pull-up is internal to the USB controller.
\r
129 #define BOARD_USB_PULLUP_INTERNAL
\r
131 /// Number of endpoints in the USB controller.
\r
132 #define BOARD_USB_NUMENDPOINTS 6
\r
134 /// Returns the maximum packet size of the given endpoint.
\r
135 #define BOARD_USB_ENDPOINTS_MAXPACKETSIZE(i) ((i >= 4) ? 512 : 64)
\r
136 #define BOARD_USB_ENDPOINTS_MAXPACKETSIZE_FS 64
\r
138 /// Returns the number of FIFO banks for the given endpoint.
\r
139 #define BOARD_USB_ENDPOINTS_BANKS(i) (((i == 0) || (i == 3)) ? 1 : 2)
\r
141 /// USB attributes configuration descriptor (bus or self powered, remote wakeup)
\r
142 #define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
\r
143 //------------------------------------------------------------------------------
\r
145 //------------------------------------------------------------------------------
\r
146 /// \page "SAM9XE-EK - PIO definitions"
\r
147 /// This pages lists all the pio definitions contained in board.h. The constants
\r
148 /// are named using the following convention: PIN_* for a constant which defines
\r
149 /// a single Pin instance (but may include several PIOs sharing the same
\r
150 /// controller), and PINS_* for a list of Pin instances.
\r
163 /// - PIN_PUSHBUTTON_1
\r
164 /// - PIN_PUSHBUTTON_2
\r
165 /// - PINS_PUSHBUTTONS
\r
166 /// - PUSHBUTTON_BP1
\r
167 /// - PUSHBUTTON_BP2
\r
170 /// - PIN_USART0_RXD
\r
171 /// - PIN_USART0_TXD
\r
172 /// - PIN_USART0_SCK
\r
175 /// - PIN_SPI0_MISO
\r
176 /// - PIN_SPI0_MOSI
\r
177 /// - PIN_SPI0_SPCK
\r
179 /// - PIN_SPI0_NPCS0
\r
180 /// - PIN_SPI0_NPCS1
\r
194 /// List of all DBGU pin definitions.
\r
195 #define PINS_DBGU {(1<<14) | (1<<15), AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
\r
197 /// LED #0 pin definition.
\r
198 #define PIN_LED_0 {1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
\r
199 /// LED #1 pin definition.
\r
200 #define PIN_LED_1 {1 << 6, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
\r
201 /// List of all LED definitions.
\r
202 #define PINS_LEDS PIN_LED_0, PIN_LED_1
\r
203 /// Power LED index.
\r
204 #define LED_POWER 0
\r
208 /// Push button #1 pin definition.
\r
209 #define PIN_PUSHBUTTON_1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
\r
210 /// Pusb button #2 pin definition.
\r
211 #define PIN_PUSHBUTTON_2 {1UL << 31, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
\r
212 /// List of all pushbutton pin definitions.
\r
213 #define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
\r
214 /// Push button #1 index.
\r
215 #define PUSHBUTTON_BP1 0
\r
216 /// Push button #2 index.
\r
217 #define PUSHBUTTON_BP2 1
\r
219 /// USART0 TXD pin definition.
\r
220 #define PIN_USART0_TXD {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
\r
221 /// USART0 RXD pin definition.
\r
222 #define PIN_USART0_RXD {1 << 5, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
\r
223 /// USART0 RTS pin definition.
\r
224 #define PIN_USART0_RTS {1 << 26, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
\r
225 /// USART0 CTS pin definition.
\r
226 #define PIN_USART0_CTS {1 << 27, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
\r
227 /// USART0 SCK pin definition.
\r
228 #define PIN_USART0_SCK {1UL << 31, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
230 /// SPI0 MISO pin definition.
\r
231 #define PIN_SPI0_MISO {1 << 0, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}
\r
232 /// SPI0 MOSI pin definition.
\r
233 #define PIN_SPI0_MOSI {1 << 1, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
234 /// SPI0 SPCK pin definition.
\r
235 #define PIN_SPI0_SPCK {1 << 2, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
236 /// List of SPI0 pin definitions (MISO, MOSI & SPCK).
\r
237 #define PINS_SPI0 PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK
\r
238 /// SPI0 chip select 0 pin definition.
\r
239 #define PIN_SPI0_NPCS0 {AT91C_PA3_SPI0_NPCS0, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
240 /// SPI0 chip select 1 pin definition.
\r
241 #define PIN_SPI0_NPCS1 {AT91C_PC11_SPI0_NPCS1, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
\r
243 /// SSC transmitter pins definition.
\r
244 #define PINS_SSC_TX {0x00038000, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
246 /// USB VBus monitoring pin definition.
\r
247 #define PIN_USB_VBUS {1 << 5, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
\r
249 /// List of MCI pins definitions.
\r
250 #define PINS_MCI {0x0000003B, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}, \
\r
251 {1 << 8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
253 /// TWI0 pins definition.
\r
254 #define PINS_TWI0 {0x01800000, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
\r
255 //------------------------------------------------------------------------------
\r
257 //------------------------------------------------------------------------------
\r
258 /// \page "SAM9XE-EK - External components"
\r
259 /// This page lists the definitions related to external on-board components
\r
260 /// located in the board.h file for the AT91SAM9XE-EK.
\r
262 /// !AT45 Dataflash Card (A)
\r
263 /// - BOARD_AT45_A_SPI_BASE
\r
264 /// - BOARD_AT45_A_SPI_ID
\r
265 /// - BOARD_AT45_A_SPI_PINS
\r
266 /// - BOARD_AT45_A_SPI
\r
267 /// - BOARD_AT45_A_NPCS
\r
268 /// - BOARD_AT45_A_NPCS_PIN
\r
270 /// !AT45 Dataflash (B)
\r
271 /// - BOARD_AT45_B_SPI_BASE
\r
272 /// - BOARD_AT45_B_SPI_ID
\r
273 /// - BOARD_AT45_B_SPI_PINS
\r
274 /// - BOARD_AT45_B_SPI
\r
275 /// - BOARD_AT45_B_NPCS
\r
276 /// - BOARD_AT45_B_NPCS_PIN
\r
279 /// - BOARD_SD_MCI_BASE
\r
280 /// - BOARD_SD_MCI_ID
\r
281 /// - BOARD_SD_PINS
\r
282 /// - BOARD_SD_SLOT
\r
286 /// - AT91C_BASE_EMAC
\r
287 /// - BOARD_EMAC_POWER_ALWAYS_ON
\r
288 /// - BOARD_EMAC_MODE_RMII
\r
289 /// - BOARD_EMAC_PINS
\r
290 /// - BOARD_EMAC_PIN_TEST
\r
291 /// - BOARD_EMAC_PIN_RPTR
\r
292 /// - BOARD_EMAC_RST_PINS
\r
293 /// - BOARD_EMAC_RUN_PINS
\r
296 /// Base address of SPI peripheral connected to the dataflash.
\r
297 #define BOARD_AT45_A_SPI_BASE AT91C_BASE_SPI0
\r
298 /// Identifier of SPI peripheral connected to the dataflash.
\r
299 #define BOARD_AT45_A_SPI_ID AT91C_ID_SPI0
\r
300 /// Pins of the SPI peripheral connected to the dataflash.
\r
301 #define BOARD_AT45_A_SPI_PINS PINS_SPI0
\r
302 /// Dataflahs SPI number.
\r
303 #define BOARD_AT45_A_SPI 0
\r
304 /// Chip select connected to the dataflash.
\r
305 #define BOARD_AT45_A_NPCS 0
\r
306 /// Chip select pin connected to the dataflash.
\r
307 #define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS0
\r
309 /// Base address of SPI peripheral connected to the dataflash.
\r
310 #define BOARD_AT45_B_SPI_BASE AT91C_BASE_SPI0
\r
311 /// Identifier of SPI peripheral connected to the dataflash.
\r
312 #define BOARD_AT45_B_SPI_ID AT91C_ID_SPI0
\r
313 /// Pins of the SPI peripheral connected to the dataflash.
\r
314 #define BOARD_AT45_B_SPI_PINS PINS_SPI0
\r
315 /// Dataflahs SPI number.
\r
316 #define BOARD_AT45_B_SPI 0
\r
317 /// Chip select connected to the dataflash.
\r
318 #define BOARD_AT45_B_NPCS 1
\r
319 /// Chip select pin connected to the dataflash.
\r
320 #define BOARD_AT45_B_NPCS_PIN PIN_SPI0_NPCS1
\r
322 /// Base address of SPI peripheral connected to the serialflash.
\r
323 #define BOARD_AT26_A_SPI_BASE AT91C_BASE_SPI0
\r
324 /// Identifier of SPI peripheral connected to the dataflash.
\r
325 #define BOARD_AT26_A_SPI_ID AT91C_ID_SPI0
\r
326 /// Pins of the SPI peripheral connected to the dataflash.
\r
327 #define BOARD_AT26_A_SPI_PINS PINS_SPI0
\r
328 /// Dataflahs SPI number.
\r
329 #define BOARD_AT26_A_SPI 0
\r
330 /// Chip select connected to the dataflash.
\r
331 #define BOARD_AT26_A_NPCS 0
\r
332 /// Chip select pin connected to the dataflash.
\r
333 #define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS0
\r
335 /// Base address of the MCI peripheral connected to the SD card.
\r
336 #define BOARD_SD_MCI_BASE AT91C_BASE_MCI
\r
337 /// Peripheral identifier of the MCI connected to the SD card.
\r
338 #define BOARD_SD_MCI_ID AT91C_ID_MCI
\r
339 /// MCI pins that shall be configured to access the SD card.
\r
340 #define BOARD_SD_PINS PINS_MCI
\r
341 /// MCI slot to which the SD card is connected to.
\r
342 #define BOARD_SD_SLOT MCI_SD_SLOTB
\r
344 /// Board EMAC base address
\r
345 #if !defined(AT91C_BASE_EMAC) && defined(AT91C_BASE_EMACB)
\r
346 #define AT91C_BASE_EMAC AT91C_BASE_EMACB
\r
348 /// Board EMAC power control - ALWAYS ON
\r
349 #define BOARD_EMAC_POWER_ALWAYS_ON
\r
350 /// Board EMAC work mode - RMII/MII ( 1 / 0 )
\r
351 #define BOARD_EMAC_MODE_RMII 1
\r
352 /// The PIN list of PIO for EMAC
\r
353 #define BOARD_EMAC_PINS { ((1<<19)|(1<<13)|(1<<12)|(1<<16)|(1<<15)|(1<<14)\
\r
354 |(1<<17)|(1<<18)|(1<<20)|(1<<21)|(1<<7)),\
\r
355 AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT},\
\r
356 { ((1<<11)|(1<<10)|(1<<26)|(1<<25)|(1<<27)|(1<<22)\
\r
357 |(1<<29)|(1<<28)),\
\r
358 AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
\r
359 /// The power up reset latch PIO for PHY
\r
360 #define BOARD_EMAC_PIN_TEST {(1<<17), AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
\r
361 //#define BOARD_EMAC_PIN_RMII : connected to 3v3 (RMII)
\r
362 // We force the address
\r
363 // (1<<14) PHY address 0, (1<<15) PHY address 1 (PIO A, perih A)
\r
364 // (1<<25) PHY address 2, (1<<26) PHY address 3 (PIO A, perih B)
\r
365 #define BOARD_EMAC_PINS_PHYAD { ((1<<14)|(1<<15)),\
\r
366 AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT},\
\r
367 { ((1<<25)|(1<<26)),\
\r
368 AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
\r
369 //#define BOARD_EMAC_PIN_10BT : not connected
\r
370 #define BOARD_EMAC_PIN_RPTR {(1<<27), AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
\r
371 /// The PIN Configure list for EMAC on power up reset
\r
372 #define BOARD_EMAC_RST_PINS BOARD_EMAC_PINS_PHYAD,\
\r
373 BOARD_EMAC_PIN_TEST,\
\r
374 BOARD_EMAC_PIN_RPTR
\r
375 /// The runtime pin configure list for EMAC
\r
376 #define BOARD_EMAC_RUN_PINS BOARD_EMAC_PINS
\r
378 //------------------------------------------------------------------------------
\r
380 //------------------------------------------------------------------------------
\r
381 /// \page "SAM9XE-EK - Memories"
\r
382 /// This page lists definitions related to external on-board memories.
\r
384 /// !Embedded Flash
\r
385 /// - BOARD_FLASH_EEFC
\r
388 /// - BOARD_SDRAM_SIZE
\r
392 /// - PINS_NANDFLASH
\r
393 /// - BOARD_NF_COMMAND_ADDR
\r
394 /// - BOARD_NF_ADDRESS_ADDR
\r
395 /// - BOARD_NF_DATA_ADDR
\r
396 /// - BOARD_NF_CE_PIN
\r
397 /// - BOARD_NF_RB_PIN
\r
399 /// Indicates chip has an Enhanced EFC.
\r
400 #define BOARD_FLASH_EEFC
\r
401 /// Address of the IAP function in ROM.
\r
402 #define BOARD_FLASH_IAP_ADDRESS 0x100008
\r
404 /// Board SDRAM size
\r
405 #define BOARD_SDRAM_SIZE 0x02000000
\r
406 /// List of all SDRAM pins definitions.
\r
407 #define PINS_SDRAM {0xFFFF0000, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
\r
410 /// Nandflash controller peripheral pins definition.
\r
411 #define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN
\r
412 /// Nandflash chip enable pin definition.
\r
413 #define BOARD_NF_CE_PIN {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
\r
414 /// Nandflash ready/busy pin definition.
\r
415 #define BOARD_NF_RB_PIN {1 << 13, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_PULLUP}
\r
416 /// Address for transferring command bytes to the nandflash.
\r
417 #define BOARD_NF_COMMAND_ADDR 0x40400000
\r
418 /// Address for transferring address bytes to the nandflash.
\r
419 #define BOARD_NF_ADDRESS_ADDR 0x40200000
\r
420 /// Address for transferring data bytes to the nandflash.
\r
421 #define BOARD_NF_DATA_ADDR 0x40000000
\r
423 /// Address for transferring command bytes to the norflash.
\r
424 #define BOARD_NORFLASH_ADDR 0x10000000
\r
425 //------------------------------------------------------------------------------
\r
427 #endif //#ifndef BOARD_H
\r