2 ******************************************************************************
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3 * @file stm32f10x_spi.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the SPI firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32f10x_spi.h"
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23 #include "stm32f10x_rcc.h"
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25 /** @addtogroup StdPeriph_Driver
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30 * @brief SPI driver modules
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34 /** @defgroup SPI_Private_TypesDefinitions
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43 /** @defgroup SPI_Private_Defines
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48 #define CR1_SPE_Set ((uint16_t)0x0040)
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49 #define CR1_SPE_Reset ((uint16_t)0xFFBF)
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52 #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
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53 #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
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55 /* SPI CRCNext mask */
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56 #define CR1_CRCNext_Set ((uint16_t)0x1000)
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58 /* SPI CRCEN mask */
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59 #define CR1_CRCEN_Set ((uint16_t)0x2000)
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60 #define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
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63 #define CR2_SSOE_Set ((uint16_t)0x0004)
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64 #define CR2_SSOE_Reset ((uint16_t)0xFFFB)
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66 /* SPI registers Masks */
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67 #define CR1_CLEAR_Mask ((uint16_t)0x3040)
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68 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
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70 /* SPI or I2S mode selection masks */
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71 #define SPI_Mode_Select ((uint16_t)0xF7FF)
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72 #define I2S_Mode_Select ((uint16_t)0x0800)
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78 /** @defgroup SPI_Private_Macros
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86 /** @defgroup SPI_Private_Variables
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94 /** @defgroup SPI_Private_FunctionPrototypes
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102 /** @defgroup SPI_Private_Functions
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107 * @brief Deinitializes the SPIx peripheral registers to their default
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108 * reset values (Affects also the I2Ss).
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109 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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112 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
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114 /* Check the parameters */
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115 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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117 switch (*(uint32_t*)&SPIx)
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120 /* Enable SPI1 reset state */
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121 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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122 /* Release SPI1 from reset state */
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123 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
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126 /* Enable SPI2 reset state */
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127 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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128 /* Release SPI2 from reset state */
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129 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
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132 /* Enable SPI3 reset state */
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133 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
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134 /* Release SPI3 from reset state */
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135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
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143 * @brief Initializes the SPIx peripheral according to the specified
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144 * parameters in the SPI_InitStruct.
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145 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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146 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
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147 * contains the configuration information for the specified
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151 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
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153 uint16_t tmpreg = 0;
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155 /* check the parameters */
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156 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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158 /* Check the SPI parameters */
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159 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
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160 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
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161 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
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162 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
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163 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
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164 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
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165 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
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166 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
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167 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
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168 /*---------------------------- SPIx CR1 Configuration ------------------------*/
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169 /* Get the SPIx CR1 value */
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170 tmpreg = SPIx->CR1;
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171 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
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172 tmpreg &= CR1_CLEAR_Mask;
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173 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
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174 master/salve mode, CPOL and CPHA */
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175 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
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176 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
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177 /* Set LSBFirst bit according to SPI_FirstBit value */
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178 /* Set BR bits according to SPI_BaudRatePrescaler value */
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179 /* Set CPOL bit according to SPI_CPOL value */
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180 /* Set CPHA bit according to SPI_CPHA value */
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181 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
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182 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
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183 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
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184 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
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185 /* Write to SPIx CR1 */
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186 SPIx->CR1 = tmpreg;
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188 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
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189 SPIx->I2SCFGR &= SPI_Mode_Select;
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190 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
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191 /* Write to SPIx CRCPOLY */
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192 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
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196 * @brief Initializes the SPIx peripheral according to the specified
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197 * parameters in the I2S_InitStruct.
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198 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral
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199 * (configured in I2S mode).
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200 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
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201 * contains the configuration information for the specified
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202 * SPI peripheral configured in I2S mode.
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205 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
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207 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
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209 RCC_ClocksTypeDef RCC_Clocks;
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211 /* Check the I2S parameters */
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212 assert_param(IS_SPI_23_PERIPH(SPIx));
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213 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
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214 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
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215 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
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216 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
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217 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
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218 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
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219 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
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220 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
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221 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
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222 SPIx->I2SPR = 0x0002;
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224 /* Get the I2SCFGR register value */
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225 tmpreg = SPIx->I2SCFGR;
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227 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
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228 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
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230 i2sodd = (uint16_t)0;
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231 i2sdiv = (uint16_t)2;
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233 /* If the requested audio frequency is not the default, compute the prescaler */
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236 /* Check the frame length (For the Prescaler computing) */
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237 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
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239 /* Packet length is 16 bits */
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244 /* Packet length is 32 bits */
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247 /* Get System Clock frequency */
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248 RCC_GetClocksFreq(&RCC_Clocks);
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250 /* Compute the Real divider depending on the MCLK output state with a flaoting point */
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251 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
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253 /* MCLK output is enabled */
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254 tmp = (uint16_t)(((10 * RCC_Clocks.SYSCLK_Frequency) / (256 * I2S_InitStruct->I2S_AudioFreq)) + 5);
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258 /* MCLK output is disabled */
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259 tmp = (uint16_t)(((10 * RCC_Clocks.SYSCLK_Frequency) / (32 * packetlength * I2S_InitStruct->I2S_AudioFreq)) + 5);
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262 /* Remove the flaoting point */
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265 /* Check the parity of the divider */
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266 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
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268 /* Compute the i2sdiv prescaler */
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269 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
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271 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
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272 i2sodd = (uint16_t) (i2sodd << 8);
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275 /* Test if the divider is 1 or 0 */
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276 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
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278 /* Set the default values */
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282 /* Write to SPIx I2SPR register the computed value */
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283 SPIx->I2SPR = (uint16_t)(i2sdiv | i2sodd | I2S_InitStruct->I2S_MCLKOutput);
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285 /* Configure the I2S with the SPI_InitStruct values */
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286 tmpreg |= (uint16_t)(I2S_Mode_Select | I2S_InitStruct->I2S_Mode | \
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287 I2S_InitStruct->I2S_Standard | I2S_InitStruct->I2S_DataFormat | \
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288 I2S_InitStruct->I2S_CPOL);
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290 /* Write to SPIx I2SCFGR */
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291 SPIx->I2SCFGR = tmpreg;
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295 * @brief Fills each SPI_InitStruct member with its default value.
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296 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure
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297 * which will be initialized.
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300 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
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302 /*--------------- Reset SPI init structure parameters values -----------------*/
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303 /* Initialize the SPI_Direction member */
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304 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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305 /* initialize the SPI_Mode member */
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306 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
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307 /* initialize the SPI_DataSize member */
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308 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
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309 /* Initialize the SPI_CPOL member */
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310 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
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311 /* Initialize the SPI_CPHA member */
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312 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
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313 /* Initialize the SPI_NSS member */
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314 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
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315 /* Initialize the SPI_BaudRatePrescaler member */
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316 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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317 /* Initialize the SPI_FirstBit member */
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318 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
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319 /* Initialize the SPI_CRCPolynomial member */
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320 SPI_InitStruct->SPI_CRCPolynomial = 7;
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324 * @brief Fills each I2S_InitStruct member with its default value.
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325 * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure
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326 * which will be initialized.
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329 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
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331 /*--------------- Reset I2S init structure parameters values -----------------*/
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332 /* Initialize the I2S_Mode member */
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333 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
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335 /* Initialize the I2S_Standard member */
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336 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
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338 /* Initialize the I2S_DataFormat member */
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339 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
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341 /* Initialize the I2S_MCLKOutput member */
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342 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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344 /* Initialize the I2S_AudioFreq member */
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345 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
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347 /* Initialize the I2S_CPOL member */
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348 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
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352 * @brief Enables or disables the specified SPI peripheral.
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353 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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354 * @param NewState: new state of the SPIx peripheral.
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355 * This parameter can be: ENABLE or DISABLE.
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358 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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360 /* Check the parameters */
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361 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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362 assert_param(IS_FUNCTIONAL_STATE(NewState));
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363 if (NewState != DISABLE)
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365 /* Enable the selected SPI peripheral */
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366 SPIx->CR1 |= CR1_SPE_Set;
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370 /* Disable the selected SPI peripheral */
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371 SPIx->CR1 &= CR1_SPE_Reset;
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376 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
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377 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
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378 * @param NewState: new state of the SPIx peripheral.
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379 * This parameter can be: ENABLE or DISABLE.
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382 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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384 /* Check the parameters */
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385 assert_param(IS_SPI_23_PERIPH(SPIx));
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386 assert_param(IS_FUNCTIONAL_STATE(NewState));
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387 if (NewState != DISABLE)
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389 /* Enable the selected SPI peripheral (in I2S mode) */
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390 SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
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394 /* Disable the selected SPI peripheral (in I2S mode) */
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395 SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
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400 * @brief Enables or disables the specified SPI/I2S interrupts.
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401 * @param SPIx: where x can be :
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402 * 1, 2 or 3 in SPI mode
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403 * 2 or 3 in I2S mode
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404 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be
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405 * enabled or disabled.
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406 * This parameter can be one of the following values:
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407 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
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408 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
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409 * @arg SPI_I2S_IT_ERR: Error interrupt mask
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410 * @param NewState: new state of the specified SPI/I2S interrupt.
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411 * This parameter can be: ENABLE or DISABLE.
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414 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
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416 uint16_t itpos = 0, itmask = 0 ;
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417 /* Check the parameters */
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418 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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419 assert_param(IS_FUNCTIONAL_STATE(NewState));
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420 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
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421 /* Get the SPI/I2S IT index */
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422 itpos = SPI_I2S_IT >> 4;
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423 /* Set the IT mask */
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424 itmask = (uint16_t)((uint16_t)1 << itpos);
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425 if (NewState != DISABLE)
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427 /* Enable the selected SPI/I2S interrupt */
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428 SPIx->CR2 |= itmask;
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432 /* Disable the selected SPI/I2S interrupt */
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433 SPIx->CR2 &= (uint16_t)~itmask;
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438 * @brief Enables or disables the SPIx/I2Sx DMA interface.
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439 * @param SPIx: where x can be :
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440 * 1, 2 or 3 in SPI mode
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441 * 2 or 3 in I2S mode
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442 * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request
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443 * to be enabled or disabled.
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444 * This parameter can be any combination of the following values:
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445 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
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446 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
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447 * @param NewState: new state of the selected SPI/I2S DMA transfer
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449 * This parameter can be: ENABLE or DISABLE.
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452 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
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454 /* Check the parameters */
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455 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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456 assert_param(IS_FUNCTIONAL_STATE(NewState));
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457 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
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458 if (NewState != DISABLE)
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460 /* Enable the selected SPI/I2S DMA requests */
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461 SPIx->CR2 |= SPI_I2S_DMAReq;
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465 /* Disable the selected SPI/I2S DMA requests */
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466 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
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471 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
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472 * @param SPIx: where x can be :
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473 * 1, 2 or 3 in SPI mode
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474 * 2 or 3 in I2S mode
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475 * @param Data : Data to be transmitted..
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478 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
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480 /* Check the parameters */
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481 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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483 /* Write in the DR register the data to be sent */
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488 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
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489 * @param SPIx: where x can be :
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490 * 1, 2 or 3 in SPI mode
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491 * 2 or 3 in I2S mode
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492 * @retval : The value of the received data.
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494 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
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496 /* Check the parameters */
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497 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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499 /* Return the data in the DR register */
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504 * @brief Configures internally by software the NSS pin for the selected
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506 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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507 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
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508 * This parameter can be one of the following values:
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509 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
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510 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
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513 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
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515 /* Check the parameters */
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516 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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517 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
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518 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
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520 /* Set NSS pin internally by software */
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521 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
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525 /* Reset NSS pin internally by software */
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526 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
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531 * @brief Enables or disables the SS output for the selected SPI.
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532 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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533 * @param NewState: new state of the SPIx SS output.
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534 * This parameter can be: ENABLE or DISABLE.
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537 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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539 /* Check the parameters */
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540 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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541 assert_param(IS_FUNCTIONAL_STATE(NewState));
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542 if (NewState != DISABLE)
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544 /* Enable the selected SPI SS output */
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545 SPIx->CR2 |= CR2_SSOE_Set;
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549 /* Disable the selected SPI SS output */
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550 SPIx->CR2 &= CR2_SSOE_Reset;
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555 * @brief Configures the data size for the selected SPI.
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556 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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557 * @param SPI_DataSize: specifies the SPI data size.
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558 * This parameter can be one of the following values:
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559 * @arg SPI_DataSize_16b: Set data frame format to 16bit
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560 * @arg SPI_DataSize_8b: Set data frame format to 8bit
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563 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
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565 /* Check the parameters */
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566 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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567 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
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568 /* Clear DFF bit */
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569 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
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570 /* Set new DFF bit value */
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571 SPIx->CR1 |= SPI_DataSize;
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575 * @brief Transmit the SPIx CRC value.
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576 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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579 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
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581 /* Check the parameters */
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582 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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584 /* Enable the selected SPI CRC transmission */
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585 SPIx->CR1 |= CR1_CRCNext_Set;
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589 * @brief Enables or disables the CRC value calculation of the
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590 * transfered bytes.
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591 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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592 * @param NewState: new state of the SPIx CRC value calculation.
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593 * This parameter can be: ENABLE or DISABLE.
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596 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
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598 /* Check the parameters */
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599 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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600 assert_param(IS_FUNCTIONAL_STATE(NewState));
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601 if (NewState != DISABLE)
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603 /* Enable the selected SPI CRC calculation */
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604 SPIx->CR1 |= CR1_CRCEN_Set;
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608 /* Disable the selected SPI CRC calculation */
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609 SPIx->CR1 &= CR1_CRCEN_Reset;
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614 * @brief Returns the transmit or the receive CRC register value for
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615 * the specified SPI.
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616 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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617 * @param SPI_CRC: specifies the CRC register to be read.
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618 * This parameter can be one of the following values:
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619 * @arg SPI_CRC_Tx: Selects Tx CRC register
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620 * @arg SPI_CRC_Rx: Selects Rx CRC register
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621 * @retval : The selected CRC register value..
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623 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
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625 uint16_t crcreg = 0;
\r
626 /* Check the parameters */
\r
627 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
628 assert_param(IS_SPI_CRC(SPI_CRC));
\r
629 if (SPI_CRC != SPI_CRC_Rx)
\r
631 /* Get the Tx CRC register */
\r
632 crcreg = SPIx->TXCRCR;
\r
636 /* Get the Rx CRC register */
\r
637 crcreg = SPIx->RXCRCR;
\r
639 /* Return the selected CRC register */
\r
644 * @brief Returns the CRC Polynomial register value for the specified SPI.
\r
645 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
646 * @retval : The CRC Polynomial register value.
\r
648 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
\r
650 /* Check the parameters */
\r
651 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
653 /* Return the CRC polynomial register */
\r
654 return SPIx->CRCPR;
\r
658 * @brief Selects the data transfer direction in bi-directional mode
\r
659 * for the specified SPI.
\r
660 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
661 * @param SPI_Direction: specifies the data transfer direction in
\r
662 * bi-directional mode.
\r
663 * This parameter can be one of the following values:
\r
664 * @arg SPI_Direction_Tx: Selects Tx transmission direction
\r
665 * @arg SPI_Direction_Rx: Selects Rx receive direction
\r
668 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
\r
670 /* Check the parameters */
\r
671 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
672 assert_param(IS_SPI_DIRECTION(SPI_Direction));
\r
673 if (SPI_Direction == SPI_Direction_Tx)
\r
675 /* Set the Tx only mode */
\r
676 SPIx->CR1 |= SPI_Direction_Tx;
\r
680 /* Set the Rx only mode */
\r
681 SPIx->CR1 &= SPI_Direction_Rx;
\r
686 * @brief Checks whether the specified SPI/I2S flag is set or not.
\r
687 * @param SPIx: where x can be :
\r
688 * 1, 2 or 3 in SPI mode
\r
689 * 2 or 3 in I2S mode
\r
690 * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
\r
691 * This parameter can be one of the following values:
\r
692 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
\r
693 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
\r
694 * @arg SPI_I2S_FLAG_BSY: Busy flag.
\r
695 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
\r
696 * @arg SPI_FLAG_MODF: Mode Fault flag.
\r
697 * @arg SPI_FLAG_CRCERR: CRC Error flag.
\r
698 * @arg I2S_FLAG_UDR: Underrun Error flag.
\r
699 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
\r
700 * @retval : The new state of SPI_I2S_FLAG (SET or RESET).
\r
702 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
\r
704 FlagStatus bitstatus = RESET;
\r
705 /* Check the parameters */
\r
706 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
707 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
\r
708 /* Check the status of the specified SPI/I2S flag */
\r
709 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
\r
711 /* SPI_I2S_FLAG is set */
\r
716 /* SPI_I2S_FLAG is reset */
\r
719 /* Return the SPI_I2S_FLAG status */
\r
724 * @brief Clears the SPIx CRC Error (CRCERR) flag.
\r
725 * @param SPIx: where x can be :
\r
726 * 1, 2 or 3 in SPI mode
\r
727 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
\r
728 * This function clears only CRCERR flag.
\r
730 * - OVR (OverRun error) flag is cleared by software sequence: a read
\r
731 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
\r
732 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
\r
733 * - UDR (UnderRun error) flag is cleared by a read operation to
\r
734 * SPI_SR register (SPI_I2S_GetFlagStatus()).
\r
735 * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
\r
736 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
\r
737 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
\r
740 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
\r
742 /* Check the parameters */
\r
743 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
744 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
\r
746 /* Clear the selected SPI CRC Error (CRCERR) flag */
\r
747 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
\r
751 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
\r
752 * @param SPIx: where x can be :
\r
753 * 1, 2 or 3 in SPI mode
\r
754 * 2 or 3 in I2S mode
\r
755 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
\r
756 * This parameter can be one of the following values:
\r
757 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
\r
758 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
\r
759 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
\r
760 * @arg SPI_IT_MODF: Mode Fault interrupt.
\r
761 * @arg SPI_IT_CRCERR: CRC Error interrupt.
\r
762 * @arg I2S_IT_UDR: Underrun Error interrupt.
\r
763 * @retval : The new state of SPI_I2S_IT (SET or RESET).
\r
765 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
\r
767 ITStatus bitstatus = RESET;
\r
768 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
\r
769 /* Check the parameters */
\r
770 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
771 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
\r
772 /* Get the SPI/I2S IT index */
\r
773 itpos = (uint16_t)((uint16_t)0x01 << (SPI_I2S_IT & (uint8_t)0x0F));
\r
774 /* Get the SPI/I2S IT mask */
\r
775 itmask = SPI_I2S_IT >> 4;
\r
776 /* Set the IT mask */
\r
777 itmask = (uint16_t)((uint16_t)0x01 << itmask);
\r
778 /* Get the SPI_I2S_IT enable bit status */
\r
779 enablestatus = (SPIx->CR2 & itmask) ;
\r
780 /* Check the status of the specified SPI/I2S interrupt */
\r
781 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
\r
783 /* SPI_I2S_IT is set */
\r
788 /* SPI_I2S_IT is reset */
\r
791 /* Return the SPI_I2S_IT status */
\r
796 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
\r
797 * @param SPIx: where x can be :
\r
798 * 1, 2 or 3 in SPI mode
\r
799 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
\r
800 * This function clears only CRCERR intetrrupt pending bit.
\r
802 * - OVR (OverRun Error) interrupt pending bit is cleared by software
\r
803 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
\r
804 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
\r
805 * - UDR (UnderRun Error) interrupt pending bit is cleared by a read
\r
806 * operation to SPI_SR register (SPI_I2S_GetITStatus()).
\r
807 * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
\r
808 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
\r
809 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
\r
813 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
\r
815 uint16_t itpos = 0;
\r
816 /* Check the parameters */
\r
817 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
818 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
\r
819 /* Get the SPI IT index */
\r
820 itpos = (uint16_t)((uint16_t)0x01 << (SPI_I2S_IT & (uint8_t)0x0F));
\r
821 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
\r
822 SPIx->SR = (uint16_t)~itpos;
\r
836 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
\r