2 ******************************************************************************
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3 * @file stm32l1xx_pwr.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the PWR firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32l1xx_pwr.h"
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23 #include "stm32l1xx_rcc.h"
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25 /** @addtogroup STM32L1xx_StdPeriph_Driver
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30 * @brief PWR driver modules
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34 /** @defgroup PWR_Private_TypesDefinitions
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42 /** @defgroup PWR_Private_Defines
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46 /* --------- PWR registers bit address in the alias region ---------- */
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47 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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49 /* --- CR Register ---*/
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51 /* Alias word address of DBP bit */
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52 #define CR_OFFSET (PWR_OFFSET + 0x00)
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53 #define DBP_BitNumber 0x08
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54 #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
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56 /* Alias word address of PVDE bit */
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57 #define PVDE_BitNumber 0x04
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58 #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
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60 /* Alias word address of ULP bit */
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61 #define ULP_BitNumber 0x09
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62 #define CR_ULP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ULP_BitNumber * 4))
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64 /* Alias word address of FWU bit */
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65 #define FWU_BitNumber 0x0A
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66 #define CR_FWU_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FWU_BitNumber * 4))
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68 /* --- CSR Register ---*/
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70 /* Alias word address of EWUP bit */
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71 #define CSR_OFFSET (PWR_OFFSET + 0x04)
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72 #define EWUP_BitNumber 0x08
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73 #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
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75 /* ------------------ PWR registers bit mask ------------------------ */
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77 /* CR register bit mask */
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78 #define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
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79 #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
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80 #define CR_VOS_MASK ((uint32_t)0xFFFFE7FF)
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86 /** @defgroup PWR_Private_Macros
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94 /** @defgroup PWR_Private_Variables
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102 /** @defgroup PWR_Private_FunctionPrototypes
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110 /** @defgroup PWR_Private_Functions
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115 * @brief Deinitializes the PWR peripheral registers to their default reset values.
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119 void PWR_DeInit(void)
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121 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
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122 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
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126 * @brief Enables or disables access to the RTC and backup registers.
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127 * @param NewState: new state of the access to the RTC and backup registers.
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128 * This parameter can be: ENABLE or DISABLE.
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131 void PWR_RTCAccessCmd(FunctionalState NewState)
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133 /* Check the parameters */
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134 assert_param(IS_FUNCTIONAL_STATE(NewState));
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136 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
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140 * @brief Enables or disables the Power Voltage Detector(PVD).
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141 * @param NewState: new state of the PVD.
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142 * This parameter can be: ENABLE or DISABLE.
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145 void PWR_PVDCmd(FunctionalState NewState)
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147 /* Check the parameters */
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148 assert_param(IS_FUNCTIONAL_STATE(NewState));
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150 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
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154 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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155 * @param PWR_PVDLevel: specifies the PVD detection level
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156 * This parameter can be one of the following values:
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157 * @arg PWR_PVDLevel_0: PVD detection level set to 1.9V
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158 * @arg PWR_PVDLevel_1: PVD detection level set to 2.1V
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159 * @arg PWR_PVDLevel_2: PVD detection level set to 2.3V
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160 * @arg PWR_PVDLevel_3: PVD detection level set to 2.5V
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161 * @arg PWR_PVDLevel_4: PVD detection level set to 2.7V
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162 * @arg PWR_PVDLevel_5: PVD detection level set to 2.9V
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163 * @arg PWR_PVDLevel_6: PVD detection level set to 3.1V
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164 * @arg PWR_PVDLevel_7: External input analog voltage (Compare internally to VREFINT)
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167 void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
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169 uint32_t tmpreg = 0;
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171 /* Check the parameters */
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172 assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
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176 /* Clear PLS[7:5] bits */
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177 tmpreg &= CR_PLS_MASK;
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179 /* Set PLS[7:5] bits according to PWR_PVDLevel value */
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180 tmpreg |= PWR_PVDLevel;
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182 /* Store the new value */
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187 * @brief Enables or disables the WakeUp Pin functionality.
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188 * @param PWR_WakeUpPin: specifies the WakeUpPin.
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189 * This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3.
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190 * @param NewState: new state of the WakeUp Pin functionality.
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191 * This parameter can be: ENABLE or DISABLE.
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194 void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
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196 __IO uint32_t tmp = 0;
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198 /* Check the parameters */
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199 assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
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201 assert_param(IS_FUNCTIONAL_STATE(NewState));
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203 tmp = CSR_EWUP_BB + PWR_WakeUpPin;
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205 *(__IO uint32_t *) (tmp) = (uint32_t)NewState;
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209 * @brief Enables or disables the Fast WakeUp from Ultra Low Power mode.
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210 * @param NewState: new state of the Fast WakeUp functionality.
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211 * This parameter can be: ENABLE or DISABLE.
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214 void PWR_FastWakeUpCmd(FunctionalState NewState)
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216 /* Check the parameters */
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217 assert_param(IS_FUNCTIONAL_STATE(NewState));
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219 *(__IO uint32_t *) CR_FWU_BB = (uint32_t)NewState;
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223 * @brief Enables or disables the Ultra Low Power mode.
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224 * @param NewState: new state of the Ultra Low Power mode.
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225 * This parameter can be: ENABLE or DISABLE.
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228 void PWR_UltraLowPowerCmd(FunctionalState NewState)
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230 /* Check the parameters */
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231 assert_param(IS_FUNCTIONAL_STATE(NewState));
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233 *(__IO uint32_t *) CR_ULP_BB = (uint32_t)NewState;
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237 * @brief Configures the voltage scaling range.
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238 * @param PWR_VoltageScaling: specifies the voltage scaling range.
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239 * This parameter can be:
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240 * @arg PWR_VoltageScaling_Range1: Voltage Scaling Range 1
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241 * @arg PWR_VoltageScaling_Range2: Voltage Scaling Range 2
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242 * @arg PWR_VoltageScaling_Range3: Voltage Scaling Range 3
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245 void PWR_VoltageScalingConfig(uint32_t PWR_VoltageScaling)
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249 /* Check the parameters */
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250 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(PWR_VoltageScaling));
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254 tmp &= CR_VOS_MASK;
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255 tmp |= PWR_VoltageScaling;
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257 PWR->CR = tmp & 0xFFFFFFF3;
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262 * @brief Enters/Exits the Low Power Run mode.
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263 * @param NewState: new state of the Low Power Run mode.
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264 * This parameter can be: ENABLE or DISABLE.
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267 void PWR_EnterLowPowerRunMode(FunctionalState NewState)
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269 /* Check the parameters */
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270 assert_param(IS_FUNCTIONAL_STATE(NewState));
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272 if (NewState != DISABLE)
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274 PWR->CR |= PWR_CR_LPSDSR;
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275 PWR->CR |= PWR_CR_LPRUN;
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279 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_LPRUN);
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280 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_LPSDSR);
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285 * @brief Enters Sleep mode.
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286 * @param PWR_Regulator: specifies the regulator state in Sleep mode.
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287 * This parameter can be one of the following values:
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288 * @arg PWR_Regulator_ON: Sleep mode with regulator ON
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289 * @arg PWR_Regulator_LowPower: Sleep mode with regulator in low power mode
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290 * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
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291 * This parameter can be one of the following values:
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292 * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
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293 * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
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296 void PWR_EnterSleepMode(uint32_t PWR_Regulator, uint8_t PWR_SLEEPEntry)
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298 uint32_t tmpreg = 0;
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300 /* Check the parameters */
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301 assert_param(IS_PWR_REGULATOR(PWR_Regulator));
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303 assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
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305 /* Select the regulator state in Sleep mode ---------------------------------*/
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308 /* Clear PDDS and LPDSR bits */
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309 tmpreg &= CR_DS_MASK;
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311 /* Set LPDSR bit according to PWR_Regulator value */
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312 tmpreg |= PWR_Regulator;
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314 /* Store the new value */
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317 /* Clear SLEEPDEEP bit of Cortex System Control Register */
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318 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
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320 /* Select SLEEP mode entry -------------------------------------------------*/
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321 if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
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323 /* Request Wait For Interrupt */
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328 /* Request Wait For Event */
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334 * @brief Enters STOP mode.
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335 * @param PWR_Regulator: specifies the regulator state in STOP mode.
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336 * This parameter can be one of the following values:
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337 * @arg PWR_Regulator_ON: STOP mode with regulator ON
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338 * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
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339 * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
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340 * This parameter can be one of the following values:
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341 * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
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342 * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
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345 void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
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347 uint32_t tmpreg = 0;
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349 /* Check the parameters */
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350 assert_param(IS_PWR_REGULATOR(PWR_Regulator));
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351 assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
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353 /* Select the regulator state in STOP mode ---------------------------------*/
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355 /* Clear PDDS and LPDSR bits */
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356 tmpreg &= CR_DS_MASK;
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358 /* Set LPDSR bit according to PWR_Regulator value */
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359 tmpreg |= PWR_Regulator;
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361 /* Store the new value */
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364 /* Set SLEEPDEEP bit of Cortex System Control Register */
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365 SCB->SCR |= SCB_SCR_SLEEPDEEP;
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367 /* Select STOP mode entry --------------------------------------------------*/
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368 if(PWR_STOPEntry == PWR_STOPEntry_WFI)
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370 /* Request Wait For Interrupt */
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375 /* Request Wait For Event */
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378 /* Reset SLEEPDEEP bit of Cortex System Control Register */
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379 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
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383 * @brief Enters STANDBY mode.
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387 void PWR_EnterSTANDBYMode(void)
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389 /* Clear Wake-up flag */
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390 PWR->CR |= PWR_CR_CWUF;
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392 /* Select STANDBY mode */
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393 PWR->CR |= PWR_CR_PDDS;
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395 /* Set SLEEPDEEP bit of Cortex System Control Register */
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396 SCB->SCR |= SCB_SCR_SLEEPDEEP;
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398 /* This option is used to ensure that store operations are completed */
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399 #if defined ( __CC_ARM )
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402 /* Request Wait For Interrupt */
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407 * @brief Checks whether the specified PWR flag is set or not.
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408 * @param PWR_FLAG: specifies the flag to check.
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409 * This parameter can be one of the following values:
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410 * @arg PWR_FLAG_WU: Wake Up flag
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411 * @arg PWR_FLAG_SB: StandBy flag
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412 * @arg PWR_FLAG_PVDO: PVD Output
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413 * @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag
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414 * @arg PWR_FLAG_VOS: Voltage Scaling select flag
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415 * @arg PWR_FLAG_REGLP: Regulator LP flag
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416 * @retval The new state of PWR_FLAG (SET or RESET).
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418 FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
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420 FlagStatus bitstatus = RESET;
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421 /* Check the parameters */
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422 assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
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424 if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
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432 /* Return the flag status */
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437 * @brief Clears the PWR's pending flags.
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438 * @param PWR_FLAG: specifies the flag to clear.
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439 * This parameter can be one of the following values:
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440 * @arg PWR_FLAG_WU: Wake Up flag
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441 * @arg PWR_FLAG_SB: StandBy flag
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444 void PWR_ClearFlag(uint32_t PWR_FLAG)
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446 /* Check the parameters */
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447 assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
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449 PWR->CR |= PWR_FLAG << 2;
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464 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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