1 //*******************************************************************************
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2 // Provides Functions to Initialize the UCS/FLL and clock sources
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10 // V1.0 Initial Version
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11 // V1.1 Added timeout function
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12 // V1.1 Added parameter for XTDrive
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13 //*******************************************************************************
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20 #include "hal_macros.h"
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22 /*************************************************************************
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24 **************************************************************************/
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26 /* Select source for FLLREF e.g. SELECT_FLLREF(SELREF__XT1CLK) */
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27 #define SELECT_FLLREF(source) st(UCSCTL3 = (UCSCTL3 & ~(SELREF_7)) | (source);)
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28 /* Select source for ACLK e.g. SELECT_ACLK(SELA__XT1CLK) */
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29 #define SELECT_ACLK(source) st(UCSCTL4 = (UCSCTL4 & ~(SELA_7)) | (source);)
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30 /* Select source for MCLK e.g. SELECT_MCLK(SELM__XT2CLK) */
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31 #define SELECT_MCLK(source) st(UCSCTL4 = (UCSCTL4 & ~(SELM_7)) | (source);)
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32 /* Select source for SMCLK e.g. SELECT_SMCLK(SELS__XT2CLK) */
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33 #define SELECT_SMCLK(source) st(UCSCTL4 = (UCSCTL4 & ~(SELS_7)) | (source);)
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34 /* Select source for MCLK and SMCLK e.g. SELECT_MCLK_SMCLK(SELM__DCOCLK + SELS__DCOCLK) */
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35 #define SELECT_MCLK_SMCLK(sources) st(UCSCTL4 = (UCSCTL4 & ~(SELM_7 + SELS_7)) | (sources);)
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38 #define ACLK_DIV(x) st(UCSCTL5 = (UCSCTL5 & ~(DIVA_7)) | (DIVA__##x);)
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40 #define MCLK_DIV(x) st(UCSCTL5 = (UCSCTL5 & ~(DIVM_7)) | (DIVM__##x);)
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42 #define SMCLK_DIV(x) st(UCSCTL5 = (UCSCTL5 & ~(DIVS_7)) | (DIVS__##x);)
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43 /* Select divider for FLLREF e.g. SELECT_FLLREFDIV(2) */
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44 #define SELECT_FLLREFDIV(x) st(UCSCTL3 = (UCSCTL3 & ~(FLLREFDIV_7))|(FLLREFDIV__##x);)
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46 //************************************************************************
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48 //************************************************************************
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50 #define UCS_STATUS_OK 0
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51 #define UCS_STATUS_ERROR 1
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53 //====================================================================
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55 * Startup routine for 32kHz Cristal on LFXT1
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57 * \param xtdrive: Bits defining the LFXT drive mode after startup
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60 extern void LFXT_Start(uint16_t xtdrive);
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62 //====================================================================
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64 * Startup routine for 32kHz Cristal on LFXT1 with timeout counter
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66 * \param xtdrive: Bits defining the LFXT drive mode after startup
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67 * \param timeout: value for the timeout counter
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70 extern uint16_t LFXT_Start_Timeout(uint16_t xtdrive, uint16_t timeout);
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72 //====================================================================
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74 * Startup routine for XT1
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76 * \param xtdrive: Bits defining the XT drive mode
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79 extern void XT1_Start(uint16_t xtdrive);
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81 //====================================================================
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83 * Startup routine for XT1 with timeout counter
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85 * \param xtdrive: Bits defining the XT drive mode
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86 * \param timeout: value for the timeout counter
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89 extern uint16_t XT1_Start_Timeout(uint16_t xtdrive, uint16_t timeout);
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91 //====================================================================
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93 * Use XT1 in Bypasss mode
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96 extern void XT1_Bypass(void);
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98 //====================================================================
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100 * Startup routine for XT2
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102 * \param xtdrive: Bits defining the XT drive mode
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105 extern void XT2_Start(uint16_t xtdrive);
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107 //====================================================================
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109 * Startup routine for XT2 with timeout counter
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111 * \param xtdrive: Bits defining the XT drive mode
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112 * \param timeout: value for the timeout counter
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115 extern uint16_t XT2_Start_Timeout(uint16_t xtdrive, uint16_t timeout);
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117 //====================================================================
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119 * Use XT2 in Bypasss mode for MCLK
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122 extern void XT2_Bypass(void);
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124 //====================================================================
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126 * Initializes FLL of the UCS and wait till settled
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128 * \param fsystem required system frequency (MCLK) in kHz
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129 * \param ratio ratio between fsystem and FLLREFCLK
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131 extern void Init_FLL_Settle(uint16_t fsystem, uint16_t ratio);
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134 //====================================================================
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136 * Initializes FLL of the UCS
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138 * \param fsystem required system frequency (MCLK) in kHz
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139 * \param ratio ratio between fsystem and FLLREFCLK
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141 static void Init_FLL(uint16_t fsystem, uint16_t ratio);
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143 #endif /* __hal_UCS */
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