1 #################################################################
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2 # Makefile generated by Xilinx Platform Studio
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3 # Project:C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_SP605\RTOSDemo.xmp
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5 # WARNING : This file will be re-generated every time a command
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6 # to run a make target is invoked. So, any changes made to this
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7 # file manually, will be lost when make is invoked next.
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8 #################################################################
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12 XILINX_EDK_DIR = C:/devtools/Xilinx/13.1/ISE_DS/EDK
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16 MHSFILE = RTOSDemo.mhs
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18 FPGA_ARCH = spartan6
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20 DEVICE = xc6slx45tfgg484-3
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23 GLOBAL_SEARCHPATHOPT =
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24 PROJECT_SEARCHPATHOPT =
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26 SEARCHPATHOPT = $(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT)
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30 PLATGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(SUBMODULE_OPT) -msg __xps/ise/xmsgprops.lst
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32 OBSERVE_PAR_OPTIONS = -error yes
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34 MICROBLAZE_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop.elf
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35 MICROBLAZE_BOOTLOOP_LE = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop_le.elf
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36 PPC405_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc405/ppc_bootloop.elf
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37 PPC440_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc440/ppc440_bootloop.elf
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38 BOOTLOOP_DIR = bootloops
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40 MICROBLAZE_0_BOOTLOOP = $(BOOTLOOP_DIR)/microblaze_0.elf
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42 BRAMINIT_ELF_IMP_FILES = $(MICROBLAZE_0_BOOTLOOP)
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43 BRAMINIT_ELF_IMP_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)
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45 BRAMINIT_ELF_SIM_FILES = $(MICROBLAZE_0_BOOTLOOP)
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46 BRAMINIT_ELF_SIM_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)
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48 SIM_CMD = isim_RTOSDemo
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50 BEHAVIORAL_SIM_SCRIPT = simulation/behavioral/$(SYSTEM)_setup.tcl
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52 STRUCTURAL_SIM_SCRIPT = simulation/structural/$(SYSTEM)_setup.tcl
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54 TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.tcl
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56 DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)
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58 MIX_LANG_SIM_OPT = -mixed yes
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60 SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_SIM_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -s isim
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63 CORE_STATE_DEVELOPMENT_FILES =
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65 WRAPPER_NGC_FILES = implementation/axi4_0_wrapper.ngc \
66 implementation/axi4lite_0_wrapper.ngc \
67 implementation/microblaze_0_wrapper.ngc \
68 implementation/microblaze_0_ilmb_wrapper.ngc \
69 implementation/microblaze_0_dlmb_wrapper.ngc \
70 implementation/microblaze_0_i_bram_ctrl_wrapper.ngc \
71 implementation/microblaze_0_d_bram_ctrl_wrapper.ngc \
72 implementation/microblaze_0_bram_block_wrapper.ngc \
73 implementation/proc_sys_reset_0_wrapper.ngc \
74 implementation/clock_generator_0_wrapper.ngc \
75 implementation/debug_module_wrapper.ngc \
76 implementation/rs232_uart_1_wrapper.ngc \
77 implementation/leds_4bits_wrapper.ngc \
78 implementation/push_buttons_4bits_wrapper.ngc \
79 implementation/ethernet_lite_wrapper.ngc \
80 implementation/axi_timer_0_wrapper.ngc \
81 implementation/axi_bram_ctrl_0_wrapper.ngc \
82 implementation/axi_bram_ctrl_0_bram_block_wrapper.ngc \
83 implementation/microblaze_0_intc_wrapper.ngc
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85 POSTSYN_NETLIST = implementation/$(SYSTEM).ngc
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87 SYSTEM_BIT = implementation/$(SYSTEM).bit
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89 DOWNLOAD_BIT = implementation/download.bit
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91 SYSTEM_ACE = implementation/$(SYSTEM).ace
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93 UCF_FILE = data/RTOSDemo.ucf
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95 BMM_FILE = implementation/$(SYSTEM).bmm
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97 BITGEN_UT_FILE = etc/bitgen.ut
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99 XFLOW_OPT_FILE = etc/fast_runtime.opt
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100 XFLOW_DEPENDENCY = __xps/xpsxflow.opt $(XFLOW_OPT_FILE)
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102 XPLORER_DEPENDENCY = __xps/xplorer.opt
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103 XPLORER_OPTIONS = -p $(DEVICE) -uc $(SYSTEM).ucf -bm $(SYSTEM).bmm -max_runs 7
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105 FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(XFLOW_DEPENDENCY)
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107 SDK_EXPORT_DIR = SDK\SDK_Export\hw
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108 SYSTEM_HW_HANDOFF = $(SDK_EXPORT_DIR)/$(SYSTEM).xml
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109 SYSTEM_HW_HANDOFF_BIT = $(SDK_EXPORT_DIR)/$(SYSTEM).bit
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110 SYSTEM_HW_HANDOFF_BMM = $(SDK_EXPORT_DIR)/$(SYSTEM)_bd.bmm
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111 SYSTEM_HW_HANDOFF_DEP = $(SYSTEM_HW_HANDOFF) $(SYSTEM_HW_HANDOFF_BIT) $(SYSTEM_HW_HANDOFF_BMM)
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