1 <HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
2 <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
3 <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
4 <TR ALIGN=CENTER BGCOLOR='#99CCFF'>
5 <TD ALIGN=CENTER COLSPAN='4'><B>Project Status (05/30/2011 - 22:14:08)</B></TD></TR>
7 <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
9 <TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>
10 <TD>Programming File Generated</TD>
13 <TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
15 <TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
20 <TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>EDK 13.1</TD>
21 <TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
22 <TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/*.xmsgs?&DataKey=Warning'>151 Warnings (151 new)</A></TD>
28 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
29 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>XPS Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKReports"><B>[-]</B></a></TD></TR>
30 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Generated</B></TD>
31 <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
32 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\platgen.log'>Platgen Log File</A></TD><TD>Mon 30. May 22:03:50 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Warning'>8 Warnings (8 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Info'>35 Infos (35 new)</A></TD></TR>
33 <TR ALIGN=LEFT><TD>Libgen Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
34 <TR ALIGN=LEFT><TD>Simgen Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
35 <TR ALIGN=LEFT><TD>BitInit Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
36 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\system.log'>System Log File</A></TD><TD>Mon 30. May 22:14:06 2011</TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
38 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
39 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>XPS Synthesis Summary (estimated values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKSynthesisSumary"><B>[-]</B></a></TD></TR>
40 <TR BGCOLOR='#FFFF99'><TD><B>Report</B></TD><TD><B>Generated</B></TD><TD><B>Flip Flops Used</B></TD><TD><B>LUTs Used</B></TD><TD><B>BRAMS Used</B></TD><TD COLSPAN='2'><B>Errors</B></TD></TR>
41 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\system_xst.srp'>system</A></TD><TD>Mon 30. May 22:04:22 2011</TD><TD ALIGN=RIGHT>8098</TD><TD ALIGN=RIGHT>8082</TD><TD ALIGN=RIGHT>26</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
42 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_intc_wrapper_xst.srp'>microblaze_0_intc_wrapper</A></TD><TD>Mon 30. May 22:03:25 2011</TD><TD ALIGN=RIGHT>72</TD><TD ALIGN=RIGHT>88</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
43 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\axi_timer_0_wrapper_xst.srp'>axi_timer_0_wrapper</A></TD><TD>Mon 30. May 22:03:17 2011</TD><TD ALIGN=RIGHT>260</TD><TD ALIGN=RIGHT>272</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
44 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\ethernet_lite_wrapper_xst.srp'>ethernet_lite_wrapper</A></TD><TD>Mon 30. May 22:03:06 2011</TD><TD ALIGN=RIGHT>491</TD><TD ALIGN=RIGHT>701</TD><TD ALIGN=RIGHT>4</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
45 <TR ALIGN=LEFT><TD>ethernet_lite_wrapper_fifo_generator_v8_1_fifo_generator_v8_1_xst_1</TD><TD>Mon 30. May 22:02:50 2011</TD><TD ALIGN=RIGHT>71</TD><TD ALIGN=RIGHT>44</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
46 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\mcb_ddr3_wrapper_xst.srp'>mcb_ddr3_wrapper</A></TD><TD>Mon 30. May 22:01:44 2011</TD><TD ALIGN=RIGHT>372</TD><TD ALIGN=RIGHT>689</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
47 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\push_buttons_4bits_wrapper_xst.srp'>push_buttons_4bits_wrapper</A></TD><TD>Mon 30. May 22:01:21 2011</TD><TD ALIGN=RIGHT>72</TD><TD ALIGN=RIGHT>85</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
48 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\leds_4bits_wrapper_xst.srp'>leds_4bits_wrapper</A></TD><TD>Mon 30. May 22:01:11 2011</TD><TD ALIGN=RIGHT>33</TD><TD ALIGN=RIGHT>41</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
49 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\rs232_uart_1_wrapper_xst.srp'>rs232_uart_1_wrapper</A></TD><TD>Mon 30. May 22:01:01 2011</TD><TD ALIGN=RIGHT>84</TD><TD ALIGN=RIGHT>102</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
50 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\debug_module_wrapper_xst.srp'>debug_module_wrapper</A></TD><TD>Mon 30. May 22:00:52 2011</TD><TD ALIGN=RIGHT>131</TD><TD ALIGN=RIGHT>142</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
51 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\clock_generator_0_wrapper_xst.srp'>clock_generator_0_wrapper</A></TD><TD>Mon 30. May 22:00:44 2011</TD><TD> </TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
52 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\proc_sys_reset_0_wrapper_xst.srp'>proc_sys_reset_0_wrapper</A></TD><TD>Mon 30. May 22:00:39 2011</TD><TD ALIGN=RIGHT>69</TD><TD ALIGN=RIGHT>55</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
53 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_bram_block_wrapper_xst.srp'>microblaze_0_bram_block_wrapper</A></TD><TD>Mon 30. May 22:00:33 2011</TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT>4</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
54 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_d_bram_ctrl_wrapper_xst.srp'>microblaze_0_d_bram_ctrl_wrapper</A></TD><TD>Mon 30. May 22:00:27 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
55 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_i_bram_ctrl_wrapper_xst.srp'>microblaze_0_i_bram_ctrl_wrapper</A></TD><TD>Mon 30. May 22:00:22 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
56 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_dlmb_wrapper_xst.srp'>microblaze_0_dlmb_wrapper</A></TD><TD>Mon 30. May 22:00:16 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
57 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_ilmb_wrapper_xst.srp'>microblaze_0_ilmb_wrapper</A></TD><TD>Mon 30. May 22:00:11 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
58 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\microblaze_0_wrapper_xst.srp'>microblaze_0_wrapper</A></TD><TD>Mon 30. May 22:00:06 2011</TD><TD ALIGN=RIGHT>2388</TD><TD ALIGN=RIGHT>3217</TD><TD ALIGN=RIGHT>18</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
59 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\axi4lite_0_wrapper_xst.srp'>axi4lite_0_wrapper</A></TD><TD>Mon 30. May 21:59:15 2011</TD><TD ALIGN=RIGHT>2720</TD><TD ALIGN=RIGHT>1760</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
60 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605/synthesis\axi4_0_wrapper_xst.srp'>axi4_0_wrapper</A></TD><TD>Mon 30. May 21:58:52 2011</TD><TD ALIGN=RIGHT>1258</TD><TD ALIGN=RIGHT>828</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
62 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
63 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>Device Utilization Summary (actual values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DeviceUtilizationSummary"><B>[-]</B></a></TD></TR>
64 <TR ALIGN=CENTER BGCOLOR='#FFFF99'>
65 <TD ALIGN=LEFT><B>Slice Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD COLSPAN='2'><B>Note(s)</B></TD>
67 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Registers</TD>
68 <TD ALIGN=RIGHT>5,838</TD>
69 <TD ALIGN=RIGHT>54,576</TD>
70 <TD ALIGN=RIGHT>10%</TD>
71 <TD COLSPAN='2'> </TD>
73 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Flip Flops</TD>
74 <TD ALIGN=RIGHT>5,830</TD>
77 <TD COLSPAN='2'> </TD>
79 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Latches</TD>
80 <TD ALIGN=RIGHT>0</TD>
83 <TD COLSPAN='2'> </TD>
85 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Latch-thrus</TD>
86 <TD ALIGN=RIGHT>0</TD>
89 <TD COLSPAN='2'> </TD>
91 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as AND/OR logics</TD>
92 <TD ALIGN=RIGHT>8</TD>
95 <TD COLSPAN='2'> </TD>
97 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD>
98 <TD ALIGN=RIGHT>6,093</TD>
99 <TD ALIGN=RIGHT>27,288</TD>
100 <TD ALIGN=RIGHT>22%</TD>
101 <TD COLSPAN='2'> </TD>
103 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as logic</TD>
104 <TD ALIGN=RIGHT>5,529</TD>
105 <TD ALIGN=RIGHT>27,288</TD>
106 <TD ALIGN=RIGHT>20%</TD>
107 <TD COLSPAN='2'> </TD>
109 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
110 <TD ALIGN=RIGHT>3,953</TD>
113 <TD COLSPAN='2'> </TD>
115 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
116 <TD ALIGN=RIGHT>216</TD>
119 <TD COLSPAN='2'> </TD>
121 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
122 <TD ALIGN=RIGHT>1,360</TD>
125 <TD COLSPAN='2'> </TD>
127 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ROM</TD>
128 <TD ALIGN=RIGHT>0</TD>
131 <TD COLSPAN='2'> </TD>
133 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Memory</TD>
134 <TD ALIGN=RIGHT>358</TD>
135 <TD ALIGN=RIGHT>6,408</TD>
136 <TD ALIGN=RIGHT>5%</TD>
137 <TD COLSPAN='2'> </TD>
139 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Dual Port RAM</TD>
140 <TD ALIGN=RIGHT>96</TD>
143 <TD COLSPAN='2'> </TD>
145 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
146 <TD ALIGN=RIGHT>4</TD>
149 <TD COLSPAN='2'> </TD>
151 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
152 <TD ALIGN=RIGHT>1</TD>
155 <TD COLSPAN='2'> </TD>
157 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
158 <TD ALIGN=RIGHT>91</TD>
161 <TD COLSPAN='2'> </TD>
163 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Single Port RAM</TD>
164 <TD ALIGN=RIGHT>4</TD>
167 <TD COLSPAN='2'> </TD>
169 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
170 <TD ALIGN=RIGHT>4</TD>
173 <TD COLSPAN='2'> </TD>
175 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
176 <TD ALIGN=RIGHT>0</TD>
179 <TD COLSPAN='2'> </TD>
181 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
182 <TD ALIGN=RIGHT>0</TD>
185 <TD COLSPAN='2'> </TD>
187 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Shift Register</TD>
188 <TD ALIGN=RIGHT>258</TD>
191 <TD COLSPAN='2'> </TD>
193 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
194 <TD ALIGN=RIGHT>157</TD>
197 <TD COLSPAN='2'> </TD>
199 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
200 <TD ALIGN=RIGHT>7</TD>
203 <TD COLSPAN='2'> </TD>
205 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
206 <TD ALIGN=RIGHT>94</TD>
209 <TD COLSPAN='2'> </TD>
211 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used exclusively as route-thrus</TD>
212 <TD ALIGN=RIGHT>206</TD>
215 <TD COLSPAN='2'> </TD>
217 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with same-slice register load</TD>
218 <TD ALIGN=RIGHT>195</TD>
221 <TD COLSPAN='2'> </TD>
223 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with same-slice carry load</TD>
224 <TD ALIGN=RIGHT>11</TD>
227 <TD COLSPAN='2'> </TD>
229 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with other load</TD>
230 <TD ALIGN=RIGHT>0</TD>
233 <TD COLSPAN='2'> </TD>
235 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
236 <TD ALIGN=RIGHT>2,603</TD>
237 <TD ALIGN=RIGHT>6,822</TD>
238 <TD ALIGN=RIGHT>38%</TD>
239 <TD COLSPAN='2'> </TD>
241 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD>
242 <TD ALIGN=RIGHT>7,539</TD>
245 <TD COLSPAN='2'> </TD>
247 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused Flip Flop</TD>
248 <TD ALIGN=RIGHT>2,471</TD>
249 <TD ALIGN=RIGHT>7,539</TD>
250 <TD ALIGN=RIGHT>32%</TD>
251 <TD COLSPAN='2'> </TD>
253 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused LUT</TD>
254 <TD ALIGN=RIGHT>1,446</TD>
255 <TD ALIGN=RIGHT>7,539</TD>
256 <TD ALIGN=RIGHT>19%</TD>
257 <TD COLSPAN='2'> </TD>
259 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of fully used LUT-FF pairs</TD>
260 <TD ALIGN=RIGHT>3,622</TD>
261 <TD ALIGN=RIGHT>7,539</TD>
262 <TD ALIGN=RIGHT>48%</TD>
263 <TD COLSPAN='2'> </TD>
265 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of unique control sets</TD>
266 <TD ALIGN=RIGHT>414</TD>
269 <TD COLSPAN='2'> </TD>
271 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of slice register sites lost<BR> to control set restrictions</TD>
272 <TD ALIGN=RIGHT>1,619</TD>
273 <TD ALIGN=RIGHT>54,576</TD>
274 <TD ALIGN=RIGHT>2%</TD>
275 <TD COLSPAN='2'> </TD>
277 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded <A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system_map.xrpt?&DataKey=IOBProperties'>IOBs</A></TD>
278 <TD ALIGN=RIGHT>78</TD>
279 <TD ALIGN=RIGHT>296</TD>
280 <TD ALIGN=RIGHT>26%</TD>
281 <TD COLSPAN='2'> </TD>
283 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of LOCed IOBs</TD>
284 <TD ALIGN=RIGHT>78</TD>
285 <TD ALIGN=RIGHT>78</TD>
286 <TD ALIGN=RIGHT>100%</TD>
287 <TD COLSPAN='2'> </TD>
289 <TR ALIGN=RIGHT><TD ALIGN=LEFT> IOB Flip Flops</TD>
290 <TD ALIGN=RIGHT>18</TD>
293 <TD COLSPAN='2'> </TD>
295 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB16BWERs</TD>
296 <TD ALIGN=RIGHT>26</TD>
297 <TD ALIGN=RIGHT>116</TD>
298 <TD ALIGN=RIGHT>22%</TD>
299 <TD COLSPAN='2'> </TD>
301 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB8BWERs</TD>
302 <TD ALIGN=RIGHT>0</TD>
303 <TD ALIGN=RIGHT>232</TD>
304 <TD ALIGN=RIGHT>0%</TD>
305 <TD COLSPAN='2'> </TD>
307 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2/BUFIO2_2CLKs</TD>
308 <TD ALIGN=RIGHT>1</TD>
309 <TD ALIGN=RIGHT>32</TD>
310 <TD ALIGN=RIGHT>3%</TD>
311 <TD COLSPAN='2'> </TD>
313 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFIO2s</TD>
314 <TD ALIGN=RIGHT>1</TD>
317 <TD COLSPAN='2'> </TD>
319 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFIO2_2CLKs</TD>
320 <TD ALIGN=RIGHT>0</TD>
323 <TD COLSPAN='2'> </TD>
325 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2FB/BUFIO2FB_2CLKs</TD>
326 <TD ALIGN=RIGHT>0</TD>
327 <TD ALIGN=RIGHT>32</TD>
328 <TD ALIGN=RIGHT>0%</TD>
329 <TD COLSPAN='2'> </TD>
331 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFG/BUFGMUXs</TD>
332 <TD ALIGN=RIGHT>3</TD>
333 <TD ALIGN=RIGHT>16</TD>
334 <TD ALIGN=RIGHT>18%</TD>
335 <TD COLSPAN='2'> </TD>
337 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFGs</TD>
338 <TD ALIGN=RIGHT>3</TD>
341 <TD COLSPAN='2'> </TD>
343 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFGMUX</TD>
344 <TD ALIGN=RIGHT>0</TD>
347 <TD COLSPAN='2'> </TD>
349 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DCM/DCM_CLKGENs</TD>
350 <TD ALIGN=RIGHT>0</TD>
351 <TD ALIGN=RIGHT>8</TD>
352 <TD ALIGN=RIGHT>0%</TD>
353 <TD COLSPAN='2'> </TD>
355 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ILOGIC2/ISERDES2s</TD>
356 <TD ALIGN=RIGHT>10</TD>
357 <TD ALIGN=RIGHT>376</TD>
358 <TD ALIGN=RIGHT>2%</TD>
359 <TD COLSPAN='2'> </TD>
361 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ILOGIC2s</TD>
362 <TD ALIGN=RIGHT>10</TD>
365 <TD COLSPAN='2'> </TD>
367 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ISERDES2s</TD>
368 <TD ALIGN=RIGHT>0</TD>
371 <TD COLSPAN='2'> </TD>
373 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of IODELAY2/IODRP2/IODRP2_MCBs</TD>
374 <TD ALIGN=RIGHT>24</TD>
375 <TD ALIGN=RIGHT>376</TD>
376 <TD ALIGN=RIGHT>6%</TD>
377 <TD COLSPAN='2'> </TD>
379 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODELAY2s</TD>
380 <TD ALIGN=RIGHT>0</TD>
383 <TD COLSPAN='2'> </TD>
385 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODRP2s</TD>
386 <TD ALIGN=RIGHT>2</TD>
389 <TD COLSPAN='2'> </TD>
391 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODRP2_MCBs</TD>
392 <TD ALIGN=RIGHT>22</TD>
395 <TD COLSPAN='2'> </TD>
397 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of OLOGIC2/OSERDES2s</TD>
398 <TD ALIGN=RIGHT>53</TD>
399 <TD ALIGN=RIGHT>376</TD>
400 <TD ALIGN=RIGHT>14%</TD>
401 <TD COLSPAN='2'> </TD>
403 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as OLOGIC2s</TD>
404 <TD ALIGN=RIGHT>7</TD>
407 <TD COLSPAN='2'> </TD>
409 <TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as OSERDES2s</TD>
410 <TD ALIGN=RIGHT>46</TD>
413 <TD COLSPAN='2'> </TD>
415 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BSCANs</TD>
416 <TD ALIGN=RIGHT>1</TD>
417 <TD ALIGN=RIGHT>4</TD>
418 <TD ALIGN=RIGHT>25%</TD>
419 <TD COLSPAN='2'> </TD>
421 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFHs</TD>
422 <TD ALIGN=RIGHT>0</TD>
423 <TD ALIGN=RIGHT>256</TD>
424 <TD ALIGN=RIGHT>0%</TD>
425 <TD COLSPAN='2'> </TD>
427 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLLs</TD>
428 <TD ALIGN=RIGHT>0</TD>
429 <TD ALIGN=RIGHT>8</TD>
430 <TD ALIGN=RIGHT>0%</TD>
431 <TD COLSPAN='2'> </TD>
433 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLL_MCBs</TD>
434 <TD ALIGN=RIGHT>1</TD>
435 <TD ALIGN=RIGHT>4</TD>
436 <TD ALIGN=RIGHT>25%</TD>
437 <TD COLSPAN='2'> </TD>
439 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DSP48A1s</TD>
440 <TD ALIGN=RIGHT>8</TD>
441 <TD ALIGN=RIGHT>58</TD>
442 <TD ALIGN=RIGHT>13%</TD>
443 <TD COLSPAN='2'> </TD>
445 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GTPA1_DUALs</TD>
446 <TD ALIGN=RIGHT>0</TD>
447 <TD ALIGN=RIGHT>2</TD>
448 <TD ALIGN=RIGHT>0%</TD>
449 <TD COLSPAN='2'> </TD>
451 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ICAPs</TD>
452 <TD ALIGN=RIGHT>0</TD>
453 <TD ALIGN=RIGHT>1</TD>
454 <TD ALIGN=RIGHT>0%</TD>
455 <TD COLSPAN='2'> </TD>
457 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of MCBs</TD>
458 <TD ALIGN=RIGHT>1</TD>
459 <TD ALIGN=RIGHT>2</TD>
460 <TD ALIGN=RIGHT>50%</TD>
461 <TD COLSPAN='2'> </TD>
463 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PCIE_A1s</TD>
464 <TD ALIGN=RIGHT>0</TD>
465 <TD ALIGN=RIGHT>1</TD>
466 <TD ALIGN=RIGHT>0%</TD>
467 <TD COLSPAN='2'> </TD>
469 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PCILOGICSEs</TD>
470 <TD ALIGN=RIGHT>0</TD>
471 <TD ALIGN=RIGHT>2</TD>
472 <TD ALIGN=RIGHT>0%</TD>
473 <TD COLSPAN='2'> </TD>
475 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PLL_ADVs</TD>
476 <TD ALIGN=RIGHT>1</TD>
477 <TD ALIGN=RIGHT>4</TD>
478 <TD ALIGN=RIGHT>25%</TD>
479 <TD COLSPAN='2'> </TD>
481 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PMVs</TD>
482 <TD ALIGN=RIGHT>0</TD>
483 <TD ALIGN=RIGHT>1</TD>
484 <TD ALIGN=RIGHT>0%</TD>
485 <TD COLSPAN='2'> </TD>
487 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of STARTUPs</TD>
488 <TD ALIGN=RIGHT>0</TD>
489 <TD ALIGN=RIGHT>1</TD>
490 <TD ALIGN=RIGHT>0%</TD>
491 <TD COLSPAN='2'> </TD>
493 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of SUSPEND_SYNCs</TD>
494 <TD ALIGN=RIGHT>0</TD>
495 <TD ALIGN=RIGHT>1</TD>
496 <TD ALIGN=RIGHT>0%</TD>
497 <TD COLSPAN='2'> </TD>
499 <TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD>
500 <TD ALIGN=RIGHT>3.78</TD>
503 <TD COLSPAN='2'> </TD>
509 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
510 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Performance Summary</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=PerformanceSummary"><B>[-]</B></a></TD></TR>
512 <TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD>
513 <TD>0 (Setup: 0, Hold: 0, Component Switching Limit: 0)</TD>
514 <TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD>
515 <TD COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system_par.xrpt?&DataKey=PinoutData'>Pinout Report</A></TD>
518 <TD BGCOLOR='#FFFF99'><B>Routing Results:</B></TD><TD>
519 <A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.unroutes'>All Signals Completely Routed</A></TD>
520 <TD BGCOLOR='#FFFF99'><B>Clock Data:</B></TD>
521 <TD COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system_par.xrpt?&DataKey=ClocksData'>Clock Report</A></TD>
524 <TD BGCOLOR='#FFFF99'><B>Timing Constraints:</B></TD>
526 <A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.ptwx?&DataKey=ConstraintsData'>All Constraints Met</A></TD>
527 <TD BGCOLOR='#FFFF99'><B> </B></TD>
528 <TD COLSPAN='2'> </TD>
533 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
534 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
535 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
536 <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
537 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mon 30. May 22:05:37 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>72 Warnings (72 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Info'>4 Infos (4 new)</A></TD></TR>
538 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Mon 30. May 22:10:43 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/map.xmsgs?&DataKey=Warning'>26 Warnings (26 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/map.xmsgs?&DataKey=Info'>840 Infos (840 new)</A></TD></TR>
539 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Mon 30. May 22:12:50 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/par.xmsgs?&DataKey=Warning'>28 Warnings (28 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
540 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Mon 30. May 22:13:20 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/trce.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
541 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\system.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Mon 30. May 22:14:07 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\_xmsgs/bitgen.xmsgs?&DataKey=Warning'>25 Warnings (25 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
543 <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
544 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
545 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
546 <TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_SP605\implementation\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Mon 30. May 22:14:08 2011</TD></TR>
550 <br><center><b>Date Generated:</b> 05/30/2011 - 22:14:08</center>
projects / freertos / blob