2 This serial port driver is borrowed heavily from DZComm. I have
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3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
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5 http://dzcomm.sourceforge.net
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9 FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
\r
11 This file is part of the FreeRTOS distribution.
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13 FreeRTOS is free software; you can redistribute it and/or modify it under
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14 the terms of the GNU General Public License (version 2) as published by the
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15 Free Software Foundation and modified by the FreeRTOS exception.
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16 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
17 combined work that includes FreeRTOS without being obliged to provide the
\r
18 source code for proprietary components outside of the FreeRTOS kernel.
\r
19 Alternative commercial license and support terms are also available upon
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20 request. See the licensing section of http://www.FreeRTOS.org for full
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23 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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24 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
25 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
28 You should have received a copy of the GNU General Public License along
\r
29 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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30 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
33 ***************************************************************************
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35 * The FreeRTOS eBook and reference manual are available to purchase for a *
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36 * small fee. Help yourself get started quickly while also helping the *
\r
37 * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
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39 ***************************************************************************
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43 Please ensure to read the configuration and relevant port sections of the
\r
44 online documentation.
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46 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
49 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
52 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
53 licensing and training services.
\r
60 #include "FreeRTOS.h"
\r
64 #include "portasm.h"
\r
66 #define serMAX_IRQs ( 16 )
\r
67 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
68 #define serCOM1_STANDARD_IRQ ( ( unsigned char ) 4 )
\r
69 #define serCOM2_STANDARD_IRQ ( ( unsigned char ) 3 )
\r
72 #define serIMR_8259_0 ( ( unsigned char ) 0x21 )
\r
73 #define serIMR_8259_1 ( ( unsigned char ) 0xa1 )
\r
74 #define serISR_8259_0 ( ( unsigned char ) 0x20 )
\r
75 #define serISR_8259_1 ( ( unsigned char ) 0xa0 )
\r
76 #define serALL_COMS_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
77 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
79 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
80 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
81 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
82 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
83 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
84 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
85 #define serFIFO_CTRL_OFFSET ( 2 )
\r
86 #define serLINE_CTRL_OFFSET ( 3 )
\r
87 #define serMODEM_CTRL_OFFSET ( 4 )
\r
88 #define serLINE_STATUS_OFFSET ( 5 )
\r
89 #define serMODEM_STATUS_OFFSET ( 6 )
\r
90 #define serSCR_OFFSET ( 7 )
\r
92 #define serMAX_BAUD ( ( unsigned long ) 115200UL )
\r
94 #define serNO_INTERRUPTS ( 0x00 )
\r
96 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
98 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
99 if( !( ucIn & ucInterrupt ) ) \
\r
101 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
104 /*-----------------------------------------------------------*/
\r
106 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
108 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
109 if( ucIn & ucInterrupt ) \
\r
111 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
114 /*-----------------------------------------------------------*/
\r
172 /* This *MUST* match the order in the eBaud definition. */
\r
173 unsigned long ulBaudFromEnum[] =
\r
175 ( unsigned long ) 50,
\r
176 ( unsigned long ) 75,
\r
177 ( unsigned long ) 110,
\r
178 ( unsigned long ) 134,
\r
179 ( unsigned long ) 150,
\r
180 ( unsigned long ) 200,
\r
181 ( unsigned long ) 300,
\r
182 ( unsigned long ) 600,
\r
183 ( unsigned long ) 1200,
\r
184 ( unsigned long ) 1800,
\r
185 ( unsigned long ) 2400,
\r
186 ( unsigned long ) 4800,
\r
187 ( unsigned long ) 9600,
\r
188 ( unsigned long ) 19200,
\r
189 ( unsigned long ) 38400UL,
\r
190 ( unsigned long ) 57600UL,
\r
191 ( unsigned long ) 115200UL
\r
194 typedef struct xCOM_PORT
\r
196 unsigned short sPort; /* comm port address eg. 0x3f8 */
\r
197 unsigned char ucIRQ; /* comm IRQ eg. 3 */
\r
199 /* Next two fields used for setting up the IRQ routine and
\r
200 * (un)masking the interrupt in certain circumstances.
\r
202 unsigned short usIRQVector;
\r
203 unsigned char ucInterruptEnableMast;
\r
205 /* Read/Write buffers. */
\r
206 xQueueHandle xRxedChars;
\r
207 xQueueHandle xCharsForTx;
\r
209 /* This lot are set up to minimise CPU time where accessing the comm
\r
210 * port's registers.
\r
212 unsigned short usTransmitHoldReg;
\r
213 unsigned short usReceiveDataRegister;
\r
214 unsigned short usBaudRateDivisorLow;
\r
215 unsigned short usBaudRateDivisorHigh;
\r
216 unsigned short usInterruptEnableReg;
\r
217 unsigned short usInterruptIDReg;
\r
218 unsigned short usFIFOCtrlReg;
\r
219 unsigned short usLineCtrlReg;
\r
220 unsigned short usModemCtrlReg;
\r
221 unsigned short usLineStatusReg;
\r
222 unsigned short usModemStatusReg;
\r
223 unsigned short usSCRReg;
\r
224 unsigned short us8259InterruptServiceReg;
\r
225 unsigned short us8259InterruptMaskReg;
\r
227 /* This semaphore does nothing useful except test a feature of the
\r
229 xSemaphoreHandle xTestSem;
\r
233 typedef xComPort *xComPortHandle;
\r
235 /* A xComPort structure can be associated with each IRQ. Initially none
\r
236 are create/installed. */
\r
237 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
239 /*-----------------------------------------------------------*/
\r
241 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
242 the xComPortHandle structure details to be private to this file. */
\r
243 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
244 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime );
\r
245 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime );
\r
246 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
248 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
249 static short sComPortISR( const xComPort * const pxPort );
\r
251 /*-----------------------------------------------------------*/
\r
253 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
255 #define COM_IRQ_WRAPPER(N) \
\r
256 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
258 portDISABLE_INTERRUPTS(); \
\r
259 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
261 portSWITCH_CONTEXT(); \
\r
265 COM_IRQ_WRAPPER( 0 )
\r
266 COM_IRQ_WRAPPER( 1 )
\r
267 COM_IRQ_WRAPPER( 2 )
\r
268 COM_IRQ_WRAPPER( 3 )
\r
269 COM_IRQ_WRAPPER( 4 )
\r
270 COM_IRQ_WRAPPER( 5 )
\r
271 COM_IRQ_WRAPPER( 6 )
\r
272 COM_IRQ_WRAPPER( 7 )
\r
273 COM_IRQ_WRAPPER( 8 )
\r
274 COM_IRQ_WRAPPER( 9 )
\r
275 COM_IRQ_WRAPPER( 10 )
\r
276 COM_IRQ_WRAPPER( 11 )
\r
277 COM_IRQ_WRAPPER( 12 )
\r
278 COM_IRQ_WRAPPER( 13 )
\r
279 COM_IRQ_WRAPPER( 14 )
\r
280 COM_IRQ_WRAPPER( 15 )
\r
282 static pxISR xISRs[ serMAX_IRQs ] =
\r
294 COM_IRQ10_WRAPPER,
\r
295 COM_IRQ11_WRAPPER,
\r
296 COM_IRQ12_WRAPPER,
\r
297 COM_IRQ13_WRAPPER,
\r
302 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
304 /*-----------------------------------------------------------*/
\r
307 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
311 /* Create a structure to handle this port. */
\r
312 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
314 if( pxPort != NULL )
\r
316 /* Create the queues used by the comtest task. */
\r
317 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
318 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
320 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
321 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
323 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
330 /*-----------------------------------------------------------*/
\r
332 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
335 unsigned long ulDivisor;
\r
336 unsigned char ucDivisorLow;
\r
337 unsigned char ucDivisorHigh;
\r
338 unsigned char ucCommParam;
\r
340 /* IRQ numbers - standard */
\r
341 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
343 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
344 pxPort->sPort = 0x3f8;
\r
348 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
349 pxPort->sPort = 0x2f8;
\r
352 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
353 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
354 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
355 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
356 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
357 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
358 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
359 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
360 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
361 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
362 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
363 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
364 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
366 /* Set communication parameters. */
\r
367 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
368 ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;
\r
369 ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );
\r
371 switch( eWantedParity )
\r
373 case serNO_PARITY: ucCommParam = 0x00;
\r
375 case serODD_PARITY: ucCommParam = 0x08;
\r
377 case serEVEN_PARITY: ucCommParam = 0x18;
\r
379 case serMARK_PARITY: ucCommParam = 0x28;
\r
381 case serSPACE_PARITY: ucCommParam = 0x38;
\r
383 default: ucCommParam = 0x00;
\r
387 switch ( eWantedDataBits )
\r
389 case serBITS_5: ucCommParam |= 0x00;
\r
391 case serBITS_6: ucCommParam |= 0x01;
\r
393 case serBITS_7: ucCommParam |= 0x02;
\r
395 case serBITS_8: ucCommParam |= 0x03;
\r
397 default: ucCommParam |= 0x03;
\r
401 if( eWantedStopBits == serSTOP_2 )
\r
403 ucCommParam |= 0x04;
\r
406 /* Reset UART into known state - Thanks to Bradley Town */
\r
407 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
408 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
409 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
411 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
412 setting up FIFO if possible */
\r
413 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
414 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
416 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
418 /* The chip is better than an 8250 */
\r
419 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
420 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
422 /* Try and start the FIFO. It appears that some chips need a two call
\r
423 protocol, but those that don't seem to work even if you do start it twice.
\r
424 The first call is simply to start it, the second starts it and sets an 8
\r
425 byte FIFO trigger level. */
\r
426 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
427 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
428 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
430 /* Check that the FIFO initialised */
\r
431 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
433 /* It didn't so we assume it isn't there but disable it to be on the
\r
435 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
439 /* End of (modified) SVAsync code.
\r
440 Set interrupt parameters calculating mask for 8259 controller's
\r
441 IMR and number of interrupt handler for given irq level */
\r
442 if (pxPort->ucIRQ <= 7)
\r
444 /* if 0<=irq<=7 first IMR address used */
\r
445 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
446 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
447 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
448 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
452 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
453 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
454 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
455 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
458 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
459 to set baud rate */
\r
460 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
461 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
462 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
464 /* reset usLineCtrlReg and Port Toggleout */
\r
465 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
467 portENTER_CRITICAL();
\r
469 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
471 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
474 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
475 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
477 /* enable interrupt pxPort->ucIRQ level */
\r
478 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
480 /* And allow interrupts again now the hairy bit's done */
\r
481 portEXIT_CRITICAL();
\r
483 /* This version does not allow flow control. */
\r
484 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
486 /* enable all communication's interrupts */
\r
487 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
489 /*-----------------------------------------------------------*/
\r
491 static short sComPortISR( const xComPort * const pxPort )
\r
493 short sInterruptID;
\r
495 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
496 extern void vComTestUnsuspendTask( void );
\r
498 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
500 /* Decide which UART has issued the interrupt */
\r
501 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
503 /* service whatever requests the calling UART may have. The top 4 bits are
\r
504 either unused or indicate the presence of a functioning FIFO, which we don't
\r
505 need to know. So trim them off to simplify the switch statement below. */
\r
506 sInterruptID &= 0x0f;
\r
509 switch( sInterruptID )
\r
511 case 0x0c: /* Timeout
\r
512 Called when FIFO not up to trigger level but no activity for
\r
513 a while. Handled exactly as RDAINT, see below for
\r
517 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
518 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
520 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
521 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
522 this as an invalid call, then give the semaphore for real. */
\r
523 vComTestUnsuspendTask();
\r
524 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
526 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
529 case 0x06: /* LSINT */
\r
530 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
533 case 0x04: /* RDAINT */
\r
534 /* The usInterruptIDReg flag tested above stops when the
\r
535 FIFO is below the trigger level rather than empty, whereas
\r
536 this flag allows one to empty it: (do loop because there
\r
537 must be at least one to read by virtue of having got here.) */
\r
540 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
541 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
543 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
544 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
545 this as an invalid call, then give the semaphore for real. */
\r
546 vComTestUnsuspendTask();
\r
547 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
549 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
552 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
553 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )
\r
555 /* Queue empty, nothing to send */
\r
556 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
560 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );
\r
564 case 0x00: /* MSINT */
\r
565 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
569 /* Get the next instruction, trimming as above */
\r
570 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
572 } while( !( sInterruptID & 0x01 ) );
\r
574 if( pxPort->ucIRQ > 7 )
\r
576 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
577 portOUTPUT_BYTE( 0x20, 0x62);
\r
581 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
584 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
586 /* If posting any of the characters to a queue woke a task that was blocked on
\r
587 the queue we may want to return to the task just woken (depending on its
\r
588 priority relative to the task this ISR interrupted. */
\r
589 return xHigherPriorityTaskWoken;
\r
591 /*-----------------------------------------------------------*/
\r
593 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime )
\r
595 /* Get the next character from the buffer, note that this routine is only
\r
596 called having checked that the is (at least) one to get */
\r
597 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
606 /*-----------------------------------------------------------*/
\r
608 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime )
\r
610 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
615 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
619 /*-----------------------------------------------------------*/
\r
621 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )
\r
624 const portTickType xNoBlock = ( portTickType ) 0;
\r
626 /* Stop warnings. */
\r
627 ( void ) usStringLength;
\r
629 pcNextChar = ( char * ) pcString;
\r
630 while( *pcNextChar )
\r
632 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
636 /*-----------------------------------------------------------*/
\r
638 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
640 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
642 /* This function does nothing interesting, but test the
\r
643 semaphore from ISR mechanism. */
\r
644 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
646 /*-----------------------------------------------------------*/
\r
648 void vSerialClose( xComPortHandle xPort )
\r
650 portENTER_CRITICAL();
\r
652 /* Turn off the interrupts. */
\r
653 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
654 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
656 /* Put back the original ISR. */
\r
657 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
659 /* Remove the reference in the array of xComPort structures. */
\r
660 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
662 /* Delete the queues. */
\r
663 vQueueDelete( xPort->xRxedChars );
\r
664 vQueueDelete( xPort->xCharsForTx );
\r
666 vPortFree( ( void * ) xPort );
\r
668 portEXIT_CRITICAL();
\r