2 This serial port driver is borrowed heavily from DZComm. I have
\r
3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
\r
5 http://dzcomm.sourceforge.net
\r
9 FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
\r
12 ***************************************************************************
\r
14 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
15 * Complete, revised, and edited pdf reference manuals are also *
\r
18 * Purchasing FreeRTOS documentation will not only help you, by *
\r
19 * ensuring you get running as quickly as possible and with an *
\r
20 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
21 * the FreeRTOS project to continue with its mission of providing *
\r
22 * professional grade, cross platform, de facto standard solutions *
\r
23 * for microcontrollers - completely free of charge! *
\r
25 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
27 * Thank you for using FreeRTOS, and thank you for your support! *
\r
29 ***************************************************************************
\r
32 This file is part of the FreeRTOS distribution.
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34 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
35 the terms of the GNU General Public License (version 2) as published by the
\r
36 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
37 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
38 distribute a combined work that includes FreeRTOS without being obliged to
\r
39 provide the source code for proprietary components outside of the FreeRTOS
\r
40 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
41 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
42 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
43 more details. You should have received a copy of the GNU General Public
\r
44 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
45 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
46 by writing to Richard Barry, contact details for whom are available on the
\r
51 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
54 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
57 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
58 licensing and training services.
\r
65 #include "FreeRTOS.h"
\r
69 #include "portasm.h"
\r
71 #define serMAX_IRQs ( 16 )
\r
72 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
73 #define serCOM1_STANDARD_IRQ ( ( unsigned char ) 4 )
\r
74 #define serCOM2_STANDARD_IRQ ( ( unsigned char ) 3 )
\r
77 #define serIMR_8259_0 ( ( unsigned char ) 0x21 )
\r
78 #define serIMR_8259_1 ( ( unsigned char ) 0xa1 )
\r
79 #define serISR_8259_0 ( ( unsigned char ) 0x20 )
\r
80 #define serISR_8259_1 ( ( unsigned char ) 0xa0 )
\r
81 #define serALL_COMS_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
82 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned char ) 0x0f )
\r
84 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
85 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
86 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
87 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
88 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
89 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
90 #define serFIFO_CTRL_OFFSET ( 2 )
\r
91 #define serLINE_CTRL_OFFSET ( 3 )
\r
92 #define serMODEM_CTRL_OFFSET ( 4 )
\r
93 #define serLINE_STATUS_OFFSET ( 5 )
\r
94 #define serMODEM_STATUS_OFFSET ( 6 )
\r
95 #define serSCR_OFFSET ( 7 )
\r
97 #define serMAX_BAUD ( ( unsigned long ) 115200UL )
\r
99 #define serNO_INTERRUPTS ( 0x00 )
\r
101 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
103 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
104 if( !( ucIn & ucInterrupt ) ) \
\r
106 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
109 /*-----------------------------------------------------------*/
\r
111 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
113 unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
114 if( ucIn & ucInterrupt ) \
\r
116 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
119 /*-----------------------------------------------------------*/
\r
177 /* This *MUST* match the order in the eBaud definition. */
\r
178 unsigned long ulBaudFromEnum[] =
\r
180 ( unsigned long ) 50,
\r
181 ( unsigned long ) 75,
\r
182 ( unsigned long ) 110,
\r
183 ( unsigned long ) 134,
\r
184 ( unsigned long ) 150,
\r
185 ( unsigned long ) 200,
\r
186 ( unsigned long ) 300,
\r
187 ( unsigned long ) 600,
\r
188 ( unsigned long ) 1200,
\r
189 ( unsigned long ) 1800,
\r
190 ( unsigned long ) 2400,
\r
191 ( unsigned long ) 4800,
\r
192 ( unsigned long ) 9600,
\r
193 ( unsigned long ) 19200,
\r
194 ( unsigned long ) 38400UL,
\r
195 ( unsigned long ) 57600UL,
\r
196 ( unsigned long ) 115200UL
\r
199 typedef struct xCOM_PORT
\r
201 unsigned short sPort; /* comm port address eg. 0x3f8 */
\r
202 unsigned char ucIRQ; /* comm IRQ eg. 3 */
\r
204 /* Next two fields used for setting up the IRQ routine and
\r
205 * (un)masking the interrupt in certain circumstances.
\r
207 unsigned short usIRQVector;
\r
208 unsigned char ucInterruptEnableMast;
\r
210 /* Read/Write buffers. */
\r
211 xQueueHandle xRxedChars;
\r
212 xQueueHandle xCharsForTx;
\r
214 /* This lot are set up to minimise CPU time where accessing the comm
\r
215 * port's registers.
\r
217 unsigned short usTransmitHoldReg;
\r
218 unsigned short usReceiveDataRegister;
\r
219 unsigned short usBaudRateDivisorLow;
\r
220 unsigned short usBaudRateDivisorHigh;
\r
221 unsigned short usInterruptEnableReg;
\r
222 unsigned short usInterruptIDReg;
\r
223 unsigned short usFIFOCtrlReg;
\r
224 unsigned short usLineCtrlReg;
\r
225 unsigned short usModemCtrlReg;
\r
226 unsigned short usLineStatusReg;
\r
227 unsigned short usModemStatusReg;
\r
228 unsigned short usSCRReg;
\r
229 unsigned short us8259InterruptServiceReg;
\r
230 unsigned short us8259InterruptMaskReg;
\r
232 /* This semaphore does nothing useful except test a feature of the
\r
234 xSemaphoreHandle xTestSem;
\r
238 typedef xComPort *xComPortHandle;
\r
240 /* A xComPort structure can be associated with each IRQ. Initially none
\r
241 are create/installed. */
\r
242 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
244 /*-----------------------------------------------------------*/
\r
246 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
247 the xComPortHandle structure details to be private to this file. */
\r
248 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
249 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime );
\r
250 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime );
\r
251 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
253 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
254 static short sComPortISR( const xComPort * const pxPort );
\r
256 /*-----------------------------------------------------------*/
\r
258 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
260 #define COM_IRQ_WRAPPER(N) \
\r
261 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
263 portDISABLE_INTERRUPTS(); \
\r
264 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
266 portSWITCH_CONTEXT(); \
\r
270 COM_IRQ_WRAPPER( 0 )
\r
271 COM_IRQ_WRAPPER( 1 )
\r
272 COM_IRQ_WRAPPER( 2 )
\r
273 COM_IRQ_WRAPPER( 3 )
\r
274 COM_IRQ_WRAPPER( 4 )
\r
275 COM_IRQ_WRAPPER( 5 )
\r
276 COM_IRQ_WRAPPER( 6 )
\r
277 COM_IRQ_WRAPPER( 7 )
\r
278 COM_IRQ_WRAPPER( 8 )
\r
279 COM_IRQ_WRAPPER( 9 )
\r
280 COM_IRQ_WRAPPER( 10 )
\r
281 COM_IRQ_WRAPPER( 11 )
\r
282 COM_IRQ_WRAPPER( 12 )
\r
283 COM_IRQ_WRAPPER( 13 )
\r
284 COM_IRQ_WRAPPER( 14 )
\r
285 COM_IRQ_WRAPPER( 15 )
\r
287 static pxISR xISRs[ serMAX_IRQs ] =
\r
299 COM_IRQ10_WRAPPER,
\r
300 COM_IRQ11_WRAPPER,
\r
301 COM_IRQ12_WRAPPER,
\r
302 COM_IRQ13_WRAPPER,
\r
307 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
309 /*-----------------------------------------------------------*/
\r
312 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
316 /* Create a structure to handle this port. */
\r
317 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
319 if( pxPort != NULL )
\r
321 /* Create the queues used by the comtest task. */
\r
322 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
323 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
\r
325 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
326 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
328 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
335 /*-----------------------------------------------------------*/
\r
337 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
340 unsigned long ulDivisor;
\r
341 unsigned char ucDivisorLow;
\r
342 unsigned char ucDivisorHigh;
\r
343 unsigned char ucCommParam;
\r
345 /* IRQ numbers - standard */
\r
346 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
348 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
349 pxPort->sPort = 0x3f8;
\r
353 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
354 pxPort->sPort = 0x2f8;
\r
357 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
358 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
359 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
360 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
361 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
362 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
363 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
364 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
365 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
366 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
367 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
368 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
369 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
371 /* Set communication parameters. */
\r
372 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
373 ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;
\r
374 ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );
\r
376 switch( eWantedParity )
\r
378 case serNO_PARITY: ucCommParam = 0x00;
\r
380 case serODD_PARITY: ucCommParam = 0x08;
\r
382 case serEVEN_PARITY: ucCommParam = 0x18;
\r
384 case serMARK_PARITY: ucCommParam = 0x28;
\r
386 case serSPACE_PARITY: ucCommParam = 0x38;
\r
388 default: ucCommParam = 0x00;
\r
392 switch ( eWantedDataBits )
\r
394 case serBITS_5: ucCommParam |= 0x00;
\r
396 case serBITS_6: ucCommParam |= 0x01;
\r
398 case serBITS_7: ucCommParam |= 0x02;
\r
400 case serBITS_8: ucCommParam |= 0x03;
\r
402 default: ucCommParam |= 0x03;
\r
406 if( eWantedStopBits == serSTOP_2 )
\r
408 ucCommParam |= 0x04;
\r
411 /* Reset UART into known state - Thanks to Bradley Town */
\r
412 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
413 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
414 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
416 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
417 setting up FIFO if possible */
\r
418 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
419 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
421 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
423 /* The chip is better than an 8250 */
\r
424 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
425 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
427 /* Try and start the FIFO. It appears that some chips need a two call
\r
428 protocol, but those that don't seem to work even if you do start it twice.
\r
429 The first call is simply to start it, the second starts it and sets an 8
\r
430 byte FIFO trigger level. */
\r
431 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
432 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
433 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
435 /* Check that the FIFO initialised */
\r
436 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
438 /* It didn't so we assume it isn't there but disable it to be on the
\r
440 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
444 /* End of (modified) SVAsync code.
\r
445 Set interrupt parameters calculating mask for 8259 controller's
\r
446 IMR and number of interrupt handler for given irq level */
\r
447 if (pxPort->ucIRQ <= 7)
\r
449 /* if 0<=irq<=7 first IMR address used */
\r
450 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
451 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
452 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
453 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
457 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
458 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
459 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
460 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
463 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
464 to set baud rate */
\r
465 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
466 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
467 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
469 /* reset usLineCtrlReg and Port Toggleout */
\r
470 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
472 portENTER_CRITICAL();
\r
474 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
476 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
479 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
480 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
482 /* enable interrupt pxPort->ucIRQ level */
\r
483 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
485 /* And allow interrupts again now the hairy bit's done */
\r
486 portEXIT_CRITICAL();
\r
488 /* This version does not allow flow control. */
\r
489 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
491 /* enable all communication's interrupts */
\r
492 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
494 /*-----------------------------------------------------------*/
\r
496 static short sComPortISR( const xComPort * const pxPort )
\r
498 short sInterruptID;
\r
500 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
501 extern void vComTestUnsuspendTask( void );
\r
503 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
505 /* Decide which UART has issued the interrupt */
\r
506 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
508 /* service whatever requests the calling UART may have. The top 4 bits are
\r
509 either unused or indicate the presence of a functioning FIFO, which we don't
\r
510 need to know. So trim them off to simplify the switch statement below. */
\r
511 sInterruptID &= 0x0f;
\r
514 switch( sInterruptID )
\r
516 case 0x0c: /* Timeout
\r
517 Called when FIFO not up to trigger level but no activity for
\r
518 a while. Handled exactly as RDAINT, see below for
\r
522 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
523 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
525 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
526 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
527 this as an invalid call, then give the semaphore for real. */
\r
528 vComTestUnsuspendTask();
\r
529 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
531 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
534 case 0x06: /* LSINT */
\r
535 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
538 case 0x04: /* RDAINT */
\r
539 /* The usInterruptIDReg flag tested above stops when the
\r
540 FIFO is below the trigger level rather than empty, whereas
\r
541 this flag allows one to empty it: (do loop because there
\r
542 must be at least one to read by virtue of having got here.) */
\r
545 cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
546 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
548 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
549 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
550 this as an invalid call, then give the semaphore for real. */
\r
551 vComTestUnsuspendTask();
\r
552 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
554 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
557 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
558 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )
\r
560 /* Queue empty, nothing to send */
\r
561 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
565 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );
\r
569 case 0x00: /* MSINT */
\r
570 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
574 /* Get the next instruction, trimming as above */
\r
575 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
577 } while( !( sInterruptID & 0x01 ) );
\r
579 if( pxPort->ucIRQ > 7 )
\r
581 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
582 portOUTPUT_BYTE( 0x20, 0x62);
\r
586 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
589 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
591 /* If posting any of the characters to a queue woke a task that was blocked on
\r
592 the queue we may want to return to the task just woken (depending on its
\r
593 priority relative to the task this ISR interrupted. */
\r
594 return xHigherPriorityTaskWoken;
\r
596 /*-----------------------------------------------------------*/
\r
598 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime )
\r
600 /* Get the next character from the buffer, note that this routine is only
\r
601 called having checked that the is (at least) one to get */
\r
602 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
611 /*-----------------------------------------------------------*/
\r
613 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime )
\r
615 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
620 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
624 /*-----------------------------------------------------------*/
\r
626 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )
\r
629 const portTickType xNoBlock = ( portTickType ) 0;
\r
631 /* Stop warnings. */
\r
632 ( void ) usStringLength;
\r
634 pcNextChar = ( char * ) pcString;
\r
635 while( *pcNextChar )
\r
637 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
641 /*-----------------------------------------------------------*/
\r
643 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
645 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
647 /* This function does nothing interesting, but test the
\r
648 semaphore from ISR mechanism. */
\r
649 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
651 /*-----------------------------------------------------------*/
\r
653 void vSerialClose( xComPortHandle xPort )
\r
655 portENTER_CRITICAL();
\r
657 /* Turn off the interrupts. */
\r
658 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
659 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
661 /* Put back the original ISR. */
\r
662 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
664 /* Remove the reference in the array of xComPort structures. */
\r
665 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
667 /* Delete the queues. */
\r
668 vQueueDelete( xPort->xRxedChars );
\r
669 vQueueDelete( xPort->xCharsForTx );
\r
671 vPortFree( ( void * ) xPort );
\r
673 portEXIT_CRITICAL();
\r