2 This serial port driver is borrowed heavily from DZComm. I have
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3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
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5 http://dzcomm.sourceforge.net
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8 FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.
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10 This file is part of the FreeRTOS.org distribution.
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12 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
13 it under the terms of the GNU General Public License as published by
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14 the Free Software Foundation; either version 2 of the License, or
\r
15 (at your option) any later version.
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17 FreeRTOS.org is distributed in the hope that it will be useful,
\r
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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20 GNU General Public License for more details.
\r
22 You should have received a copy of the GNU General Public License
\r
23 along with FreeRTOS.org; if not, write to the Free Software
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24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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26 A special exception to the GPL can be applied should you wish to distribute
\r
27 a combined work that includes FreeRTOS.org, without being obliged to provide
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28 the source code for any proprietary components. See the licensing section
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29 of http://www.FreeRTOS.org for full details of how and when the exception
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32 ***************************************************************************
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33 See http://www.FreeRTOS.org for documentation, latest information, license
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34 and contact details. Please ensure to read the configuration and relevant
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35 port sections of the online documentation.
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37 Also see http://www.SafeRTOS.com a version that has been certified for use
\r
38 in safety critical systems, plus commercial licensing, development and
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40 ***************************************************************************
\r
46 + Call to the more efficient portSWITCH_CONTEXT() replaces the call to
\r
47 taskYIELD() in the ISR.
\r
49 Changes from V1.2.0:
\r
51 + Added vSerialPutString().
\r
55 + The function xPortInitMinimal() has been renamed to
\r
56 xSerialPortInitMinimal() and the function xPortInit() has been renamed
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57 to xSerialPortInit().
\r
61 + Use portTickType in place of unsigned pdLONG for delay periods.
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62 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
\r
68 #include "FreeRTOS.h"
\r
72 #include "portasm.h"
\r
74 #define serMAX_IRQs ( 16 )
\r
75 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
76 #define serCOM1_STANDARD_IRQ ( ( unsigned portCHAR ) 4 )
\r
77 #define serCOM2_STANDARD_IRQ ( ( unsigned portCHAR ) 3 )
\r
80 #define serIMR_8259_0 ( ( unsigned portCHAR ) 0x21 )
\r
81 #define serIMR_8259_1 ( ( unsigned portCHAR ) 0xa1 )
\r
82 #define serISR_8259_0 ( ( unsigned portCHAR ) 0x20 )
\r
83 #define serISR_8259_1 ( ( unsigned portCHAR ) 0xa0 )
\r
84 #define serALL_COMS_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
85 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
87 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
88 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
89 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
90 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
91 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
92 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
93 #define serFIFO_CTRL_OFFSET ( 2 )
\r
94 #define serLINE_CTRL_OFFSET ( 3 )
\r
95 #define serMODEM_CTRL_OFFSET ( 4 )
\r
96 #define serLINE_STATUS_OFFSET ( 5 )
\r
97 #define serMODEM_STATUS_OFFSET ( 6 )
\r
98 #define serSCR_OFFSET ( 7 )
\r
100 #define serMAX_BAUD ( ( unsigned portLONG ) 115200UL )
\r
102 #define serNO_INTERRUPTS ( 0x00 )
\r
104 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
106 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
107 if( !( ucIn & ucInterrupt ) ) \
\r
109 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
112 /*-----------------------------------------------------------*/
\r
114 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
116 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
117 if( ucIn & ucInterrupt ) \
\r
119 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
122 /*-----------------------------------------------------------*/
\r
180 /* This *MUST* match the order in the eBaud definition. */
\r
181 unsigned portLONG ulBaudFromEnum[] =
\r
183 ( unsigned portLONG ) 50,
\r
184 ( unsigned portLONG ) 75,
\r
185 ( unsigned portLONG ) 110,
\r
186 ( unsigned portLONG ) 134,
\r
187 ( unsigned portLONG ) 150,
\r
188 ( unsigned portLONG ) 200,
\r
189 ( unsigned portLONG ) 300,
\r
190 ( unsigned portLONG ) 600,
\r
191 ( unsigned portLONG ) 1200,
\r
192 ( unsigned portLONG ) 1800,
\r
193 ( unsigned portLONG ) 2400,
\r
194 ( unsigned portLONG ) 4800,
\r
195 ( unsigned portLONG ) 9600,
\r
196 ( unsigned portLONG ) 19200,
\r
197 ( unsigned portLONG ) 38400UL,
\r
198 ( unsigned portLONG ) 57600UL,
\r
199 ( unsigned portLONG ) 115200UL
\r
202 typedef struct xCOM_PORT
\r
204 unsigned portSHORT sPort; /* comm port address eg. 0x3f8 */
\r
205 unsigned portCHAR ucIRQ; /* comm IRQ eg. 3 */
\r
207 /* Next two fields used for setting up the IRQ routine and
\r
208 * (un)masking the interrupt in certain circumstances.
\r
210 unsigned portSHORT usIRQVector;
\r
211 unsigned portCHAR ucInterruptEnableMast;
\r
213 /* Read/Write buffers. */
\r
214 xQueueHandle xRxedChars;
\r
215 xQueueHandle xCharsForTx;
\r
217 /* This lot are set up to minimise CPU time where accessing the comm
\r
218 * port's registers.
\r
220 unsigned portSHORT usTransmitHoldReg;
\r
221 unsigned portSHORT usReceiveDataRegister;
\r
222 unsigned portSHORT usBaudRateDivisorLow;
\r
223 unsigned portSHORT usBaudRateDivisorHigh;
\r
224 unsigned portSHORT usInterruptEnableReg;
\r
225 unsigned portSHORT usInterruptIDReg;
\r
226 unsigned portSHORT usFIFOCtrlReg;
\r
227 unsigned portSHORT usLineCtrlReg;
\r
228 unsigned portSHORT usModemCtrlReg;
\r
229 unsigned portSHORT usLineStatusReg;
\r
230 unsigned portSHORT usModemStatusReg;
\r
231 unsigned portSHORT usSCRReg;
\r
232 unsigned portSHORT us8259InterruptServiceReg;
\r
233 unsigned portSHORT us8259InterruptMaskReg;
\r
235 /* This semaphore does nothing useful except test a feature of the
\r
237 xSemaphoreHandle xTestSem;
\r
241 typedef xComPort *xComPortHandle;
\r
243 /* A xComPort structure can be associated with each IRQ. Initially none
\r
244 are create/installed. */
\r
245 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
247 /*-----------------------------------------------------------*/
\r
249 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
250 the xComPortHandle structure details to be private to this file. */
\r
251 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
252 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );
\r
253 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );
\r
254 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
256 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
257 static portSHORT sComPortISR( const xComPort * const pxPort );
\r
259 /*-----------------------------------------------------------*/
\r
261 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
263 #define COM_IRQ_WRAPPER(N) \
\r
264 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
266 portDISABLE_INTERRUPTS(); \
\r
267 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
269 portSWITCH_CONTEXT(); \
\r
273 COM_IRQ_WRAPPER( 0 )
\r
274 COM_IRQ_WRAPPER( 1 )
\r
275 COM_IRQ_WRAPPER( 2 )
\r
276 COM_IRQ_WRAPPER( 3 )
\r
277 COM_IRQ_WRAPPER( 4 )
\r
278 COM_IRQ_WRAPPER( 5 )
\r
279 COM_IRQ_WRAPPER( 6 )
\r
280 COM_IRQ_WRAPPER( 7 )
\r
281 COM_IRQ_WRAPPER( 8 )
\r
282 COM_IRQ_WRAPPER( 9 )
\r
283 COM_IRQ_WRAPPER( 10 )
\r
284 COM_IRQ_WRAPPER( 11 )
\r
285 COM_IRQ_WRAPPER( 12 )
\r
286 COM_IRQ_WRAPPER( 13 )
\r
287 COM_IRQ_WRAPPER( 14 )
\r
288 COM_IRQ_WRAPPER( 15 )
\r
290 static pxISR xISRs[ serMAX_IRQs ] =
\r
302 COM_IRQ10_WRAPPER,
\r
303 COM_IRQ11_WRAPPER,
\r
304 COM_IRQ12_WRAPPER,
\r
305 COM_IRQ13_WRAPPER,
\r
310 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
312 /*-----------------------------------------------------------*/
\r
315 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
319 /* Create a structure to handle this port. */
\r
320 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
322 if( pxPort != NULL )
\r
324 /* Create the queues used by the comtest task. */
\r
325 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
326 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
328 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
329 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
331 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
338 /*-----------------------------------------------------------*/
\r
340 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
343 unsigned portLONG ulDivisor;
\r
344 unsigned portCHAR ucDivisorLow;
\r
345 unsigned portCHAR ucDivisorHigh;
\r
346 unsigned portCHAR ucCommParam;
\r
348 /* IRQ numbers - standard */
\r
349 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
351 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
352 pxPort->sPort = 0x3f8;
\r
356 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
357 pxPort->sPort = 0x2f8;
\r
360 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
361 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
362 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
363 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
364 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
365 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
366 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
367 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
368 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
369 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
370 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
371 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
372 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
374 /* Set communication parameters. */
\r
375 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
376 ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;
\r
377 ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );
\r
379 switch( eWantedParity )
\r
381 case serNO_PARITY: ucCommParam = 0x00;
\r
383 case serODD_PARITY: ucCommParam = 0x08;
\r
385 case serEVEN_PARITY: ucCommParam = 0x18;
\r
387 case serMARK_PARITY: ucCommParam = 0x28;
\r
389 case serSPACE_PARITY: ucCommParam = 0x38;
\r
391 default: ucCommParam = 0x00;
\r
395 switch ( eWantedDataBits )
\r
397 case serBITS_5: ucCommParam |= 0x00;
\r
399 case serBITS_6: ucCommParam |= 0x01;
\r
401 case serBITS_7: ucCommParam |= 0x02;
\r
403 case serBITS_8: ucCommParam |= 0x03;
\r
405 default: ucCommParam |= 0x03;
\r
409 if( eWantedStopBits == serSTOP_2 )
\r
411 ucCommParam |= 0x04;
\r
414 /* Reset UART into known state - Thanks to Bradley Town */
\r
415 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
416 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
417 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
419 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
420 setting up FIFO if possible */
\r
421 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
422 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
424 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
426 /* The chip is better than an 8250 */
\r
427 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
428 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
430 /* Try and start the FIFO. It appears that some chips need a two call
\r
431 protocol, but those that don't seem to work even if you do start it twice.
\r
432 The first call is simply to start it, the second starts it and sets an 8
\r
433 byte FIFO trigger level. */
\r
434 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
435 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
436 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
438 /* Check that the FIFO initialised */
\r
439 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
441 /* It didn't so we assume it isn't there but disable it to be on the
\r
443 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
447 /* End of (modified) SVAsync code.
\r
448 Set interrupt parameters calculating mask for 8259 controller's
\r
449 IMR and number of interrupt handler for given irq level */
\r
450 if (pxPort->ucIRQ <= 7)
\r
452 /* if 0<=irq<=7 first IMR address used */
\r
453 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
454 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
455 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
456 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
460 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
461 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
462 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
463 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
466 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
467 to set baud rate */
\r
468 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
469 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
470 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
472 /* reset usLineCtrlReg and Port Toggleout */
\r
473 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
475 portENTER_CRITICAL();
\r
477 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
479 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
482 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
483 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
485 /* enable interrupt pxPort->ucIRQ level */
\r
486 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
488 /* And allow interrupts again now the hairy bit's done */
\r
489 portEXIT_CRITICAL();
\r
491 /* This version does not allow flow control. */
\r
492 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
494 /* enable all communication's interrupts */
\r
495 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
497 /*-----------------------------------------------------------*/
\r
499 static portSHORT sComPortISR( const xComPort * const pxPort )
\r
501 portSHORT sInterruptID;
\r
502 portCHAR cIn, cOut;
\r
503 portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
\r
504 extern void vComTestUnsuspendTask( void );
\r
506 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
508 /* Decide which UART has issued the interrupt */
\r
509 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
511 /* service whatever requests the calling UART may have. The top 4 bits are
\r
512 either unused or indicate the presence of a functioning FIFO, which we don't
\r
513 need to know. So trim them off to simplify the switch statement below. */
\r
514 sInterruptID &= 0x0f;
\r
517 switch( sInterruptID )
\r
519 case 0x0c: /* Timeout
\r
520 Called when FIFO not up to trigger level but no activity for
\r
521 a while. Handled exactly as RDAINT, see below for
\r
525 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
526 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
528 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
529 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
530 this as an invalid call, then give the semaphore for real. */
\r
531 vComTestUnsuspendTask();
\r
532 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
534 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
537 case 0x06: /* LSINT */
\r
538 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
541 case 0x04: /* RDAINT */
\r
542 /* The usInterruptIDReg flag tested above stops when the
\r
543 FIFO is below the trigger level rather than empty, whereas
\r
544 this flag allows one to empty it: (do loop because there
\r
545 must be at least one to read by virtue of having got here.) */
\r
548 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
549 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
551 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
552 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
553 this as an invalid call, then give the semaphore for real. */
\r
554 vComTestUnsuspendTask();
\r
555 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
557 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
560 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
561 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xTaskWokenByTx ) != pdTRUE )
\r
563 /* Queue empty, nothing to send */
\r
564 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
568 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );
\r
572 case 0x00: /* MSINT */
\r
573 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
577 /* Get the next instruction, trimming as above */
\r
578 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
580 } while( !( sInterruptID & 0x01 ) );
\r
582 if( pxPort->ucIRQ > 7 )
\r
584 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
585 portOUTPUT_BYTE( 0x20, 0x62);
\r
589 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
592 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
594 /* If posting any of the characters to a queue woke a task that was blocked on
\r
595 the queue we may want to return to the task just woken (depending on its
\r
596 priority relative to the task this ISR interrupted. */
\r
597 if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx )
\r
606 /*-----------------------------------------------------------*/
\r
608 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )
\r
610 /* Get the next character from the buffer, note that this routine is only
\r
611 called having checked that the is (at least) one to get */
\r
612 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
621 /*-----------------------------------------------------------*/
\r
623 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )
\r
625 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
630 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
634 /*-----------------------------------------------------------*/
\r
636 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
638 portCHAR * pcNextChar;
\r
639 const portTickType xNoBlock = ( portTickType ) 0;
\r
641 /* Stop warnings. */
\r
642 ( void ) usStringLength;
\r
644 pcNextChar = ( portCHAR * ) pcString;
\r
645 while( *pcNextChar )
\r
647 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
651 /*-----------------------------------------------------------*/
\r
653 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
655 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
657 /* This function does nothing interesting, but test the
\r
658 semaphore from ISR mechanism. */
\r
659 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
661 /*-----------------------------------------------------------*/
\r
663 void vSerialClose( xComPortHandle xPort )
\r
665 portENTER_CRITICAL();
\r
667 /* Turn off the interrupts. */
\r
668 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
669 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
671 /* Put back the original ISR. */
\r
672 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
674 /* Remove the reference in the array of xComPort structures. */
\r
675 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
677 /* Delete the queues. */
\r
678 vQueueDelete( xPort->xRxedChars );
\r
679 vQueueDelete( xPort->xCharsForTx );
\r
681 vPortFree( ( void * ) xPort );
\r
683 portEXIT_CRITICAL();
\r