2 This serial port driver is borrowed heavily from DZComm. I have
\r
3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
\r
5 http://dzcomm.sourceforge.net
\r
8 FreeRTOS.org V5.3.0 - Copyright (C) 2003-2009 Richard Barry.
\r
10 This file is part of the FreeRTOS.org distribution.
\r
12 FreeRTOS.org is free software; you can redistribute it and/or modify it
\r
13 under the terms of the GNU General Public License (version 2) as published
\r
14 by the Free Software Foundation and modified by the FreeRTOS exception.
\r
15 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
16 combined work that includes FreeRTOS.org without being obliged to provide
\r
17 the source code for any proprietary components. Alternative commercial
\r
18 license and support terms are also available upon request. See the
\r
19 licensing section of http://www.FreeRTOS.org for full details.
\r
21 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
\r
22 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
23 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
26 You should have received a copy of the GNU General Public License along
\r
27 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
\r
28 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
31 ***************************************************************************
\r
33 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
\r
35 * This is a concise, step by step, 'hands on' guide that describes both *
\r
36 * general multitasking concepts and FreeRTOS specifics. It presents and *
\r
37 * explains numerous examples that are written using the FreeRTOS API. *
\r
38 * Full source code for all the examples is provided in an accompanying *
\r
41 ***************************************************************************
\r
45 Please ensure to read the configuration and relevant port sections of the
\r
46 online documentation.
\r
48 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
51 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
54 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
55 licensing and training services.
\r
61 + Call to the more efficient portSWITCH_CONTEXT() replaces the call to
\r
62 taskYIELD() in the ISR.
\r
64 Changes from V1.2.0:
\r
66 + Added vSerialPutString().
\r
70 + The function xPortInitMinimal() has been renamed to
\r
71 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
72 to xSerialPortInit().
\r
76 + Use portTickType in place of unsigned pdLONG for delay periods.
\r
77 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
\r
83 #include "FreeRTOS.h"
\r
87 #include "portasm.h"
\r
89 #define serMAX_IRQs ( 16 )
\r
90 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
91 #define serCOM1_STANDARD_IRQ ( ( unsigned portCHAR ) 4 )
\r
92 #define serCOM2_STANDARD_IRQ ( ( unsigned portCHAR ) 3 )
\r
95 #define serIMR_8259_0 ( ( unsigned portCHAR ) 0x21 )
\r
96 #define serIMR_8259_1 ( ( unsigned portCHAR ) 0xa1 )
\r
97 #define serISR_8259_0 ( ( unsigned portCHAR ) 0x20 )
\r
98 #define serISR_8259_1 ( ( unsigned portCHAR ) 0xa0 )
\r
99 #define serALL_COMS_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
100 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
102 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
103 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
104 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
105 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
106 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
107 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
108 #define serFIFO_CTRL_OFFSET ( 2 )
\r
109 #define serLINE_CTRL_OFFSET ( 3 )
\r
110 #define serMODEM_CTRL_OFFSET ( 4 )
\r
111 #define serLINE_STATUS_OFFSET ( 5 )
\r
112 #define serMODEM_STATUS_OFFSET ( 6 )
\r
113 #define serSCR_OFFSET ( 7 )
\r
115 #define serMAX_BAUD ( ( unsigned portLONG ) 115200UL )
\r
117 #define serNO_INTERRUPTS ( 0x00 )
\r
119 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
121 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
122 if( !( ucIn & ucInterrupt ) ) \
\r
124 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
127 /*-----------------------------------------------------------*/
\r
129 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
131 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
132 if( ucIn & ucInterrupt ) \
\r
134 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
137 /*-----------------------------------------------------------*/
\r
195 /* This *MUST* match the order in the eBaud definition. */
\r
196 unsigned portLONG ulBaudFromEnum[] =
\r
198 ( unsigned portLONG ) 50,
\r
199 ( unsigned portLONG ) 75,
\r
200 ( unsigned portLONG ) 110,
\r
201 ( unsigned portLONG ) 134,
\r
202 ( unsigned portLONG ) 150,
\r
203 ( unsigned portLONG ) 200,
\r
204 ( unsigned portLONG ) 300,
\r
205 ( unsigned portLONG ) 600,
\r
206 ( unsigned portLONG ) 1200,
\r
207 ( unsigned portLONG ) 1800,
\r
208 ( unsigned portLONG ) 2400,
\r
209 ( unsigned portLONG ) 4800,
\r
210 ( unsigned portLONG ) 9600,
\r
211 ( unsigned portLONG ) 19200,
\r
212 ( unsigned portLONG ) 38400UL,
\r
213 ( unsigned portLONG ) 57600UL,
\r
214 ( unsigned portLONG ) 115200UL
\r
217 typedef struct xCOM_PORT
\r
219 unsigned portSHORT sPort; /* comm port address eg. 0x3f8 */
\r
220 unsigned portCHAR ucIRQ; /* comm IRQ eg. 3 */
\r
222 /* Next two fields used for setting up the IRQ routine and
\r
223 * (un)masking the interrupt in certain circumstances.
\r
225 unsigned portSHORT usIRQVector;
\r
226 unsigned portCHAR ucInterruptEnableMast;
\r
228 /* Read/Write buffers. */
\r
229 xQueueHandle xRxedChars;
\r
230 xQueueHandle xCharsForTx;
\r
232 /* This lot are set up to minimise CPU time where accessing the comm
\r
233 * port's registers.
\r
235 unsigned portSHORT usTransmitHoldReg;
\r
236 unsigned portSHORT usReceiveDataRegister;
\r
237 unsigned portSHORT usBaudRateDivisorLow;
\r
238 unsigned portSHORT usBaudRateDivisorHigh;
\r
239 unsigned portSHORT usInterruptEnableReg;
\r
240 unsigned portSHORT usInterruptIDReg;
\r
241 unsigned portSHORT usFIFOCtrlReg;
\r
242 unsigned portSHORT usLineCtrlReg;
\r
243 unsigned portSHORT usModemCtrlReg;
\r
244 unsigned portSHORT usLineStatusReg;
\r
245 unsigned portSHORT usModemStatusReg;
\r
246 unsigned portSHORT usSCRReg;
\r
247 unsigned portSHORT us8259InterruptServiceReg;
\r
248 unsigned portSHORT us8259InterruptMaskReg;
\r
250 /* This semaphore does nothing useful except test a feature of the
\r
252 xSemaphoreHandle xTestSem;
\r
256 typedef xComPort *xComPortHandle;
\r
258 /* A xComPort structure can be associated with each IRQ. Initially none
\r
259 are create/installed. */
\r
260 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
262 /*-----------------------------------------------------------*/
\r
264 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
265 the xComPortHandle structure details to be private to this file. */
\r
266 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
267 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );
\r
268 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );
\r
269 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
271 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
272 static portSHORT sComPortISR( const xComPort * const pxPort );
\r
274 /*-----------------------------------------------------------*/
\r
276 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
278 #define COM_IRQ_WRAPPER(N) \
\r
279 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
281 portDISABLE_INTERRUPTS(); \
\r
282 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
284 portSWITCH_CONTEXT(); \
\r
288 COM_IRQ_WRAPPER( 0 )
\r
289 COM_IRQ_WRAPPER( 1 )
\r
290 COM_IRQ_WRAPPER( 2 )
\r
291 COM_IRQ_WRAPPER( 3 )
\r
292 COM_IRQ_WRAPPER( 4 )
\r
293 COM_IRQ_WRAPPER( 5 )
\r
294 COM_IRQ_WRAPPER( 6 )
\r
295 COM_IRQ_WRAPPER( 7 )
\r
296 COM_IRQ_WRAPPER( 8 )
\r
297 COM_IRQ_WRAPPER( 9 )
\r
298 COM_IRQ_WRAPPER( 10 )
\r
299 COM_IRQ_WRAPPER( 11 )
\r
300 COM_IRQ_WRAPPER( 12 )
\r
301 COM_IRQ_WRAPPER( 13 )
\r
302 COM_IRQ_WRAPPER( 14 )
\r
303 COM_IRQ_WRAPPER( 15 )
\r
305 static pxISR xISRs[ serMAX_IRQs ] =
\r
317 COM_IRQ10_WRAPPER,
\r
318 COM_IRQ11_WRAPPER,
\r
319 COM_IRQ12_WRAPPER,
\r
320 COM_IRQ13_WRAPPER,
\r
325 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
327 /*-----------------------------------------------------------*/
\r
330 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
334 /* Create a structure to handle this port. */
\r
335 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
337 if( pxPort != NULL )
\r
339 /* Create the queues used by the comtest task. */
\r
340 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
341 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
343 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
344 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
346 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
353 /*-----------------------------------------------------------*/
\r
355 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
358 unsigned portLONG ulDivisor;
\r
359 unsigned portCHAR ucDivisorLow;
\r
360 unsigned portCHAR ucDivisorHigh;
\r
361 unsigned portCHAR ucCommParam;
\r
363 /* IRQ numbers - standard */
\r
364 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
366 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
367 pxPort->sPort = 0x3f8;
\r
371 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
372 pxPort->sPort = 0x2f8;
\r
375 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
376 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
377 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
378 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
379 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
380 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
381 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
382 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
383 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
384 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
385 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
386 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
387 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
389 /* Set communication parameters. */
\r
390 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
391 ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;
\r
392 ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );
\r
394 switch( eWantedParity )
\r
396 case serNO_PARITY: ucCommParam = 0x00;
\r
398 case serODD_PARITY: ucCommParam = 0x08;
\r
400 case serEVEN_PARITY: ucCommParam = 0x18;
\r
402 case serMARK_PARITY: ucCommParam = 0x28;
\r
404 case serSPACE_PARITY: ucCommParam = 0x38;
\r
406 default: ucCommParam = 0x00;
\r
410 switch ( eWantedDataBits )
\r
412 case serBITS_5: ucCommParam |= 0x00;
\r
414 case serBITS_6: ucCommParam |= 0x01;
\r
416 case serBITS_7: ucCommParam |= 0x02;
\r
418 case serBITS_8: ucCommParam |= 0x03;
\r
420 default: ucCommParam |= 0x03;
\r
424 if( eWantedStopBits == serSTOP_2 )
\r
426 ucCommParam |= 0x04;
\r
429 /* Reset UART into known state - Thanks to Bradley Town */
\r
430 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
431 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
432 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
434 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
435 setting up FIFO if possible */
\r
436 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
437 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
439 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
441 /* The chip is better than an 8250 */
\r
442 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
443 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
445 /* Try and start the FIFO. It appears that some chips need a two call
\r
446 protocol, but those that don't seem to work even if you do start it twice.
\r
447 The first call is simply to start it, the second starts it and sets an 8
\r
448 byte FIFO trigger level. */
\r
449 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
450 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
451 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
453 /* Check that the FIFO initialised */
\r
454 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
456 /* It didn't so we assume it isn't there but disable it to be on the
\r
458 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
462 /* End of (modified) SVAsync code.
\r
463 Set interrupt parameters calculating mask for 8259 controller's
\r
464 IMR and number of interrupt handler for given irq level */
\r
465 if (pxPort->ucIRQ <= 7)
\r
467 /* if 0<=irq<=7 first IMR address used */
\r
468 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
469 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
470 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
471 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
475 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
476 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
477 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
478 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
481 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
482 to set baud rate */
\r
483 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
484 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
485 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
487 /* reset usLineCtrlReg and Port Toggleout */
\r
488 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
490 portENTER_CRITICAL();
\r
492 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
494 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
497 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
498 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
500 /* enable interrupt pxPort->ucIRQ level */
\r
501 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
503 /* And allow interrupts again now the hairy bit's done */
\r
504 portEXIT_CRITICAL();
\r
506 /* This version does not allow flow control. */
\r
507 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
509 /* enable all communication's interrupts */
\r
510 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
512 /*-----------------------------------------------------------*/
\r
514 static portSHORT sComPortISR( const xComPort * const pxPort )
\r
516 portSHORT sInterruptID;
\r
517 portCHAR cIn, cOut;
\r
518 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
519 extern void vComTestUnsuspendTask( void );
\r
521 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
523 /* Decide which UART has issued the interrupt */
\r
524 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
526 /* service whatever requests the calling UART may have. The top 4 bits are
\r
527 either unused or indicate the presence of a functioning FIFO, which we don't
\r
528 need to know. So trim them off to simplify the switch statement below. */
\r
529 sInterruptID &= 0x0f;
\r
532 switch( sInterruptID )
\r
534 case 0x0c: /* Timeout
\r
535 Called when FIFO not up to trigger level but no activity for
\r
536 a while. Handled exactly as RDAINT, see below for
\r
540 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
541 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
543 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
544 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
545 this as an invalid call, then give the semaphore for real. */
\r
546 vComTestUnsuspendTask();
\r
547 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
549 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
552 case 0x06: /* LSINT */
\r
553 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
556 case 0x04: /* RDAINT */
\r
557 /* The usInterruptIDReg flag tested above stops when the
\r
558 FIFO is below the trigger level rather than empty, whereas
\r
559 this flag allows one to empty it: (do loop because there
\r
560 must be at least one to read by virtue of having got here.) */
\r
563 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
564 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
566 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
567 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
568 this as an invalid call, then give the semaphore for real. */
\r
569 vComTestUnsuspendTask();
\r
570 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
572 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
575 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
576 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )
\r
578 /* Queue empty, nothing to send */
\r
579 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
583 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );
\r
587 case 0x00: /* MSINT */
\r
588 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
592 /* Get the next instruction, trimming as above */
\r
593 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
595 } while( !( sInterruptID & 0x01 ) );
\r
597 if( pxPort->ucIRQ > 7 )
\r
599 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
600 portOUTPUT_BYTE( 0x20, 0x62);
\r
604 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
607 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
609 /* If posting any of the characters to a queue woke a task that was blocked on
\r
610 the queue we may want to return to the task just woken (depending on its
\r
611 priority relative to the task this ISR interrupted. */
\r
612 return xHigherPriorityTaskWoken;
\r
614 /*-----------------------------------------------------------*/
\r
616 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )
\r
618 /* Get the next character from the buffer, note that this routine is only
\r
619 called having checked that the is (at least) one to get */
\r
620 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
629 /*-----------------------------------------------------------*/
\r
631 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )
\r
633 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
638 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
642 /*-----------------------------------------------------------*/
\r
644 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
646 portCHAR * pcNextChar;
\r
647 const portTickType xNoBlock = ( portTickType ) 0;
\r
649 /* Stop warnings. */
\r
650 ( void ) usStringLength;
\r
652 pcNextChar = ( portCHAR * ) pcString;
\r
653 while( *pcNextChar )
\r
655 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
659 /*-----------------------------------------------------------*/
\r
661 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
663 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
665 /* This function does nothing interesting, but test the
\r
666 semaphore from ISR mechanism. */
\r
667 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
669 /*-----------------------------------------------------------*/
\r
671 void vSerialClose( xComPortHandle xPort )
\r
673 portENTER_CRITICAL();
\r
675 /* Turn off the interrupts. */
\r
676 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
677 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
679 /* Put back the original ISR. */
\r
680 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
682 /* Remove the reference in the array of xComPort structures. */
\r
683 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
685 /* Delete the queues. */
\r
686 vQueueDelete( xPort->xRxedChars );
\r
687 vQueueDelete( xPort->xCharsForTx );
\r
689 vPortFree( ( void * ) xPort );
\r
691 portEXIT_CRITICAL();
\r