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V4.2.1 files.
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1 /*\r
2         This serial port driver is borrowed heavily from DZComm.  I have\r
3         simplified it by removing a lot of the functionality (hardware \r
4         flow control, etc.).  For more details and the full version see\r
5         http://dzcomm.sourceforge.net\r
6 \r
7 \r
8         FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.\r
9 \r
10         This file is part of the FreeRTOS.org distribution.\r
11 \r
12         FreeRTOS.org is free software; you can redistribute it and/or modify\r
13         it under the terms of the GNU General Public License as published by\r
14         the Free Software Foundation; either version 2 of the License, or\r
15         (at your option) any later version.\r
16 \r
17         FreeRTOS.org is distributed in the hope that it will be useful,\r
18         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
19         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
20         GNU General Public License for more details.\r
21 \r
22         You should have received a copy of the GNU General Public License\r
23         along with FreeRTOS.org; if not, write to the Free Software\r
24         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
25 \r
26         A special exception to the GPL can be applied should you wish to distribute\r
27         a combined work that includes FreeRTOS.org, without being obliged to provide\r
28         the source code for any proprietary components.  See the licensing section \r
29         of http://www.FreeRTOS.org for full details of how and when the exception\r
30         can be applied.\r
31 \r
32         ***************************************************************************\r
33         See http://www.FreeRTOS.org for documentation, latest information, license \r
34         and contact details.  Please ensure to read the configuration and relevant \r
35         port sections of the online documentation.\r
36 \r
37         Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
38         with commercial development and support options.\r
39         ***************************************************************************\r
40 */\r
41 \r
42 /*\r
43 Changes from V1.00:\r
44         \r
45         + Call to the more efficient portSWITCH_CONTEXT() replaces the call to \r
46           taskYIELD() in the ISR.\r
47 \r
48 Changes from V1.2.0:\r
49 \r
50         + Added vSerialPutString().\r
51 \r
52 Changes from V1.2.3\r
53 \r
54         + The function xPortInitMinimal() has been renamed to \r
55           xSerialPortInitMinimal() and the function xPortInit() has been renamed\r
56           to xSerialPortInit().\r
57 \r
58 Changes From V2.0.0\r
59 \r
60         + Use portTickType in place of unsigned pdLONG for delay periods.\r
61         + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.\r
62 */\r
63 \r
64 \r
65 #include <stdlib.h>\r
66 #include <dos.h>\r
67 #include "FreeRTOS.h"\r
68 #include "queue.h"\r
69 #include "task.h"\r
70 #include "semphr.h"\r
71 #include "portasm.h"\r
72 \r
73 #define serMAX_IRQs                                             ( 16 )\r
74 #define serTRANSMIT_HOLD_EMPTY_INT              ( 0x02 )\r
75 #define serCOM1_STANDARD_IRQ                    ( ( unsigned portCHAR ) 4 )\r
76 #define serCOM2_STANDARD_IRQ                    ( ( unsigned portCHAR ) 3 )\r
77 \r
78 \r
79 #define serIMR_8259_0                                   ( ( unsigned portCHAR ) 0x21 )\r
80 #define serIMR_8259_1                                   ( ( unsigned portCHAR ) 0xa1 )\r
81 #define serISR_8259_0                                   ( ( unsigned portCHAR ) 0x20 )\r
82 #define serISR_8259_1                                   ( ( unsigned portCHAR ) 0xa0 )\r
83 #define serALL_COMS_INTERRUPTS                  ( ( unsigned portCHAR ) 0x0f )\r
84 #define serALL_MODEM_CTRL_INTERRUPTS    ( ( unsigned portCHAR ) 0x0f )\r
85 \r
86 #define serTRANSMIT_HOLD_OFFSET                                 ( 0 )\r
87 #define serRECEIVE_DATA_OFFSET                                  ( 0 )\r
88 #define serBAUD_RATE_DIVISOR_LOW_OFFSET                 ( 0 )\r
89 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET                ( 1 )\r
90 #define serINTERRUPT_ENABLE_OFFSET                              ( 1 )\r
91 #define serINTERRUPT_ID_OFFSET                                  ( 2 )\r
92 #define serFIFO_CTRL_OFFSET                                             ( 2 )\r
93 #define serLINE_CTRL_OFFSET                                             ( 3 )\r
94 #define serMODEM_CTRL_OFFSET                                    ( 4 )\r
95 #define serLINE_STATUS_OFFSET                                   ( 5 )\r
96 #define serMODEM_STATUS_OFFSET                                  ( 6 )\r
97 #define serSCR_OFFSET                                                   ( 7 )\r
98 \r
99 #define serMAX_BAUD                     ( ( unsigned portLONG ) 115200UL )\r
100 \r
101 #define serNO_INTERRUPTS        ( 0x00 )\r
102 \r
103 #define vInterruptOn( pxPort, ucInterrupt )                                                                             \\r
104 {                                                                                                                                                               \\r
105         unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );        \\r
106         if( !( ucIn & ucInterrupt ) )                                                                                           \\r
107         {                                                                                                                                                       \\r
108                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt );    \\r
109         }                                                                                                                                                       \\r
110 }                                                                                                                                                               \r
111 /*-----------------------------------------------------------*/\r
112 \r
113 #define vInterruptOff( pxPort, ucInterrupt )                                                                    \\r
114 {                                                                                                                                                               \\r
115         unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );        \\r
116         if( ucIn & ucInterrupt )                                                                                                        \\r
117         {                                                                                                                                                       \\r
118                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt);    \\r
119         }                                                                                                                                                       \\r
120 }\r
121 /*-----------------------------------------------------------*/\r
122 \r
123 typedef enum\r
124\r
125         serCOM1, \r
126         serCOM2, \r
127         serCOM3, \r
128         serCOM4, \r
129         serCOM5, \r
130         serCOM6, \r
131         serCOM7, \r
132         serCOM8 \r
133 } eCOMPort;\r
134 \r
135 typedef enum \r
136\r
137         serNO_PARITY, \r
138         serODD_PARITY, \r
139         serEVEN_PARITY, \r
140         serMARK_PARITY, \r
141         serSPACE_PARITY \r
142 } eParity;\r
143 \r
144 typedef enum \r
145\r
146         serSTOP_1, \r
147         serSTOP_2 \r
148 } eStopBits;\r
149 \r
150 typedef enum \r
151\r
152         serBITS_5, \r
153         serBITS_6, \r
154         serBITS_7, \r
155         serBITS_8 \r
156 } eDataBits;\r
157 \r
158 typedef enum \r
159\r
160         ser50,          \r
161         ser75,          \r
162         ser110,         \r
163         ser134,         \r
164         ser150,    \r
165         ser200,\r
166         ser300,         \r
167         ser600,         \r
168         ser1200,        \r
169         ser1800,        \r
170         ser2400,   \r
171         ser4800,\r
172         ser9600,                \r
173         ser19200,       \r
174         ser38400,       \r
175         ser57600,       \r
176         ser115200\r
177 } eBaud;\r
178 \r
179 /* This *MUST* match the order in the eBaud definition. */\r
180 unsigned portLONG ulBaudFromEnum[] = \r
181\r
182         ( unsigned portLONG ) 50, \r
183         ( unsigned portLONG ) 75, \r
184         ( unsigned portLONG ) 110, \r
185         ( unsigned portLONG ) 134, \r
186         ( unsigned portLONG ) 150,      \r
187         ( unsigned portLONG ) 200, \r
188         ( unsigned portLONG ) 300, \r
189         ( unsigned portLONG ) 600, \r
190         ( unsigned portLONG ) 1200, \r
191         ( unsigned portLONG ) 1800, \r
192         ( unsigned portLONG ) 2400,   \r
193         ( unsigned portLONG ) 4800,   \r
194         ( unsigned portLONG ) 9600,  \r
195         ( unsigned portLONG ) 19200,  \r
196         ( unsigned portLONG ) 38400UL,\r
197         ( unsigned portLONG ) 57600UL,\r
198         ( unsigned portLONG ) 115200UL\r
199 };\r
200 \r
201 typedef struct xCOM_PORT\r
202\r
203         unsigned portSHORT sPort;   /* comm port address eg. 0x3f8    */\r
204         unsigned portCHAR ucIRQ;    /* comm IRQ eg. 3                 */\r
205 \r
206         /* Next two fields used for setting up the IRQ routine and\r
207         * (un)masking the interrupt in certain circumstances.\r
208         */\r
209         unsigned portSHORT usIRQVector;\r
210         unsigned portCHAR ucInterruptEnableMast;\r
211 \r
212         /* Read/Write buffers. */\r
213         xQueueHandle xRxedChars; \r
214         xQueueHandle xCharsForTx;\r
215 \r
216         /* This lot are set up to minimise CPU time where accessing the comm\r
217         * port's registers.\r
218         */\r
219         unsigned portSHORT usTransmitHoldReg; \r
220         unsigned portSHORT usReceiveDataRegister;\r
221         unsigned portSHORT usBaudRateDivisorLow; \r
222         unsigned portSHORT usBaudRateDivisorHigh;\r
223         unsigned portSHORT usInterruptEnableReg;\r
224         unsigned portSHORT usInterruptIDReg;\r
225         unsigned portSHORT usFIFOCtrlReg;\r
226         unsigned portSHORT usLineCtrlReg;\r
227         unsigned portSHORT usModemCtrlReg;\r
228         unsigned portSHORT usLineStatusReg;\r
229         unsigned portSHORT usModemStatusReg;\r
230         unsigned portSHORT usSCRReg;\r
231         unsigned portSHORT us8259InterruptServiceReg;\r
232         unsigned portSHORT us8259InterruptMaskReg;\r
233 \r
234         /* This semaphore does nothing useful except test a feature of the\r
235         scheduler. */\r
236         xSemaphoreHandle xTestSem;\r
237 \r
238 } xComPort;\r
239 \r
240 typedef xComPort *xComPortHandle;\r
241 \r
242 /* A xComPort structure can be associated with each IRQ.  Initially none\r
243 are create/installed. */\r
244 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };\r
245 \r
246 /*-----------------------------------------------------------*/\r
247 \r
248 /* These prototypes are repeated here so we don't have to include the serial header.  This allows\r
249 the xComPortHandle structure details to be private to this file. */\r
250 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );\r
251 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );\r
252 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );\r
253 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );\r
254 \r
255 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );\r
256 static portSHORT sComPortISR( const xComPort * const pxPort );\r
257 \r
258 /*-----------------------------------------------------------*/\r
259 \r
260 /* Define an interrupt handler for each slot in the xPortStatus array. */\r
261 \r
262 #define COM_IRQ_WRAPPER(N)                                                                              \\r
263         static void __interrupt COM_IRQ##N##_WRAPPER( void )            \\r
264         {                                                                                                                       \\r
265                 portDISABLE_INTERRUPTS();                                                               \\r
266                 if( sComPortISR( xPortStatus[##N##] ) )                                 \\r
267                 {                                                                                                               \\r
268                         portSWITCH_CONTEXT();                                                           \\r
269                 }                                                                                                               \\r
270         } \r
271 \r
272 COM_IRQ_WRAPPER( 0 )\r
273 COM_IRQ_WRAPPER( 1 )\r
274 COM_IRQ_WRAPPER( 2 )\r
275 COM_IRQ_WRAPPER( 3 )\r
276 COM_IRQ_WRAPPER( 4 )\r
277 COM_IRQ_WRAPPER( 5 )\r
278 COM_IRQ_WRAPPER( 6 )\r
279 COM_IRQ_WRAPPER( 7 )\r
280 COM_IRQ_WRAPPER( 8 )\r
281 COM_IRQ_WRAPPER( 9 )\r
282 COM_IRQ_WRAPPER( 10 )\r
283 COM_IRQ_WRAPPER( 11 )\r
284 COM_IRQ_WRAPPER( 12 )\r
285 COM_IRQ_WRAPPER( 13 )\r
286 COM_IRQ_WRAPPER( 14 )\r
287 COM_IRQ_WRAPPER( 15 )\r
288 \r
289 static pxISR xISRs[ serMAX_IRQs ] = \r
290 {\r
291         COM_IRQ0_WRAPPER, \r
292         COM_IRQ1_WRAPPER, \r
293         COM_IRQ2_WRAPPER, \r
294         COM_IRQ3_WRAPPER, \r
295         COM_IRQ4_WRAPPER, \r
296         COM_IRQ5_WRAPPER, \r
297         COM_IRQ6_WRAPPER, \r
298         COM_IRQ7_WRAPPER, \r
299         COM_IRQ8_WRAPPER, \r
300         COM_IRQ9_WRAPPER, \r
301         COM_IRQ10_WRAPPER, \r
302         COM_IRQ11_WRAPPER, \r
303         COM_IRQ12_WRAPPER, \r
304         COM_IRQ13_WRAPPER, \r
305         COM_IRQ14_WRAPPER,\r
306         COM_IRQ15_WRAPPER\r
307 };\r
308 \r
309 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };\r
310 \r
311 /*-----------------------------------------------------------*/\r
312 \r
313 \r
314 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )\r
315 {\r
316 xComPort *pxPort;\r
317 \r
318         /* Create a structure to handle this port. */\r
319         pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );\r
320         \r
321         if( pxPort != NULL )\r
322         {\r
323                 /* Create the queues used by the comtest task. */\r
324                 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );\r
325                 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );\r
326 \r
327                 /* Create the test semaphore.  This does nothing useful except test a feature of the scheduler. */\r
328                 vSemaphoreCreateBinary( pxPort->xTestSem );\r
329 \r
330                 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );\r
331 \r
332                 return pxPort;\r
333         }\r
334 \r
335         return NULL;\r
336 }\r
337 /*-----------------------------------------------------------*/\r
338 \r
339 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )\r
340 {\r
341 portSHORT sIn;\r
342 unsigned portLONG ulDivisor;\r
343 unsigned portCHAR ucDivisorLow;\r
344 unsigned portCHAR ucDivisorHigh;\r
345 unsigned portCHAR ucCommParam;\r
346 \r
347         /* IRQ numbers - standard */\r
348         if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )\r
349         {\r
350                 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;\r
351                 pxPort->sPort = 0x3f8;\r
352         }\r
353         else\r
354         {\r
355                 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;\r
356                 pxPort->sPort = 0x2f8;\r
357         }\r
358 \r
359         /* Set up variables in port making it easy to see which sIn/o address is which */\r
360         pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;\r
361         pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;\r
362         pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;\r
363         pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;\r
364         pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;\r
365         pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;\r
366         pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;\r
367         pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;\r
368         pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;\r
369         pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;\r
370         pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;\r
371         pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;\r
372 \r
373         /* Set communication parameters. */\r
374         ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];\r
375         ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;\r
376         ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );\r
377         \r
378         switch( eWantedParity )\r
379         {       \r
380                 case serNO_PARITY:              ucCommParam = 0x00;\r
381                                                                 break;\r
382                 case serODD_PARITY:             ucCommParam = 0x08;\r
383                                                                 break;\r
384                 case serEVEN_PARITY:    ucCommParam = 0x18;\r
385                                                                 break;\r
386                 case serMARK_PARITY:    ucCommParam = 0x28;\r
387                                                                 break;\r
388                 case serSPACE_PARITY:   ucCommParam = 0x38;\r
389                                                                 break;\r
390                 default:                                ucCommParam = 0x00;\r
391                                                                 break;\r
392         }\r
393 \r
394         switch ( eWantedDataBits )\r
395         {\r
396                 case serBITS_5: ucCommParam |= 0x00;\r
397                                                 break;\r
398                 case serBITS_6: ucCommParam |= 0x01;\r
399                                                 break;\r
400                 case serBITS_7: ucCommParam |= 0x02;\r
401                                                 break;\r
402                 case serBITS_8: ucCommParam |= 0x03;\r
403                                                 break;\r
404                 default:                ucCommParam |= 0x03;\r
405                                                 break;\r
406         }\r
407 \r
408         if( eWantedStopBits == serSTOP_2 ) \r
409         {\r
410                 ucCommParam |= 0x04;\r
411         }\r
412 \r
413         /* Reset UART into known state - Thanks to Bradley Town */\r
414         portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 );                 /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */\r
415         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 );  /* Disable interrupts from UART */\r
416         portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 );                /* Enable some multi-port cards */\r
417 \r
418         /* Code based on stuff from SVAsync lib. Clear UART Status and data registers\r
419         setting up FIFO if possible */\r
420         sIn = portINPUT_BYTE( pxPort->usSCRReg );\r
421         portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );\r
422 \r
423         if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )\r
424         {\r
425                 /* The chip is better than an 8250 */\r
426                 portOUTPUT_BYTE( pxPort->usSCRReg, sIn );       /* Set usSCRReg back to what it was before */\r
427                 portINPUT_BYTE( pxPort->usSCRReg);                      /* Give slow motherboards a chance */\r
428 \r
429                 /* Try and start the FIFO. It appears that some chips need a two call \r
430                 protocol, but those that don't seem to work even if you do start it twice. \r
431                 The first call is simply to start it, the second starts it and sets an 8 \r
432                 byte FIFO trigger level. */\r
433                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );\r
434                 portINPUT_BYTE( pxPort->usFIFOCtrlReg );                        /* Give slow motherboards a chance to catch up */\r
435                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );\r
436 \r
437                 /* Check that the FIFO initialised */\r
438                 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )\r
439                 {\r
440                         /* It didn't so we assume it isn't there but disable it to be on the \r
441                         safe side. */\r
442                         portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );\r
443                 }\r
444         }\r
445 \r
446         /* End of (modified) SVAsync code.  \r
447         Set interrupt parameters calculating mask for 8259 controller's \r
448         IMR and number of interrupt handler for given irq level  */\r
449         if (pxPort->ucIRQ <= 7)\r
450         {       \r
451                 /* if 0<=irq<=7 first IMR address used */\r
452                 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);\r
453                 pxPort->usIRQVector = pxPort->ucIRQ + 8;\r
454                 pxPort->us8259InterruptMaskReg = serIMR_8259_0;\r
455                 pxPort->us8259InterruptServiceReg = serISR_8259_0;\r
456         }\r
457         else\r
458         {\r
459                 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );\r
460                 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;\r
461                 pxPort->us8259InterruptMaskReg = serIMR_8259_1;\r
462                 pxPort->us8259InterruptServiceReg = serISR_8259_1;\r
463         }\r
464 \r
465         /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers \r
466         to set baud rate */\r
467         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );\r
468         portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );\r
469         portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );\r
470 \r
471         /* reset usLineCtrlReg and Port Toggleout */\r
472         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );\r
473 \r
474         portENTER_CRITICAL();\r
475 \r
476         if( xPortStatus[ pxPort->ucIRQ ] == NULL )\r
477         {       \r
478                 xPortStatus[ pxPort->ucIRQ ] = pxPort;\r
479         }\r
480         \r
481         xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );\r
482         _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );\r
483 \r
484         /* enable interrupt pxPort->ucIRQ level */\r
485         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
486 \r
487         /* And allow interrupts again now the hairy bit's done */\r
488         portEXIT_CRITICAL();            \r
489 \r
490         /* This version does not allow flow control. */\r
491         portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );\r
492 \r
493         /* enable all communication's interrupts */\r
494         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );\r
495 }\r
496 /*-----------------------------------------------------------*/\r
497 \r
498 static portSHORT sComPortISR( const xComPort * const pxPort )\r
499 {\r
500 portSHORT sInterruptID;\r
501 portCHAR cIn, cOut;\r
502 portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;\r
503 \r
504         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );\r
505 \r
506         /* Decide which UART has issued the interrupt */\r
507         sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );\r
508 \r
509         /* service whatever requests the calling UART may have. The top 4 bits are\r
510         either unused or indicate the presence of a functioning FIFO, which we don't\r
511         need to know. So trim them off to simplify the switch statement below. */\r
512         sInterruptID &= 0x0f;\r
513         do\r
514         {\r
515                 switch( sInterruptID )\r
516                 {\r
517                         case 0x0c:      /* Timeout\r
518                                                 Called when FIFO not up to trigger level but no activity for \r
519                                                 a while. Handled exactly as RDAINT, see below for \r
520                                                 description. */\r
521                                                 do\r
522                                                 {\r
523                                                         cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                             \r
524                                                         xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );\r
525 \r
526                                                         /* Also release the semaphore - this does nothing interesting and is just a test. */\r
527                                                         xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );\r
528 \r
529                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
530                                                 break;\r
531 \r
532                         case 0x06:      /* LSINT */\r
533                                                 portINPUT_BYTE( pxPort->usLineStatusReg );\r
534                                                 break;\r
535 \r
536                         case 0x04:      /* RDAINT */\r
537                                                 /* The usInterruptIDReg flag tested above stops when the \r
538                                                 FIFO is below the trigger level rather than empty, whereas \r
539                                                 this flag allows one to empty it: (do loop because there \r
540                                                 must be at least one to read by virtue of having got here.) */\r
541                                                 do\r
542                                                 {\r
543                                                         cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                             \r
544                                                         xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );\r
545 \r
546                                                         /* Also release the semaphore - this does nothing interesting and is just a test. */\r
547                                                         xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );\r
548 \r
549                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
550                                                 break;\r
551 \r
552                         case 0x02:      /* serTRANSMIT_HOLD_EMPTY_INT */\r
553                                                 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xTaskWokenByTx ) != pdTRUE )                                             \r
554                                                 {                                                                                                                                                                               \r
555                                                         /* Queue empty, nothing to send */                                                                                                      \r
556                                                         vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);                                                                     \r
557                                                 }                                                                                                                                                                               \r
558                                                 else                                                                                                                                                                    \r
559                                                 {                                                                                                                                                                               \r
560                                                         portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );                                       \r
561                                                 }\r
562                                                 break;\r
563 \r
564                         case 0x00:      /* MSINT */\r
565                                                 portINPUT_BYTE( pxPort->usModemStatusReg );\r
566                                                 break;\r
567                 }               \r
568 \r
569                 /* Get the next instruction, trimming as above */\r
570                 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;\r
571 \r
572         } while( !( sInterruptID & 0x01 ) );\r
573 \r
574         if( pxPort->ucIRQ > 7 )\r
575         {\r
576                 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );\r
577                 portOUTPUT_BYTE( 0x20, 0x62);\r
578         }\r
579         else\r
580         {\r
581                 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );\r
582         }\r
583 \r
584         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
585 \r
586         /* If posting any of the characters to a queue woke a task that was blocked on\r
587         the queue we may want to return to the task just woken (depending on its \r
588         priority relative to the task this ISR interrupted. */\r
589         if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx )\r
590         {\r
591                 return pdTRUE;\r
592         }\r
593         else\r
594         {\r
595                 return pdFALSE;\r
596         }\r
597 }\r
598 /*-----------------------------------------------------------*/\r
599 \r
600 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )\r
601 {\r
602         /* Get the next character from the buffer, note that this routine is only \r
603         called having checked that the is (at least) one to get */\r
604         if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )\r
605         {\r
606                 return pdTRUE;\r
607         }\r
608         else\r
609         {\r
610                 return pdFALSE;\r
611         }\r
612 }\r
613 /*-----------------------------------------------------------*/\r
614 \r
615 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )\r
616 {\r
617         if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
618         {\r
619                 return pdFAIL;\r
620         }\r
621 \r
622         vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );\r
623 \r
624         return pdPASS;\r
625 }\r
626 /*-----------------------------------------------------------*/\r
627 \r
628 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )\r
629 {\r
630 portCHAR * pcNextChar;\r
631 const portTickType xNoBlock = ( portTickType ) 0;\r
632 \r
633         /* Stop warnings. */\r
634         ( void ) usStringLength;\r
635 \r
636         pcNextChar = ( portCHAR * ) pcString;\r
637         while( *pcNextChar )\r
638         {\r
639                 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );\r
640                 pcNextChar++;\r
641         }\r
642 }\r
643 /*-----------------------------------------------------------*/\r
644 \r
645 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )\r
646 {\r
647 const portTickType xBlockTime = ( portTickType ) 0xffff;\r
648 \r
649         /* This function does nothing interesting, but test the \r
650         semaphore from ISR mechanism. */\r
651         return xSemaphoreTake( xPort->xTestSem, xBlockTime );   \r
652 }\r
653 /*-----------------------------------------------------------*/\r
654 \r
655 void vSerialClose( xComPortHandle xPort )\r
656 {\r
657         portENTER_CRITICAL();\r
658 \r
659         /* Turn off the interrupts. */\r
660         portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );\r
661         portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );\r
662 \r
663         /* Put back the original ISR. */\r
664         _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );\r
665 \r
666         /* Remove the reference in the array of xComPort structures. */\r
667         xPortStatus[ xPort->ucIRQ ] = NULL;\r
668 \r
669         /* Delete the queues. */\r
670         vQueueDelete( xPort->xRxedChars );\r
671         vQueueDelete( xPort->xCharsForTx );\r
672 \r
673         vPortFree( ( void * ) xPort );\r
674 \r
675         portEXIT_CRITICAL();\r
676 }\r
677 \r