2 This serial port driver is borrowed heavily from DZComm. I have
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3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
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5 http://dzcomm.sourceforge.net
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8 FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
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10 This file is part of the FreeRTOS.org distribution.
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12 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
13 it under the terms of the GNU General Public License as published by
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14 the Free Software Foundation; either version 2 of the License, or
\r
15 (at your option) any later version.
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17 FreeRTOS.org is distributed in the hope that it will be useful,
\r
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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20 GNU General Public License for more details.
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22 You should have received a copy of the GNU General Public License
\r
23 along with FreeRTOS.org; if not, write to the Free Software
\r
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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26 A special exception to the GPL can be applied should you wish to distribute
\r
27 a combined work that includes FreeRTOS.org, without being obliged to provide
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28 the source code for any proprietary components. See the licensing section
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29 of http://www.FreeRTOS.org for full details of how and when the exception
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32 ***************************************************************************
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34 Please ensure to read the configuration and relevant port sections of the
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35 online documentation.
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37 +++ http://www.FreeRTOS.org +++
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38 Documentation, latest information, license and contact details.
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40 +++ http://www.SafeRTOS.com +++
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41 A version that is certified for use in safety critical systems.
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43 +++ http://www.OpenRTOS.com +++
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44 Commercial support, development, porting, licensing and training services.
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46 ***************************************************************************
\r
52 + Call to the more efficient portSWITCH_CONTEXT() replaces the call to
\r
53 taskYIELD() in the ISR.
\r
55 Changes from V1.2.0:
\r
57 + Added vSerialPutString().
\r
61 + The function xPortInitMinimal() has been renamed to
\r
62 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
63 to xSerialPortInit().
\r
67 + Use portTickType in place of unsigned pdLONG for delay periods.
\r
68 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
\r
74 #include "FreeRTOS.h"
\r
78 #include "portasm.h"
\r
80 #define serMAX_IRQs ( 16 )
\r
81 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
82 #define serCOM1_STANDARD_IRQ ( ( unsigned portCHAR ) 4 )
\r
83 #define serCOM2_STANDARD_IRQ ( ( unsigned portCHAR ) 3 )
\r
86 #define serIMR_8259_0 ( ( unsigned portCHAR ) 0x21 )
\r
87 #define serIMR_8259_1 ( ( unsigned portCHAR ) 0xa1 )
\r
88 #define serISR_8259_0 ( ( unsigned portCHAR ) 0x20 )
\r
89 #define serISR_8259_1 ( ( unsigned portCHAR ) 0xa0 )
\r
90 #define serALL_COMS_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
91 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
93 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
94 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
95 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
96 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
97 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
98 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
99 #define serFIFO_CTRL_OFFSET ( 2 )
\r
100 #define serLINE_CTRL_OFFSET ( 3 )
\r
101 #define serMODEM_CTRL_OFFSET ( 4 )
\r
102 #define serLINE_STATUS_OFFSET ( 5 )
\r
103 #define serMODEM_STATUS_OFFSET ( 6 )
\r
104 #define serSCR_OFFSET ( 7 )
\r
106 #define serMAX_BAUD ( ( unsigned portLONG ) 115200UL )
\r
108 #define serNO_INTERRUPTS ( 0x00 )
\r
110 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
112 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
113 if( !( ucIn & ucInterrupt ) ) \
\r
115 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
118 /*-----------------------------------------------------------*/
\r
120 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
122 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
123 if( ucIn & ucInterrupt ) \
\r
125 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
128 /*-----------------------------------------------------------*/
\r
186 /* This *MUST* match the order in the eBaud definition. */
\r
187 unsigned portLONG ulBaudFromEnum[] =
\r
189 ( unsigned portLONG ) 50,
\r
190 ( unsigned portLONG ) 75,
\r
191 ( unsigned portLONG ) 110,
\r
192 ( unsigned portLONG ) 134,
\r
193 ( unsigned portLONG ) 150,
\r
194 ( unsigned portLONG ) 200,
\r
195 ( unsigned portLONG ) 300,
\r
196 ( unsigned portLONG ) 600,
\r
197 ( unsigned portLONG ) 1200,
\r
198 ( unsigned portLONG ) 1800,
\r
199 ( unsigned portLONG ) 2400,
\r
200 ( unsigned portLONG ) 4800,
\r
201 ( unsigned portLONG ) 9600,
\r
202 ( unsigned portLONG ) 19200,
\r
203 ( unsigned portLONG ) 38400UL,
\r
204 ( unsigned portLONG ) 57600UL,
\r
205 ( unsigned portLONG ) 115200UL
\r
208 typedef struct xCOM_PORT
\r
210 unsigned portSHORT sPort; /* comm port address eg. 0x3f8 */
\r
211 unsigned portCHAR ucIRQ; /* comm IRQ eg. 3 */
\r
213 /* Next two fields used for setting up the IRQ routine and
\r
214 * (un)masking the interrupt in certain circumstances.
\r
216 unsigned portSHORT usIRQVector;
\r
217 unsigned portCHAR ucInterruptEnableMast;
\r
219 /* Read/Write buffers. */
\r
220 xQueueHandle xRxedChars;
\r
221 xQueueHandle xCharsForTx;
\r
223 /* This lot are set up to minimise CPU time where accessing the comm
\r
224 * port's registers.
\r
226 unsigned portSHORT usTransmitHoldReg;
\r
227 unsigned portSHORT usReceiveDataRegister;
\r
228 unsigned portSHORT usBaudRateDivisorLow;
\r
229 unsigned portSHORT usBaudRateDivisorHigh;
\r
230 unsigned portSHORT usInterruptEnableReg;
\r
231 unsigned portSHORT usInterruptIDReg;
\r
232 unsigned portSHORT usFIFOCtrlReg;
\r
233 unsigned portSHORT usLineCtrlReg;
\r
234 unsigned portSHORT usModemCtrlReg;
\r
235 unsigned portSHORT usLineStatusReg;
\r
236 unsigned portSHORT usModemStatusReg;
\r
237 unsigned portSHORT usSCRReg;
\r
238 unsigned portSHORT us8259InterruptServiceReg;
\r
239 unsigned portSHORT us8259InterruptMaskReg;
\r
241 /* This semaphore does nothing useful except test a feature of the
\r
243 xSemaphoreHandle xTestSem;
\r
247 typedef xComPort *xComPortHandle;
\r
249 /* A xComPort structure can be associated with each IRQ. Initially none
\r
250 are create/installed. */
\r
251 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
253 /*-----------------------------------------------------------*/
\r
255 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
256 the xComPortHandle structure details to be private to this file. */
\r
257 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
258 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );
\r
259 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );
\r
260 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
262 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
263 static portSHORT sComPortISR( const xComPort * const pxPort );
\r
265 /*-----------------------------------------------------------*/
\r
267 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
269 #define COM_IRQ_WRAPPER(N) \
\r
270 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
272 portDISABLE_INTERRUPTS(); \
\r
273 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
275 portSWITCH_CONTEXT(); \
\r
279 COM_IRQ_WRAPPER( 0 )
\r
280 COM_IRQ_WRAPPER( 1 )
\r
281 COM_IRQ_WRAPPER( 2 )
\r
282 COM_IRQ_WRAPPER( 3 )
\r
283 COM_IRQ_WRAPPER( 4 )
\r
284 COM_IRQ_WRAPPER( 5 )
\r
285 COM_IRQ_WRAPPER( 6 )
\r
286 COM_IRQ_WRAPPER( 7 )
\r
287 COM_IRQ_WRAPPER( 8 )
\r
288 COM_IRQ_WRAPPER( 9 )
\r
289 COM_IRQ_WRAPPER( 10 )
\r
290 COM_IRQ_WRAPPER( 11 )
\r
291 COM_IRQ_WRAPPER( 12 )
\r
292 COM_IRQ_WRAPPER( 13 )
\r
293 COM_IRQ_WRAPPER( 14 )
\r
294 COM_IRQ_WRAPPER( 15 )
\r
296 static pxISR xISRs[ serMAX_IRQs ] =
\r
308 COM_IRQ10_WRAPPER,
\r
309 COM_IRQ11_WRAPPER,
\r
310 COM_IRQ12_WRAPPER,
\r
311 COM_IRQ13_WRAPPER,
\r
316 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
318 /*-----------------------------------------------------------*/
\r
321 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
325 /* Create a structure to handle this port. */
\r
326 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
328 if( pxPort != NULL )
\r
330 /* Create the queues used by the comtest task. */
\r
331 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
332 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
334 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
335 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
337 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
344 /*-----------------------------------------------------------*/
\r
346 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
349 unsigned portLONG ulDivisor;
\r
350 unsigned portCHAR ucDivisorLow;
\r
351 unsigned portCHAR ucDivisorHigh;
\r
352 unsigned portCHAR ucCommParam;
\r
354 /* IRQ numbers - standard */
\r
355 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
357 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
358 pxPort->sPort = 0x3f8;
\r
362 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
363 pxPort->sPort = 0x2f8;
\r
366 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
367 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
368 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
369 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
370 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
371 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
372 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
373 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
374 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
375 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
376 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
377 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
378 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
380 /* Set communication parameters. */
\r
381 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
382 ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;
\r
383 ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );
\r
385 switch( eWantedParity )
\r
387 case serNO_PARITY: ucCommParam = 0x00;
\r
389 case serODD_PARITY: ucCommParam = 0x08;
\r
391 case serEVEN_PARITY: ucCommParam = 0x18;
\r
393 case serMARK_PARITY: ucCommParam = 0x28;
\r
395 case serSPACE_PARITY: ucCommParam = 0x38;
\r
397 default: ucCommParam = 0x00;
\r
401 switch ( eWantedDataBits )
\r
403 case serBITS_5: ucCommParam |= 0x00;
\r
405 case serBITS_6: ucCommParam |= 0x01;
\r
407 case serBITS_7: ucCommParam |= 0x02;
\r
409 case serBITS_8: ucCommParam |= 0x03;
\r
411 default: ucCommParam |= 0x03;
\r
415 if( eWantedStopBits == serSTOP_2 )
\r
417 ucCommParam |= 0x04;
\r
420 /* Reset UART into known state - Thanks to Bradley Town */
\r
421 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
422 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
423 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
425 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
426 setting up FIFO if possible */
\r
427 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
428 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
430 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
432 /* The chip is better than an 8250 */
\r
433 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
434 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
436 /* Try and start the FIFO. It appears that some chips need a two call
\r
437 protocol, but those that don't seem to work even if you do start it twice.
\r
438 The first call is simply to start it, the second starts it and sets an 8
\r
439 byte FIFO trigger level. */
\r
440 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
441 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
442 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
444 /* Check that the FIFO initialised */
\r
445 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
447 /* It didn't so we assume it isn't there but disable it to be on the
\r
449 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
453 /* End of (modified) SVAsync code.
\r
454 Set interrupt parameters calculating mask for 8259 controller's
\r
455 IMR and number of interrupt handler for given irq level */
\r
456 if (pxPort->ucIRQ <= 7)
\r
458 /* if 0<=irq<=7 first IMR address used */
\r
459 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
460 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
461 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
462 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
466 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
467 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
468 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
469 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
472 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
473 to set baud rate */
\r
474 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
475 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
476 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
478 /* reset usLineCtrlReg and Port Toggleout */
\r
479 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
481 portENTER_CRITICAL();
\r
483 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
485 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
488 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
489 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
491 /* enable interrupt pxPort->ucIRQ level */
\r
492 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
494 /* And allow interrupts again now the hairy bit's done */
\r
495 portEXIT_CRITICAL();
\r
497 /* This version does not allow flow control. */
\r
498 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
500 /* enable all communication's interrupts */
\r
501 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
503 /*-----------------------------------------------------------*/
\r
505 static portSHORT sComPortISR( const xComPort * const pxPort )
\r
507 portSHORT sInterruptID;
\r
508 portCHAR cIn, cOut;
\r
509 portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
\r
510 extern void vComTestUnsuspendTask( void );
\r
512 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
514 /* Decide which UART has issued the interrupt */
\r
515 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
517 /* service whatever requests the calling UART may have. The top 4 bits are
\r
518 either unused or indicate the presence of a functioning FIFO, which we don't
\r
519 need to know. So trim them off to simplify the switch statement below. */
\r
520 sInterruptID &= 0x0f;
\r
523 switch( sInterruptID )
\r
525 case 0x0c: /* Timeout
\r
526 Called when FIFO not up to trigger level but no activity for
\r
527 a while. Handled exactly as RDAINT, see below for
\r
531 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
532 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
534 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
535 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
536 this as an invalid call, then give the semaphore for real. */
\r
537 vComTestUnsuspendTask();
\r
538 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
540 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
543 case 0x06: /* LSINT */
\r
544 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
547 case 0x04: /* RDAINT */
\r
548 /* The usInterruptIDReg flag tested above stops when the
\r
549 FIFO is below the trigger level rather than empty, whereas
\r
550 this flag allows one to empty it: (do loop because there
\r
551 must be at least one to read by virtue of having got here.) */
\r
554 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
555 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
557 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
558 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
559 this as an invalid call, then give the semaphore for real. */
\r
560 vComTestUnsuspendTask();
\r
561 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
563 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
566 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
567 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xTaskWokenByTx ) != pdTRUE )
\r
569 /* Queue empty, nothing to send */
\r
570 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
574 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );
\r
578 case 0x00: /* MSINT */
\r
579 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
583 /* Get the next instruction, trimming as above */
\r
584 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
586 } while( !( sInterruptID & 0x01 ) );
\r
588 if( pxPort->ucIRQ > 7 )
\r
590 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
591 portOUTPUT_BYTE( 0x20, 0x62);
\r
595 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
598 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
600 /* If posting any of the characters to a queue woke a task that was blocked on
\r
601 the queue we may want to return to the task just woken (depending on its
\r
602 priority relative to the task this ISR interrupted. */
\r
603 if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx )
\r
612 /*-----------------------------------------------------------*/
\r
614 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )
\r
616 /* Get the next character from the buffer, note that this routine is only
\r
617 called having checked that the is (at least) one to get */
\r
618 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
627 /*-----------------------------------------------------------*/
\r
629 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )
\r
631 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
636 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
640 /*-----------------------------------------------------------*/
\r
642 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
644 portCHAR * pcNextChar;
\r
645 const portTickType xNoBlock = ( portTickType ) 0;
\r
647 /* Stop warnings. */
\r
648 ( void ) usStringLength;
\r
650 pcNextChar = ( portCHAR * ) pcString;
\r
651 while( *pcNextChar )
\r
653 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
657 /*-----------------------------------------------------------*/
\r
659 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
661 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
663 /* This function does nothing interesting, but test the
\r
664 semaphore from ISR mechanism. */
\r
665 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
667 /*-----------------------------------------------------------*/
\r
669 void vSerialClose( xComPortHandle xPort )
\r
671 portENTER_CRITICAL();
\r
673 /* Turn off the interrupts. */
\r
674 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
675 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
677 /* Put back the original ISR. */
\r
678 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
680 /* Remove the reference in the array of xComPort structures. */
\r
681 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
683 /* Delete the queues. */
\r
684 vQueueDelete( xPort->xRxedChars );
\r
685 vQueueDelete( xPort->xCharsForTx );
\r
687 vPortFree( ( void * ) xPort );
\r
689 portEXIT_CRITICAL();
\r