git.sur5r.net Git - freertos/blob - Demo/PC/serial/serial.c

   1 /*\r
   2         This serial port driver is borrowed heavily from DZComm.  I have\r
   3         simplified it by removing a lot of the functionality (hardware \r
   4         flow control, etc.).  For more details and the full version see\r
   5         http://dzcomm.sourceforge.net\r
   6 \r
   7 \r
   8         FreeRTOS.org V4.1.3 - Copyright (C) 2003-2006 Richard Barry.\r
   9 \r
  10         This file is part of the FreeRTOS.org distribution.\r
  11 \r
  12         FreeRTOS.org is free software; you can redistribute it and/or modify\r
  13         it under the terms of the GNU General Public License as published by\r
  14         the Free Software Foundation; either version 2 of the License, or\r
  15         (at your option) any later version.\r
  16 \r
  17         FreeRTOS.org is distributed in the hope that it will be useful,\r
  18         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  19         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  20         GNU General Public License for more details.\r
  21 \r
  22         You should have received a copy of the GNU General Public License\r
  23         along with FreeRTOS.org; if not, write to the Free Software\r
  24         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  25 \r
  26         A special exception to the GPL can be applied should you wish to distribute\r
  27         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  28         the source code for any proprietary components.  See the licensing section \r
  29         of http://www.FreeRTOS.org for full details of how and when the exception\r
  30         can be applied.\r
  31 \r
  32         ***************************************************************************\r
  33         See http://www.FreeRTOS.org for documentation, latest information, license \r
  34         and contact details.  Please ensure to read the configuration and relevant \r
  35         port sections of the online documentation.\r
  36         ***************************************************************************\r
  37 */\r
  38 \r
  39 /*\r
  40 Changes from V1.00:\r
  41         \r
  42         + Call to the more efficient portSWITCH_CONTEXT() replaces the call to \r
  43           taskYIELD() in the ISR.\r
  44 \r
  45 Changes from V1.2.0:\r
  46 \r
  47         + Added vSerialPutString().\r
  48 \r
  49 Changes from V1.2.3\r
  50 \r
  51         + The function xPortInitMinimal() has been renamed to \r
  52           xSerialPortInitMinimal() and the function xPortInit() has been renamed\r
  53           to xSerialPortInit().\r
  54 \r
  55 Changes From V2.0.0\r
  56 \r
  57         + Use portTickType in place of unsigned pdLONG for delay periods.\r
  58         + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.\r
  59 */\r
  60 \r
  61 \r
  62 #include <stdlib.h>\r
  63 #include <dos.h>\r
  64 #include "FreeRTOS.h"\r
  65 #include "queue.h"\r
  66 #include "task.h"\r
  67 #include "semphr.h"\r
  68 #include "portasm.h"\r
  69 \r
  70 #define serMAX_IRQs                                             ( 16 )\r
  71 #define serTRANSMIT_HOLD_EMPTY_INT              ( 0x02 )\r
  72 #define serCOM1_STANDARD_IRQ                    ( ( unsigned portCHAR ) 4 )\r
  73 #define serCOM2_STANDARD_IRQ                    ( ( unsigned portCHAR ) 3 )\r
  74 \r
  75 \r
  76 #define serIMR_8259_0                                   ( ( unsigned portCHAR ) 0x21 )\r
  77 #define serIMR_8259_1                                   ( ( unsigned portCHAR ) 0xa1 )\r
  78 #define serISR_8259_0                                   ( ( unsigned portCHAR ) 0x20 )\r
  79 #define serISR_8259_1                                   ( ( unsigned portCHAR ) 0xa0 )\r
  80 #define serALL_COMS_INTERRUPTS                  ( ( unsigned portCHAR ) 0x0f )\r
  81 #define serALL_MODEM_CTRL_INTERRUPTS    ( ( unsigned portCHAR ) 0x0f )\r
  82 \r
  83 #define serTRANSMIT_HOLD_OFFSET                                 ( 0 )\r
  84 #define serRECEIVE_DATA_OFFSET                                  ( 0 )\r
  85 #define serBAUD_RATE_DIVISOR_LOW_OFFSET                 ( 0 )\r
  86 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET                ( 1 )\r
  87 #define serINTERRUPT_ENABLE_OFFSET                              ( 1 )\r
  88 #define serINTERRUPT_ID_OFFSET                                  ( 2 )\r
  89 #define serFIFO_CTRL_OFFSET                                             ( 2 )\r
  90 #define serLINE_CTRL_OFFSET                                             ( 3 )\r
  91 #define serMODEM_CTRL_OFFSET                                    ( 4 )\r
  92 #define serLINE_STATUS_OFFSET                                   ( 5 )\r
  93 #define serMODEM_STATUS_OFFSET                                  ( 6 )\r
  94 #define serSCR_OFFSET                                                   ( 7 )\r
  95 \r
  96 #define serMAX_BAUD                     ( ( unsigned portLONG ) 115200UL )\r
  97 \r
  98 #define serNO_INTERRUPTS        ( 0x00 )\r
  99 \r
 100 #define vInterruptOn( pxPort, ucInterrupt )                                                                             \\r
 101 {                                                                                                                                                               \\r
 102         unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );        \\r
 103         if( !( ucIn & ucInterrupt ) )                                                                                           \\r
 104         {                                                                                                                                                       \\r
 105                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt );    \\r
 106         }                                                                                                                                                       \\r
 107 }                                                                                                                                                               \r
 108 /*-----------------------------------------------------------*/\r
 109 \r
 110 #define vInterruptOff( pxPort, ucInterrupt )                                                                    \\r
 111 {                                                                                                                                                               \\r
 112         unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );        \\r
 113         if( ucIn & ucInterrupt )                                                                                                        \\r
 114         {                                                                                                                                                       \\r
 115                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt);    \\r
 116         }                                                                                                                                                       \\r
 117 }\r
 118 /*-----------------------------------------------------------*/\r
 119 \r
 120 typedef enum\r
 121 { \r
 122         serCOM1, \r
 123         serCOM2, \r
 124         serCOM3, \r
 125         serCOM4, \r
 126         serCOM5, \r
 127         serCOM6, \r
 128         serCOM7, \r
 129         serCOM8 \r
 130 } eCOMPort;\r
 131 \r
 132 typedef enum \r
 133 { \r
 134         serNO_PARITY, \r
 135         serODD_PARITY, \r
 136         serEVEN_PARITY, \r
 137         serMARK_PARITY, \r
 138         serSPACE_PARITY \r
 139 } eParity;\r
 140 \r
 141 typedef enum \r
 142 { \r
 143         serSTOP_1, \r
 144         serSTOP_2 \r
 145 } eStopBits;\r
 146 \r
 147 typedef enum \r
 148 { \r
 149         serBITS_5, \r
 150         serBITS_6, \r
 151         serBITS_7, \r
 152         serBITS_8 \r
 153 } eDataBits;\r
 154 \r
 155 typedef enum \r
 156 { \r
 157         ser50,          \r
 158         ser75,          \r
 159         ser110,         \r
 160         ser134,         \r
 161         ser150,    \r
 162         ser200,\r
 163         ser300,         \r
 164         ser600,         \r
 165         ser1200,        \r
 166         ser1800,        \r
 167         ser2400,   \r
 168         ser4800,\r
 169         ser9600,                \r
 170         ser19200,       \r
 171         ser38400,       \r
 172         ser57600,       \r
 173         ser115200\r
 174 } eBaud;\r
 175 \r
 176 /* This *MUST* match the order in the eBaud definition. */\r
 177 unsigned portLONG ulBaudFromEnum[] = \r
 178 { \r
 179         ( unsigned portLONG ) 50, \r
 180         ( unsigned portLONG ) 75, \r
 181         ( unsigned portLONG ) 110, \r
 182         ( unsigned portLONG ) 134, \r
 183         ( unsigned portLONG ) 150,      \r
 184         ( unsigned portLONG ) 200, \r
 185         ( unsigned portLONG ) 300, \r
 186         ( unsigned portLONG ) 600, \r
 187         ( unsigned portLONG ) 1200, \r
 188         ( unsigned portLONG ) 1800, \r
 189         ( unsigned portLONG ) 2400,   \r
 190         ( unsigned portLONG ) 4800,   \r
 191         ( unsigned portLONG ) 9600,  \r
 192         ( unsigned portLONG ) 19200,  \r
 193         ( unsigned portLONG ) 38400UL,\r
 194         ( unsigned portLONG ) 57600UL,\r
 195         ( unsigned portLONG ) 115200UL\r
 196 };\r
 197 \r
 198 typedef struct xCOM_PORT\r
 199 { \r
 200         unsigned portSHORT sPort;   /* comm port address eg. 0x3f8    */\r
 201         unsigned portCHAR ucIRQ;    /* comm IRQ eg. 3                 */\r
 202 \r
 203         /* Next two fields used for setting up the IRQ routine and\r
 204         * (un)masking the interrupt in certain circumstances.\r
 205         */\r
 206         unsigned portSHORT usIRQVector;\r
 207         unsigned portCHAR ucInterruptEnableMast;\r
 208 \r
 209         /* Read/Write buffers. */\r
 210         xQueueHandle xRxedChars; \r
 211         xQueueHandle xCharsForTx;\r
 212 \r
 213         /* This lot are set up to minimise CPU time where accessing the comm\r
 214         * port's registers.\r
 215         */\r
 216         unsigned portSHORT usTransmitHoldReg; \r
 217         unsigned portSHORT usReceiveDataRegister;\r
 218         unsigned portSHORT usBaudRateDivisorLow; \r
 219         unsigned portSHORT usBaudRateDivisorHigh;\r
 220         unsigned portSHORT usInterruptEnableReg;\r
 221         unsigned portSHORT usInterruptIDReg;\r
 222         unsigned portSHORT usFIFOCtrlReg;\r
 223         unsigned portSHORT usLineCtrlReg;\r
 224         unsigned portSHORT usModemCtrlReg;\r
 225         unsigned portSHORT usLineStatusReg;\r
 226         unsigned portSHORT usModemStatusReg;\r
 227         unsigned portSHORT usSCRReg;\r
 228         unsigned portSHORT us8259InterruptServiceReg;\r
 229         unsigned portSHORT us8259InterruptMaskReg;\r
 230 \r
 231         /* This semaphore does nothing useful except test a feature of the\r
 232         scheduler. */\r
 233         xSemaphoreHandle xTestSem;\r
 234 \r
 235 } xComPort;\r
 236 \r
 237 typedef xComPort *xComPortHandle;\r
 238 \r
 239 /* A xComPort structure can be associated with each IRQ.  Initially none\r
 240 are create/installed. */\r
 241 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };\r
 242 \r
 243 /*-----------------------------------------------------------*/\r
 244 \r
 245 /* These prototypes are repeated here so we don't have to include the serial header.  This allows\r
 246 the xComPortHandle structure details to be private to this file. */\r
 247 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );\r
 248 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );\r
 249 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );\r
 250 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );\r
 251 \r
 252 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );\r
 253 static portSHORT sComPortISR( const xComPort * const pxPort );\r
 254 \r
 255 /*-----------------------------------------------------------*/\r
 256 \r
 257 /* Define an interrupt handler for each slot in the xPortStatus array. */\r
 258 \r
 259 #define COM_IRQ_WRAPPER(N)                                                                              \\r
 260         static void __interrupt COM_IRQ##N##_WRAPPER( void )            \\r
 261         {                                                                                                                       \\r
 262                 portDISABLE_INTERRUPTS();                                                               \\r
 263                 if( sComPortISR( xPortStatus[##N##] ) )                                 \\r
 264                 {                                                                                                               \\r
 265                         portSWITCH_CONTEXT();                                                           \\r
 266                 }                                                                                                               \\r
 267         } \r
 268 \r
 269 COM_IRQ_WRAPPER( 0 )\r
 270 COM_IRQ_WRAPPER( 1 )\r
 271 COM_IRQ_WRAPPER( 2 )\r
 272 COM_IRQ_WRAPPER( 3 )\r
 273 COM_IRQ_WRAPPER( 4 )\r
 274 COM_IRQ_WRAPPER( 5 )\r
 275 COM_IRQ_WRAPPER( 6 )\r
 276 COM_IRQ_WRAPPER( 7 )\r
 277 COM_IRQ_WRAPPER( 8 )\r
 278 COM_IRQ_WRAPPER( 9 )\r
 279 COM_IRQ_WRAPPER( 10 )\r
 280 COM_IRQ_WRAPPER( 11 )\r
 281 COM_IRQ_WRAPPER( 12 )\r
 282 COM_IRQ_WRAPPER( 13 )\r
 283 COM_IRQ_WRAPPER( 14 )\r
 284 COM_IRQ_WRAPPER( 15 )\r
 285 \r
 286 static pxISR xISRs[ serMAX_IRQs ] = \r
 287 {\r
 288         COM_IRQ0_WRAPPER, \r
 289         COM_IRQ1_WRAPPER, \r
 290         COM_IRQ2_WRAPPER, \r
 291         COM_IRQ3_WRAPPER, \r
 292         COM_IRQ4_WRAPPER, \r
 293         COM_IRQ5_WRAPPER, \r
 294         COM_IRQ6_WRAPPER, \r
 295         COM_IRQ7_WRAPPER, \r
 296         COM_IRQ8_WRAPPER, \r
 297         COM_IRQ9_WRAPPER, \r
 298         COM_IRQ10_WRAPPER, \r
 299         COM_IRQ11_WRAPPER, \r
 300         COM_IRQ12_WRAPPER, \r
 301         COM_IRQ13_WRAPPER, \r
 302         COM_IRQ14_WRAPPER,\r
 303         COM_IRQ15_WRAPPER\r
 304 };\r
 305 \r
 306 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };\r
 307 \r
 308 /*-----------------------------------------------------------*/\r
 309 \r
 310 \r
 311 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )\r
 312 {\r
 313 xComPort *pxPort;\r
 314 \r
 315         /* Create a structure to handle this port. */\r
 316         pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );\r
 317         \r
 318         if( pxPort != NULL )\r
 319         {\r
 320                 /* Create the queues used by the comtest task. */\r
 321                 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );\r
 322                 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );\r
 323 \r
 324                 /* Create the test semaphore.  This does nothing useful except test a feature of the scheduler. */\r
 325                 vSemaphoreCreateBinary( pxPort->xTestSem );\r
 326 \r
 327                 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );\r
 328 \r
 329                 return pxPort;\r
 330         }\r
 331 \r
 332         return NULL;\r
 333 }\r
 334 /*-----------------------------------------------------------*/\r
 335 \r
 336 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )\r
 337 {\r
 338 portSHORT sIn;\r
 339 unsigned portLONG ulDivisor;\r
 340 unsigned portCHAR ucDivisorLow;\r
 341 unsigned portCHAR ucDivisorHigh;\r
 342 unsigned portCHAR ucCommParam;\r
 343 \r
 344         /* IRQ numbers - standard */\r
 345         if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )\r
 346         {\r
 347                 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;\r
 348                 pxPort->sPort = 0x3f8;\r
 349         }\r
 350         else\r
 351         {\r
 352                 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;\r
 353                 pxPort->sPort = 0x2f8;\r
 354         }\r
 355 \r
 356         /* Set up variables in port making it easy to see which sIn/o address is which */\r
 357         pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;\r
 358         pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;\r
 359         pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;\r
 360         pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;\r
 361         pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;\r
 362         pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;\r
 363         pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;\r
 364         pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;\r
 365         pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;\r
 366         pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;\r
 367         pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;\r
 368         pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;\r
 369 \r
 370         /* Set communication parameters. */\r
 371         ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];\r
 372         ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;\r
 373         ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );\r
 374         \r
 375         switch( eWantedParity )\r
 376         {       \r
 377                 case serNO_PARITY:              ucCommParam = 0x00;\r
 378                                                                 break;\r
 379                 case serODD_PARITY:             ucCommParam = 0x08;\r
 380                                                                 break;\r
 381                 case serEVEN_PARITY:    ucCommParam = 0x18;\r
 382                                                                 break;\r
 383                 case serMARK_PARITY:    ucCommParam = 0x28;\r
 384                                                                 break;\r
 385                 case serSPACE_PARITY:   ucCommParam = 0x38;\r
 386                                                                 break;\r
 387                 default:                                ucCommParam = 0x00;\r
 388                                                                 break;\r
 389         }\r
 390 \r
 391         switch ( eWantedDataBits )\r
 392         {\r
 393                 case serBITS_5: ucCommParam |= 0x00;\r
 394                                                 break;\r
 395                 case serBITS_6: ucCommParam |= 0x01;\r
 396                                                 break;\r
 397                 case serBITS_7: ucCommParam |= 0x02;\r
 398                                                 break;\r
 399                 case serBITS_8: ucCommParam |= 0x03;\r
 400                                                 break;\r
 401                 default:                ucCommParam |= 0x03;\r
 402                                                 break;\r
 403         }\r
 404 \r
 405         if( eWantedStopBits == serSTOP_2 ) \r
 406         {\r
 407                 ucCommParam |= 0x04;\r
 408         }\r
 409 \r
 410         /* Reset UART into known state - Thanks to Bradley Town */\r
 411         portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 );                 /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */\r
 412         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 );  /* Disable interrupts from UART */\r
 413         portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 );                /* Enable some multi-port cards */\r
 414 \r
 415         /* Code based on stuff from SVAsync lib. Clear UART Status and data registers\r
 416         setting up FIFO if possible */\r
 417         sIn = portINPUT_BYTE( pxPort->usSCRReg );\r
 418         portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );\r
 419 \r
 420         if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )\r
 421         {\r
 422                 /* The chip is better than an 8250 */\r
 423                 portOUTPUT_BYTE( pxPort->usSCRReg, sIn );       /* Set usSCRReg back to what it was before */\r
 424                 portINPUT_BYTE( pxPort->usSCRReg);                      /* Give slow motherboards a chance */\r
 425 \r
 426                 /* Try and start the FIFO. It appears that some chips need a two call \r
 427                 protocol, but those that don't seem to work even if you do start it twice. \r
 428                 The first call is simply to start it, the second starts it and sets an 8 \r
 429                 byte FIFO trigger level. */\r
 430                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );\r
 431                 portINPUT_BYTE( pxPort->usFIFOCtrlReg );                        /* Give slow motherboards a chance to catch up */\r
 432                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );\r
 433 \r
 434                 /* Check that the FIFO initialised */\r
 435                 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )\r
 436                 {\r
 437                         /* It didn't so we assume it isn't there but disable it to be on the \r
 438                         safe side. */\r
 439                         portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );\r
 440                 }\r
 441         }\r
 442 \r
 443         /* End of (modified) SVAsync code.  \r
 444         Set interrupt parameters calculating mask for 8259 controller's \r
 445         IMR and number of interrupt handler for given irq level  */\r
 446         if (pxPort->ucIRQ <= 7)\r
 447         {       \r
 448                 /* if 0<=irq<=7 first IMR address used */\r
 449                 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);\r
 450                 pxPort->usIRQVector = pxPort->ucIRQ + 8;\r
 451                 pxPort->us8259InterruptMaskReg = serIMR_8259_0;\r
 452                 pxPort->us8259InterruptServiceReg = serISR_8259_0;\r
 453         }\r
 454         else\r
 455         {\r
 456                 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );\r
 457                 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;\r
 458                 pxPort->us8259InterruptMaskReg = serIMR_8259_1;\r
 459                 pxPort->us8259InterruptServiceReg = serISR_8259_1;\r
 460         }\r
 461 \r
 462         /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers \r
 463         to set baud rate */\r
 464         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );\r
 465         portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );\r
 466         portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );\r
 467 \r
 468         /* reset usLineCtrlReg and Port Toggleout */\r
 469         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );\r
 470 \r
 471         portENTER_CRITICAL();\r
 472 \r
 473         if( xPortStatus[ pxPort->ucIRQ ] == NULL )\r
 474         {       \r
 475                 xPortStatus[ pxPort->ucIRQ ] = pxPort;\r
 476         }\r
 477         \r
 478         xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );\r
 479         _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );\r
 480 \r
 481         /* enable interrupt pxPort->ucIRQ level */\r
 482         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
 483 \r
 484         /* And allow interrupts again now the hairy bit's done */\r
 485         portEXIT_CRITICAL();            \r
 486 \r
 487         /* This version does not allow flow control. */\r
 488         portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );\r
 489 \r
 490         /* enable all communication's interrupts */\r
 491         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );\r
 492 }\r
 493 /*-----------------------------------------------------------*/\r
 494 \r
 495 static portSHORT sComPortISR( const xComPort * const pxPort )\r
 496 {\r
 497 portSHORT sInterruptID;\r
 498 portCHAR cIn, cOut;\r
 499 portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;\r
 500 \r
 501         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );\r
 502 \r
 503         /* Decide which UART has issued the interrupt */\r
 504         sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );\r
 505 \r
 506         /* service whatever requests the calling UART may have. The top 4 bits are\r
 507         either unused or indicate the presence of a functioning FIFO, which we don't\r
 508         need to know. So trim them off to simplify the switch statement below. */\r
 509         sInterruptID &= 0x0f;\r
 510         do\r
 511         {\r
 512                 switch( sInterruptID )\r
 513                 {\r
 514                         case 0x0c:      /* Timeout\r
 515                                                 Called when FIFO not up to trigger level but no activity for \r
 516                                                 a while. Handled exactly as RDAINT, see below for \r
 517                                                 description. */\r
 518                                                 do\r
 519                                                 {\r
 520                                                         cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                             \r
 521                                                         xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );\r
 522 \r
 523                                                         /* Also release the semaphore - this does nothing interesting and is just a test. */\r
 524                                                         xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );\r
 525 \r
 526                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
 527                                                 break;\r
 528 \r
 529                         case 0x06:      /* LSINT */\r
 530                                                 portINPUT_BYTE( pxPort->usLineStatusReg );\r
 531                                                 break;\r
 532 \r
 533                         case 0x04:      /* RDAINT */\r
 534                                                 /* The usInterruptIDReg flag tested above stops when the \r
 535                                                 FIFO is below the trigger level rather than empty, whereas \r
 536                                                 this flag allows one to empty it: (do loop because there \r
 537                                                 must be at least one to read by virtue of having got here.) */\r
 538                                                 do\r
 539                                                 {\r
 540                                                         cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                             \r
 541                                                         xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );\r
 542 \r
 543                                                         /* Also release the semaphore - this does nothing interesting and is just a test. */\r
 544                                                         xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );\r
 545 \r
 546                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
 547                                                 break;\r
 548 \r
 549                         case 0x02:      /* serTRANSMIT_HOLD_EMPTY_INT */\r
 550                                                 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xTaskWokenByTx ) != pdTRUE )                                             \r
 551                                                 {                                                                                                                                                                               \r
 552                                                         /* Queue empty, nothing to send */                                                                                                      \r
 553                                                         vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);                                                                     \r
 554                                                 }                                                                                                                                                                               \r
 555                                                 else                                                                                                                                                                    \r
 556                                                 {                                                                                                                                                                               \r
 557                                                         portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );                                       \r
 558                                                 }\r
 559                                                 break;\r
 560 \r
 561                         case 0x00:      /* MSINT */\r
 562                                                 portINPUT_BYTE( pxPort->usModemStatusReg );\r
 563                                                 break;\r
 564                 }               \r
 565 \r
 566                 /* Get the next instruction, trimming as above */\r
 567                 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;\r
 568 \r
 569         } while( !( sInterruptID & 0x01 ) );\r
 570 \r
 571         if( pxPort->ucIRQ > 7 )\r
 572         {\r
 573                 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );\r
 574                 portOUTPUT_BYTE( 0x20, 0x62);\r
 575         }\r
 576         else\r
 577         {\r
 578                 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );\r
 579         }\r
 580 \r
 581         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
 582 \r
 583         /* If posting any of the characters to a queue woke a task that was blocked on\r
 584         the queue we may want to return to the task just woken (depending on its \r
 585         priority relative to the task this ISR interrupted. */\r
 586         if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx )\r
 587         {\r
 588                 return pdTRUE;\r
 589         }\r
 590         else\r
 591         {\r
 592                 return pdFALSE;\r
 593         }\r
 594 }\r
 595 /*-----------------------------------------------------------*/\r
 596 \r
 597 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )\r
 598 {\r
 599         /* Get the next character from the buffer, note that this routine is only \r
 600         called having checked that the is (at least) one to get */\r
 601         if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )\r
 602         {\r
 603                 return pdTRUE;\r
 604         }\r
 605         else\r
 606         {\r
 607                 return pdFALSE;\r
 608         }\r
 609 }\r
 610 /*-----------------------------------------------------------*/\r
 611 \r
 612 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )\r
 613 {\r
 614         if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
 615         {\r
 616                 return pdFAIL;\r
 617         }\r
 618 \r
 619         vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );\r
 620 \r
 621         return pdPASS;\r
 622 }\r
 623 /*-----------------------------------------------------------*/\r
 624 \r
 625 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )\r
 626 {\r
 627 portCHAR * pcNextChar;\r
 628 const portTickType xNoBlock = ( portTickType ) 0;\r
 629 \r
 630         /* Stop warnings. */\r
 631         ( void ) usStringLength;\r
 632 \r
 633         pcNextChar = ( portCHAR * ) pcString;\r
 634         while( *pcNextChar )\r
 635         {\r
 636                 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );\r
 637                 pcNextChar++;\r
 638         }\r
 639 }\r
 640 /*-----------------------------------------------------------*/\r
 641 \r
 642 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )\r
 643 {\r
 644 const portTickType xBlockTime = ( portTickType ) 0xffff;\r
 645 \r
 646         /* This function does nothing interesting, but test the \r
 647         semaphore from ISR mechanism. */\r
 648         return xSemaphoreTake( xPort->xTestSem, xBlockTime );   \r
 649 }\r
 650 /*-----------------------------------------------------------*/\r
 651 \r
 652 void vSerialClose( xComPortHandle xPort )\r
 653 {\r
 654         portENTER_CRITICAL();\r
 655 \r
 656         /* Turn off the interrupts. */\r
 657         portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );\r
 658         portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );\r
 659 \r
 660         /* Put back the original ISR. */\r
 661         _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );\r
 662 \r
 663         /* Remove the reference in the array of xComPort structures. */\r
 664         xPortStatus[ xPort->ucIRQ ] = NULL;\r
 665 \r
 666         /* Delete the queues. */\r
 667         vQueueDelete( xPort->xRxedChars );\r
 668         vQueueDelete( xPort->xCharsForTx );\r
 669 \r
 670         vPortFree( ( void * ) xPort );\r
 671 \r
 672         portEXIT_CRITICAL();\r
 673 }\r
 674 \r