2 This serial port driver is borrowed heavily from DZComm. I have
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3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
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5 http://dzcomm.sourceforge.net
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8 FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.
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10 This file is part of the FreeRTOS.org distribution.
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12 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
13 it under the terms of the GNU General Public License as published by
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14 the Free Software Foundation; either version 2 of the License, or
\r
15 (at your option) any later version.
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17 FreeRTOS.org is distributed in the hope that it will be useful,
\r
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
20 GNU General Public License for more details.
\r
22 You should have received a copy of the GNU General Public License
\r
23 along with FreeRTOS.org; if not, write to the Free Software
\r
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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26 A special exception to the GPL can be applied should you wish to distribute
\r
27 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
28 the source code for any proprietary components. See the licensing section
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29 of http://www.FreeRTOS.org for full details of how and when the exception
\r
32 ***************************************************************************
\r
33 ***************************************************************************
\r
35 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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37 * This is a concise, step by step, 'hands on' guide that describes both *
\r
38 * general multitasking concepts and FreeRTOS specifics. It presents and *
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39 * explains numerous examples that are written using the FreeRTOS API. *
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40 * Full source code for all the examples is provided in an accompanying *
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43 ***************************************************************************
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44 ***************************************************************************
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46 Please ensure to read the configuration and relevant port sections of the
\r
47 online documentation.
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49 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
52 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
55 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
56 licensing and training services.
\r
62 + Call to the more efficient portSWITCH_CONTEXT() replaces the call to
\r
63 taskYIELD() in the ISR.
\r
65 Changes from V1.2.0:
\r
67 + Added vSerialPutString().
\r
71 + The function xPortInitMinimal() has been renamed to
\r
72 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
73 to xSerialPortInit().
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77 + Use portTickType in place of unsigned pdLONG for delay periods.
\r
78 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
\r
84 #include "FreeRTOS.h"
\r
88 #include "portasm.h"
\r
90 #define serMAX_IRQs ( 16 )
\r
91 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
92 #define serCOM1_STANDARD_IRQ ( ( unsigned portCHAR ) 4 )
\r
93 #define serCOM2_STANDARD_IRQ ( ( unsigned portCHAR ) 3 )
\r
96 #define serIMR_8259_0 ( ( unsigned portCHAR ) 0x21 )
\r
97 #define serIMR_8259_1 ( ( unsigned portCHAR ) 0xa1 )
\r
98 #define serISR_8259_0 ( ( unsigned portCHAR ) 0x20 )
\r
99 #define serISR_8259_1 ( ( unsigned portCHAR ) 0xa0 )
\r
100 #define serALL_COMS_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
101 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
103 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
104 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
105 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
106 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
107 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
108 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
109 #define serFIFO_CTRL_OFFSET ( 2 )
\r
110 #define serLINE_CTRL_OFFSET ( 3 )
\r
111 #define serMODEM_CTRL_OFFSET ( 4 )
\r
112 #define serLINE_STATUS_OFFSET ( 5 )
\r
113 #define serMODEM_STATUS_OFFSET ( 6 )
\r
114 #define serSCR_OFFSET ( 7 )
\r
116 #define serMAX_BAUD ( ( unsigned portLONG ) 115200UL )
\r
118 #define serNO_INTERRUPTS ( 0x00 )
\r
120 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
122 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
123 if( !( ucIn & ucInterrupt ) ) \
\r
125 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
128 /*-----------------------------------------------------------*/
\r
130 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
132 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
133 if( ucIn & ucInterrupt ) \
\r
135 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
138 /*-----------------------------------------------------------*/
\r
196 /* This *MUST* match the order in the eBaud definition. */
\r
197 unsigned portLONG ulBaudFromEnum[] =
\r
199 ( unsigned portLONG ) 50,
\r
200 ( unsigned portLONG ) 75,
\r
201 ( unsigned portLONG ) 110,
\r
202 ( unsigned portLONG ) 134,
\r
203 ( unsigned portLONG ) 150,
\r
204 ( unsigned portLONG ) 200,
\r
205 ( unsigned portLONG ) 300,
\r
206 ( unsigned portLONG ) 600,
\r
207 ( unsigned portLONG ) 1200,
\r
208 ( unsigned portLONG ) 1800,
\r
209 ( unsigned portLONG ) 2400,
\r
210 ( unsigned portLONG ) 4800,
\r
211 ( unsigned portLONG ) 9600,
\r
212 ( unsigned portLONG ) 19200,
\r
213 ( unsigned portLONG ) 38400UL,
\r
214 ( unsigned portLONG ) 57600UL,
\r
215 ( unsigned portLONG ) 115200UL
\r
218 typedef struct xCOM_PORT
\r
220 unsigned portSHORT sPort; /* comm port address eg. 0x3f8 */
\r
221 unsigned portCHAR ucIRQ; /* comm IRQ eg. 3 */
\r
223 /* Next two fields used for setting up the IRQ routine and
\r
224 * (un)masking the interrupt in certain circumstances.
\r
226 unsigned portSHORT usIRQVector;
\r
227 unsigned portCHAR ucInterruptEnableMast;
\r
229 /* Read/Write buffers. */
\r
230 xQueueHandle xRxedChars;
\r
231 xQueueHandle xCharsForTx;
\r
233 /* This lot are set up to minimise CPU time where accessing the comm
\r
234 * port's registers.
\r
236 unsigned portSHORT usTransmitHoldReg;
\r
237 unsigned portSHORT usReceiveDataRegister;
\r
238 unsigned portSHORT usBaudRateDivisorLow;
\r
239 unsigned portSHORT usBaudRateDivisorHigh;
\r
240 unsigned portSHORT usInterruptEnableReg;
\r
241 unsigned portSHORT usInterruptIDReg;
\r
242 unsigned portSHORT usFIFOCtrlReg;
\r
243 unsigned portSHORT usLineCtrlReg;
\r
244 unsigned portSHORT usModemCtrlReg;
\r
245 unsigned portSHORT usLineStatusReg;
\r
246 unsigned portSHORT usModemStatusReg;
\r
247 unsigned portSHORT usSCRReg;
\r
248 unsigned portSHORT us8259InterruptServiceReg;
\r
249 unsigned portSHORT us8259InterruptMaskReg;
\r
251 /* This semaphore does nothing useful except test a feature of the
\r
253 xSemaphoreHandle xTestSem;
\r
257 typedef xComPort *xComPortHandle;
\r
259 /* A xComPort structure can be associated with each IRQ. Initially none
\r
260 are create/installed. */
\r
261 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
263 /*-----------------------------------------------------------*/
\r
265 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
266 the xComPortHandle structure details to be private to this file. */
\r
267 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
268 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );
\r
269 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );
\r
270 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
272 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
273 static portSHORT sComPortISR( const xComPort * const pxPort );
\r
275 /*-----------------------------------------------------------*/
\r
277 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
279 #define COM_IRQ_WRAPPER(N) \
\r
280 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
282 portDISABLE_INTERRUPTS(); \
\r
283 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
285 portSWITCH_CONTEXT(); \
\r
289 COM_IRQ_WRAPPER( 0 )
\r
290 COM_IRQ_WRAPPER( 1 )
\r
291 COM_IRQ_WRAPPER( 2 )
\r
292 COM_IRQ_WRAPPER( 3 )
\r
293 COM_IRQ_WRAPPER( 4 )
\r
294 COM_IRQ_WRAPPER( 5 )
\r
295 COM_IRQ_WRAPPER( 6 )
\r
296 COM_IRQ_WRAPPER( 7 )
\r
297 COM_IRQ_WRAPPER( 8 )
\r
298 COM_IRQ_WRAPPER( 9 )
\r
299 COM_IRQ_WRAPPER( 10 )
\r
300 COM_IRQ_WRAPPER( 11 )
\r
301 COM_IRQ_WRAPPER( 12 )
\r
302 COM_IRQ_WRAPPER( 13 )
\r
303 COM_IRQ_WRAPPER( 14 )
\r
304 COM_IRQ_WRAPPER( 15 )
\r
306 static pxISR xISRs[ serMAX_IRQs ] =
\r
318 COM_IRQ10_WRAPPER,
\r
319 COM_IRQ11_WRAPPER,
\r
320 COM_IRQ12_WRAPPER,
\r
321 COM_IRQ13_WRAPPER,
\r
326 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
328 /*-----------------------------------------------------------*/
\r
331 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
335 /* Create a structure to handle this port. */
\r
336 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
338 if( pxPort != NULL )
\r
340 /* Create the queues used by the comtest task. */
\r
341 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
342 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
344 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
345 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
347 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
354 /*-----------------------------------------------------------*/
\r
356 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
359 unsigned portLONG ulDivisor;
\r
360 unsigned portCHAR ucDivisorLow;
\r
361 unsigned portCHAR ucDivisorHigh;
\r
362 unsigned portCHAR ucCommParam;
\r
364 /* IRQ numbers - standard */
\r
365 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
367 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
368 pxPort->sPort = 0x3f8;
\r
372 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
373 pxPort->sPort = 0x2f8;
\r
376 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
377 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
378 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
379 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
380 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
381 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
382 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
383 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
384 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
385 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
386 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
387 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
388 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
390 /* Set communication parameters. */
\r
391 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
392 ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;
\r
393 ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );
\r
395 switch( eWantedParity )
\r
397 case serNO_PARITY: ucCommParam = 0x00;
\r
399 case serODD_PARITY: ucCommParam = 0x08;
\r
401 case serEVEN_PARITY: ucCommParam = 0x18;
\r
403 case serMARK_PARITY: ucCommParam = 0x28;
\r
405 case serSPACE_PARITY: ucCommParam = 0x38;
\r
407 default: ucCommParam = 0x00;
\r
411 switch ( eWantedDataBits )
\r
413 case serBITS_5: ucCommParam |= 0x00;
\r
415 case serBITS_6: ucCommParam |= 0x01;
\r
417 case serBITS_7: ucCommParam |= 0x02;
\r
419 case serBITS_8: ucCommParam |= 0x03;
\r
421 default: ucCommParam |= 0x03;
\r
425 if( eWantedStopBits == serSTOP_2 )
\r
427 ucCommParam |= 0x04;
\r
430 /* Reset UART into known state - Thanks to Bradley Town */
\r
431 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
432 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
433 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
435 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
436 setting up FIFO if possible */
\r
437 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
438 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
440 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
442 /* The chip is better than an 8250 */
\r
443 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
444 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
446 /* Try and start the FIFO. It appears that some chips need a two call
\r
447 protocol, but those that don't seem to work even if you do start it twice.
\r
448 The first call is simply to start it, the second starts it and sets an 8
\r
449 byte FIFO trigger level. */
\r
450 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
451 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
452 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
454 /* Check that the FIFO initialised */
\r
455 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
457 /* It didn't so we assume it isn't there but disable it to be on the
\r
459 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
463 /* End of (modified) SVAsync code.
\r
464 Set interrupt parameters calculating mask for 8259 controller's
\r
465 IMR and number of interrupt handler for given irq level */
\r
466 if (pxPort->ucIRQ <= 7)
\r
468 /* if 0<=irq<=7 first IMR address used */
\r
469 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
470 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
471 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
472 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
476 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
477 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
478 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
479 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
482 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
483 to set baud rate */
\r
484 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
485 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
486 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
488 /* reset usLineCtrlReg and Port Toggleout */
\r
489 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
491 portENTER_CRITICAL();
\r
493 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
495 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
498 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
499 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
501 /* enable interrupt pxPort->ucIRQ level */
\r
502 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
504 /* And allow interrupts again now the hairy bit's done */
\r
505 portEXIT_CRITICAL();
\r
507 /* This version does not allow flow control. */
\r
508 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
510 /* enable all communication's interrupts */
\r
511 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
513 /*-----------------------------------------------------------*/
\r
515 static portSHORT sComPortISR( const xComPort * const pxPort )
\r
517 portSHORT sInterruptID;
\r
518 portCHAR cIn, cOut;
\r
519 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
\r
520 extern void vComTestUnsuspendTask( void );
\r
522 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
524 /* Decide which UART has issued the interrupt */
\r
525 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
527 /* service whatever requests the calling UART may have. The top 4 bits are
\r
528 either unused or indicate the presence of a functioning FIFO, which we don't
\r
529 need to know. So trim them off to simplify the switch statement below. */
\r
530 sInterruptID &= 0x0f;
\r
533 switch( sInterruptID )
\r
535 case 0x0c: /* Timeout
\r
536 Called when FIFO not up to trigger level but no activity for
\r
537 a while. Handled exactly as RDAINT, see below for
\r
541 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
542 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
544 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
545 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
546 this as an invalid call, then give the semaphore for real. */
\r
547 vComTestUnsuspendTask();
\r
548 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
550 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
553 case 0x06: /* LSINT */
\r
554 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
557 case 0x04: /* RDAINT */
\r
558 /* The usInterruptIDReg flag tested above stops when the
\r
559 FIFO is below the trigger level rather than empty, whereas
\r
560 this flag allows one to empty it: (do loop because there
\r
561 must be at least one to read by virtue of having got here.) */
\r
564 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
565 xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );
\r
567 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
568 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
569 this as an invalid call, then give the semaphore for real. */
\r
570 vComTestUnsuspendTask();
\r
571 xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
\r
573 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
576 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
577 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )
\r
579 /* Queue empty, nothing to send */
\r
580 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
584 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );
\r
588 case 0x00: /* MSINT */
\r
589 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
593 /* Get the next instruction, trimming as above */
\r
594 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
596 } while( !( sInterruptID & 0x01 ) );
\r
598 if( pxPort->ucIRQ > 7 )
\r
600 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
601 portOUTPUT_BYTE( 0x20, 0x62);
\r
605 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
608 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
610 /* If posting any of the characters to a queue woke a task that was blocked on
\r
611 the queue we may want to return to the task just woken (depending on its
\r
612 priority relative to the task this ISR interrupted. */
\r
613 return xHigherPriorityTaskWoken;
\r
615 /*-----------------------------------------------------------*/
\r
617 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )
\r
619 /* Get the next character from the buffer, note that this routine is only
\r
620 called having checked that the is (at least) one to get */
\r
621 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
630 /*-----------------------------------------------------------*/
\r
632 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )
\r
634 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
639 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
643 /*-----------------------------------------------------------*/
\r
645 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
647 portCHAR * pcNextChar;
\r
648 const portTickType xNoBlock = ( portTickType ) 0;
\r
650 /* Stop warnings. */
\r
651 ( void ) usStringLength;
\r
653 pcNextChar = ( portCHAR * ) pcString;
\r
654 while( *pcNextChar )
\r
656 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
660 /*-----------------------------------------------------------*/
\r
662 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
664 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
666 /* This function does nothing interesting, but test the
\r
667 semaphore from ISR mechanism. */
\r
668 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
670 /*-----------------------------------------------------------*/
\r
672 void vSerialClose( xComPortHandle xPort )
\r
674 portENTER_CRITICAL();
\r
676 /* Turn off the interrupts. */
\r
677 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
678 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
680 /* Put back the original ISR. */
\r
681 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
683 /* Remove the reference in the array of xComPort structures. */
\r
684 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
686 /* Delete the queues. */
\r
687 vQueueDelete( xPort->xRxedChars );
\r
688 vQueueDelete( xPort->xCharsForTx );
\r
690 vPortFree( ( void * ) xPort );
\r
692 portEXIT_CRITICAL();
\r