2 This serial port driver is borrowed heavily from DZComm. I have
\r
3 simplified it by removing a lot of the functionality (hardware
\r
4 flow control, etc.). For more details and the full version see
\r
5 http://dzcomm.sourceforge.net
\r
8 FreeRTOS.org V4.8.0 - Copyright (C) 2003-2008 Richard Barry.
\r
10 This file is part of the FreeRTOS.org distribution.
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12 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
13 it under the terms of the GNU General Public License as published by
\r
14 the Free Software Foundation; either version 2 of the License, or
\r
15 (at your option) any later version.
\r
17 FreeRTOS.org is distributed in the hope that it will be useful,
\r
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
20 GNU General Public License for more details.
\r
22 You should have received a copy of the GNU General Public License
\r
23 along with FreeRTOS.org; if not, write to the Free Software
\r
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
\r
26 A special exception to the GPL can be applied should you wish to distribute
\r
27 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
28 the source code for any proprietary components. See the licensing section
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29 of http://www.FreeRTOS.org for full details of how and when the exception
\r
32 ***************************************************************************
\r
33 ***************************************************************************
\r
35 * SAVE TIME AND MONEY! Why not get us to quote to get FreeRTOS.org *
\r
36 * running on your hardware - or even write all or part of your application*
\r
37 * for you? See http://www.OpenRTOS.com for details. *
\r
39 ***************************************************************************
\r
40 ***************************************************************************
\r
42 Please ensure to read the configuration and relevant port sections of the
\r
43 online documentation.
\r
45 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
48 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
51 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
52 licensing and training services.
\r
58 + Call to the more efficient portSWITCH_CONTEXT() replaces the call to
\r
59 taskYIELD() in the ISR.
\r
61 Changes from V1.2.0:
\r
63 + Added vSerialPutString().
\r
67 + The function xPortInitMinimal() has been renamed to
\r
68 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
69 to xSerialPortInit().
\r
73 + Use portTickType in place of unsigned pdLONG for delay periods.
\r
74 + cQueueReieveFromISR() used in place of xQueueReceive() in ISR.
\r
80 #include "FreeRTOS.h"
\r
84 #include "portasm.h"
\r
86 #define serMAX_IRQs ( 16 )
\r
87 #define serTRANSMIT_HOLD_EMPTY_INT ( 0x02 )
\r
88 #define serCOM1_STANDARD_IRQ ( ( unsigned portCHAR ) 4 )
\r
89 #define serCOM2_STANDARD_IRQ ( ( unsigned portCHAR ) 3 )
\r
92 #define serIMR_8259_0 ( ( unsigned portCHAR ) 0x21 )
\r
93 #define serIMR_8259_1 ( ( unsigned portCHAR ) 0xa1 )
\r
94 #define serISR_8259_0 ( ( unsigned portCHAR ) 0x20 )
\r
95 #define serISR_8259_1 ( ( unsigned portCHAR ) 0xa0 )
\r
96 #define serALL_COMS_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
97 #define serALL_MODEM_CTRL_INTERRUPTS ( ( unsigned portCHAR ) 0x0f )
\r
99 #define serTRANSMIT_HOLD_OFFSET ( 0 )
\r
100 #define serRECEIVE_DATA_OFFSET ( 0 )
\r
101 #define serBAUD_RATE_DIVISOR_LOW_OFFSET ( 0 )
\r
102 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET ( 1 )
\r
103 #define serINTERRUPT_ENABLE_OFFSET ( 1 )
\r
104 #define serINTERRUPT_ID_OFFSET ( 2 )
\r
105 #define serFIFO_CTRL_OFFSET ( 2 )
\r
106 #define serLINE_CTRL_OFFSET ( 3 )
\r
107 #define serMODEM_CTRL_OFFSET ( 4 )
\r
108 #define serLINE_STATUS_OFFSET ( 5 )
\r
109 #define serMODEM_STATUS_OFFSET ( 6 )
\r
110 #define serSCR_OFFSET ( 7 )
\r
112 #define serMAX_BAUD ( ( unsigned portLONG ) 115200UL )
\r
114 #define serNO_INTERRUPTS ( 0x00 )
\r
116 #define vInterruptOn( pxPort, ucInterrupt ) \
\r
118 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
119 if( !( ucIn & ucInterrupt ) ) \
\r
121 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt ); \
\r
124 /*-----------------------------------------------------------*/
\r
126 #define vInterruptOff( pxPort, ucInterrupt ) \
\r
128 unsigned portCHAR ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg ); \
\r
129 if( ucIn & ucInterrupt ) \
\r
131 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt); \
\r
134 /*-----------------------------------------------------------*/
\r
192 /* This *MUST* match the order in the eBaud definition. */
\r
193 unsigned portLONG ulBaudFromEnum[] =
\r
195 ( unsigned portLONG ) 50,
\r
196 ( unsigned portLONG ) 75,
\r
197 ( unsigned portLONG ) 110,
\r
198 ( unsigned portLONG ) 134,
\r
199 ( unsigned portLONG ) 150,
\r
200 ( unsigned portLONG ) 200,
\r
201 ( unsigned portLONG ) 300,
\r
202 ( unsigned portLONG ) 600,
\r
203 ( unsigned portLONG ) 1200,
\r
204 ( unsigned portLONG ) 1800,
\r
205 ( unsigned portLONG ) 2400,
\r
206 ( unsigned portLONG ) 4800,
\r
207 ( unsigned portLONG ) 9600,
\r
208 ( unsigned portLONG ) 19200,
\r
209 ( unsigned portLONG ) 38400UL,
\r
210 ( unsigned portLONG ) 57600UL,
\r
211 ( unsigned portLONG ) 115200UL
\r
214 typedef struct xCOM_PORT
\r
216 unsigned portSHORT sPort; /* comm port address eg. 0x3f8 */
\r
217 unsigned portCHAR ucIRQ; /* comm IRQ eg. 3 */
\r
219 /* Next two fields used for setting up the IRQ routine and
\r
220 * (un)masking the interrupt in certain circumstances.
\r
222 unsigned portSHORT usIRQVector;
\r
223 unsigned portCHAR ucInterruptEnableMast;
\r
225 /* Read/Write buffers. */
\r
226 xQueueHandle xRxedChars;
\r
227 xQueueHandle xCharsForTx;
\r
229 /* This lot are set up to minimise CPU time where accessing the comm
\r
230 * port's registers.
\r
232 unsigned portSHORT usTransmitHoldReg;
\r
233 unsigned portSHORT usReceiveDataRegister;
\r
234 unsigned portSHORT usBaudRateDivisorLow;
\r
235 unsigned portSHORT usBaudRateDivisorHigh;
\r
236 unsigned portSHORT usInterruptEnableReg;
\r
237 unsigned portSHORT usInterruptIDReg;
\r
238 unsigned portSHORT usFIFOCtrlReg;
\r
239 unsigned portSHORT usLineCtrlReg;
\r
240 unsigned portSHORT usModemCtrlReg;
\r
241 unsigned portSHORT usLineStatusReg;
\r
242 unsigned portSHORT usModemStatusReg;
\r
243 unsigned portSHORT usSCRReg;
\r
244 unsigned portSHORT us8259InterruptServiceReg;
\r
245 unsigned portSHORT us8259InterruptMaskReg;
\r
247 /* This semaphore does nothing useful except test a feature of the
\r
249 xSemaphoreHandle xTestSem;
\r
253 typedef xComPort *xComPortHandle;
\r
255 /* A xComPort structure can be associated with each IRQ. Initially none
\r
256 are create/installed. */
\r
257 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };
\r
259 /*-----------------------------------------------------------*/
\r
261 /* These prototypes are repeated here so we don't have to include the serial header. This allows
\r
262 the xComPortHandle structure details to be private to this file. */
\r
263 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );
\r
264 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime );
\r
265 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime );
\r
266 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );
\r
268 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );
\r
269 static portSHORT sComPortISR( const xComPort * const pxPort );
\r
271 /*-----------------------------------------------------------*/
\r
273 /* Define an interrupt handler for each slot in the xPortStatus array. */
\r
275 #define COM_IRQ_WRAPPER(N) \
\r
276 static void __interrupt COM_IRQ##N##_WRAPPER( void ) \
\r
278 portDISABLE_INTERRUPTS(); \
\r
279 if( sComPortISR( xPortStatus[##N##] ) ) \
\r
281 portSWITCH_CONTEXT(); \
\r
285 COM_IRQ_WRAPPER( 0 )
\r
286 COM_IRQ_WRAPPER( 1 )
\r
287 COM_IRQ_WRAPPER( 2 )
\r
288 COM_IRQ_WRAPPER( 3 )
\r
289 COM_IRQ_WRAPPER( 4 )
\r
290 COM_IRQ_WRAPPER( 5 )
\r
291 COM_IRQ_WRAPPER( 6 )
\r
292 COM_IRQ_WRAPPER( 7 )
\r
293 COM_IRQ_WRAPPER( 8 )
\r
294 COM_IRQ_WRAPPER( 9 )
\r
295 COM_IRQ_WRAPPER( 10 )
\r
296 COM_IRQ_WRAPPER( 11 )
\r
297 COM_IRQ_WRAPPER( 12 )
\r
298 COM_IRQ_WRAPPER( 13 )
\r
299 COM_IRQ_WRAPPER( 14 )
\r
300 COM_IRQ_WRAPPER( 15 )
\r
302 static pxISR xISRs[ serMAX_IRQs ] =
\r
314 COM_IRQ10_WRAPPER,
\r
315 COM_IRQ11_WRAPPER,
\r
316 COM_IRQ12_WRAPPER,
\r
317 COM_IRQ13_WRAPPER,
\r
322 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };
\r
324 /*-----------------------------------------------------------*/
\r
327 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )
\r
331 /* Create a structure to handle this port. */
\r
332 pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );
\r
334 if( pxPort != NULL )
\r
336 /* Create the queues used by the comtest task. */
\r
337 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
338 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( portCHAR ) );
\r
340 /* Create the test semaphore. This does nothing useful except test a feature of the scheduler. */
\r
341 vSemaphoreCreateBinary( pxPort->xTestSem );
\r
343 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );
\r
350 /*-----------------------------------------------------------*/
\r
352 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )
\r
355 unsigned portLONG ulDivisor;
\r
356 unsigned portCHAR ucDivisorLow;
\r
357 unsigned portCHAR ucDivisorHigh;
\r
358 unsigned portCHAR ucCommParam;
\r
360 /* IRQ numbers - standard */
\r
361 if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )
\r
363 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;
\r
364 pxPort->sPort = 0x3f8;
\r
368 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;
\r
369 pxPort->sPort = 0x2f8;
\r
372 /* Set up variables in port making it easy to see which sIn/o address is which */
\r
373 pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;
\r
374 pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;
\r
375 pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;
\r
376 pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;
\r
377 pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;
\r
378 pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;
\r
379 pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;
\r
380 pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;
\r
381 pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;
\r
382 pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;
\r
383 pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;
\r
384 pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;
\r
386 /* Set communication parameters. */
\r
387 ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];
\r
388 ucDivisorLow = ( unsigned portCHAR ) ulDivisor & ( unsigned portCHAR ) 0xff;
\r
389 ucDivisorHigh = ( unsigned portCHAR ) ( ( ( unsigned portSHORT ) ulDivisor >> 8 ) & 0xff );
\r
391 switch( eWantedParity )
\r
393 case serNO_PARITY: ucCommParam = 0x00;
\r
395 case serODD_PARITY: ucCommParam = 0x08;
\r
397 case serEVEN_PARITY: ucCommParam = 0x18;
\r
399 case serMARK_PARITY: ucCommParam = 0x28;
\r
401 case serSPACE_PARITY: ucCommParam = 0x38;
\r
403 default: ucCommParam = 0x00;
\r
407 switch ( eWantedDataBits )
\r
409 case serBITS_5: ucCommParam |= 0x00;
\r
411 case serBITS_6: ucCommParam |= 0x01;
\r
413 case serBITS_7: ucCommParam |= 0x02;
\r
415 case serBITS_8: ucCommParam |= 0x03;
\r
417 default: ucCommParam |= 0x03;
\r
421 if( eWantedStopBits == serSTOP_2 )
\r
423 ucCommParam |= 0x04;
\r
426 /* Reset UART into known state - Thanks to Bradley Town */
\r
427 portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 ); /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */
\r
428 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 ); /* Disable interrupts from UART */
\r
429 portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 ); /* Enable some multi-port cards */
\r
431 /* Code based on stuff from SVAsync lib. Clear UART Status and data registers
\r
432 setting up FIFO if possible */
\r
433 sIn = portINPUT_BYTE( pxPort->usSCRReg );
\r
434 portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );
\r
436 if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )
\r
438 /* The chip is better than an 8250 */
\r
439 portOUTPUT_BYTE( pxPort->usSCRReg, sIn ); /* Set usSCRReg back to what it was before */
\r
440 portINPUT_BYTE( pxPort->usSCRReg); /* Give slow motherboards a chance */
\r
442 /* Try and start the FIFO. It appears that some chips need a two call
\r
443 protocol, but those that don't seem to work even if you do start it twice.
\r
444 The first call is simply to start it, the second starts it and sets an 8
\r
445 byte FIFO trigger level. */
\r
446 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );
\r
447 portINPUT_BYTE( pxPort->usFIFOCtrlReg ); /* Give slow motherboards a chance to catch up */
\r
448 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );
\r
450 /* Check that the FIFO initialised */
\r
451 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )
\r
453 /* It didn't so we assume it isn't there but disable it to be on the
\r
455 portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );
\r
459 /* End of (modified) SVAsync code.
\r
460 Set interrupt parameters calculating mask for 8259 controller's
\r
461 IMR and number of interrupt handler for given irq level */
\r
462 if (pxPort->ucIRQ <= 7)
\r
464 /* if 0<=irq<=7 first IMR address used */
\r
465 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);
\r
466 pxPort->usIRQVector = pxPort->ucIRQ + 8;
\r
467 pxPort->us8259InterruptMaskReg = serIMR_8259_0;
\r
468 pxPort->us8259InterruptServiceReg = serISR_8259_0;
\r
472 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );
\r
473 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;
\r
474 pxPort->us8259InterruptMaskReg = serIMR_8259_1;
\r
475 pxPort->us8259InterruptServiceReg = serISR_8259_1;
\r
478 /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers
\r
479 to set baud rate */
\r
480 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );
\r
481 portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );
\r
482 portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );
\r
484 /* reset usLineCtrlReg and Port Toggleout */
\r
485 portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );
\r
487 portENTER_CRITICAL();
\r
489 if( xPortStatus[ pxPort->ucIRQ ] == NULL )
\r
491 xPortStatus[ pxPort->ucIRQ ] = pxPort;
\r
494 xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );
\r
495 _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );
\r
497 /* enable interrupt pxPort->ucIRQ level */
\r
498 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
500 /* And allow interrupts again now the hairy bit's done */
\r
501 portEXIT_CRITICAL();
\r
503 /* This version does not allow flow control. */
\r
504 portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );
\r
506 /* enable all communication's interrupts */
\r
507 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );
\r
509 /*-----------------------------------------------------------*/
\r
511 static portSHORT sComPortISR( const xComPort * const pxPort )
\r
513 portSHORT sInterruptID;
\r
514 portCHAR cIn, cOut;
\r
515 portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
\r
516 extern void vComTestUnsuspendTask( void );
\r
518 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );
\r
520 /* Decide which UART has issued the interrupt */
\r
521 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );
\r
523 /* service whatever requests the calling UART may have. The top 4 bits are
\r
524 either unused or indicate the presence of a functioning FIFO, which we don't
\r
525 need to know. So trim them off to simplify the switch statement below. */
\r
526 sInterruptID &= 0x0f;
\r
529 switch( sInterruptID )
\r
531 case 0x0c: /* Timeout
\r
532 Called when FIFO not up to trigger level but no activity for
\r
533 a while. Handled exactly as RDAINT, see below for
\r
537 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
538 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
540 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
541 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
542 this as an invalid call, then give the semaphore for real. */
\r
543 vComTestUnsuspendTask();
\r
544 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
546 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
549 case 0x06: /* LSINT */
\r
550 portINPUT_BYTE( pxPort->usLineStatusReg );
\r
553 case 0x04: /* RDAINT */
\r
554 /* The usInterruptIDReg flag tested above stops when the
\r
555 FIFO is below the trigger level rather than empty, whereas
\r
556 this flag allows one to empty it: (do loop because there
\r
557 must be at least one to read by virtue of having got here.) */
\r
560 cIn = ( portCHAR ) portINPUT_BYTE( pxPort->usReceiveDataRegister );
\r
561 xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cIn, xTaskWokenByPost );
\r
563 /* Also release the semaphore - this does nothing interesting and is just a test.
\r
564 We first attempt to unsuspend the task to check the scheduler correctely detects
\r
565 this as an invalid call, then give the semaphore for real. */
\r
566 vComTestUnsuspendTask();
\r
567 xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
\r
569 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );
\r
572 case 0x02: /* serTRANSMIT_HOLD_EMPTY_INT */
\r
573 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xTaskWokenByTx ) != pdTRUE )
\r
575 /* Queue empty, nothing to send */
\r
576 vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);
\r
580 portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( portSHORT ) cOut );
\r
584 case 0x00: /* MSINT */
\r
585 portINPUT_BYTE( pxPort->usModemStatusReg );
\r
589 /* Get the next instruction, trimming as above */
\r
590 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;
\r
592 } while( !( sInterruptID & 0x01 ) );
\r
594 if( pxPort->ucIRQ > 7 )
\r
596 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );
\r
597 portOUTPUT_BYTE( 0x20, 0x62);
\r
601 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );
\r
604 portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );
\r
606 /* If posting any of the characters to a queue woke a task that was blocked on
\r
607 the queue we may want to return to the task just woken (depending on its
\r
608 priority relative to the task this ISR interrupted. */
\r
609 if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx )
\r
618 /*-----------------------------------------------------------*/
\r
620 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, portCHAR *pcRxedChar, portTickType xBlockTime )
\r
622 /* Get the next character from the buffer, note that this routine is only
\r
623 called having checked that the is (at least) one to get */
\r
624 if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )
\r
633 /*-----------------------------------------------------------*/
\r
635 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, portCHAR cOutChar, portTickType xBlockTime )
\r
637 if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
642 vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );
\r
646 /*-----------------------------------------------------------*/
\r
648 void vSerialPutString( xComPortHandle pxPort, const portCHAR * const pcString, unsigned portSHORT usStringLength )
\r
650 portCHAR * pcNextChar;
\r
651 const portTickType xNoBlock = ( portTickType ) 0;
\r
653 /* Stop warnings. */
\r
654 ( void ) usStringLength;
\r
656 pcNextChar = ( portCHAR * ) pcString;
\r
657 while( *pcNextChar )
\r
659 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );
\r
663 /*-----------------------------------------------------------*/
\r
665 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )
\r
667 const portTickType xBlockTime = ( portTickType ) 0xffff;
\r
669 /* This function does nothing interesting, but test the
\r
670 semaphore from ISR mechanism. */
\r
671 return xSemaphoreTake( xPort->xTestSem, xBlockTime );
\r
673 /*-----------------------------------------------------------*/
\r
675 void vSerialClose( xComPortHandle xPort )
\r
677 portENTER_CRITICAL();
\r
679 /* Turn off the interrupts. */
\r
680 portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );
\r
681 portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );
\r
683 /* Put back the original ISR. */
\r
684 _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );
\r
686 /* Remove the reference in the array of xComPort structures. */
\r
687 xPortStatus[ xPort->ucIRQ ] = NULL;
\r
689 /* Delete the queues. */
\r
690 vQueueDelete( xPort->xRxedChars );
\r
691 vQueueDelete( xPort->xCharsForTx );
\r
693 vPortFree( ( void * ) xPort );
\r
695 portEXIT_CRITICAL();
\r