]> git.sur5r.net Git - freertos/blob - Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/__xps/xplorer.opt
Update Cortex M3 ports to ensure 8 byte alignment.
[freertos] / Demo / PPC440_DP_FPU_Xilinx_Virtex5_GCC / __xps / xplorer.opt
1  -device xc5vfx70tff1136-1 data/system.ucf 7 0\r