1 /******************************************************************************
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4 * This software is supplied by Renesas Technology Corp. and is only
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5 * intended for use with Renesas products. No other uses are authorized.
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7 * This software is owned by Renesas Technology Corp. and is protected under
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8 * all applicable laws, including copyright laws.
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10 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
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11 * REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
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12 * INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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13 * PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
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16 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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17 * TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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18 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
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19 * FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
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20 * AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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22 * Renesas reserves the right, without notice, to make changes to this
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23 * software and to discontinue the availability of this software.
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24 * By using this software, you agree to the additional terms and
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25 * conditions found by accessing the following link:
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26 * http://www.renesas.com/disclaimer
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27 ******************************************************************************
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28 * Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
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29 *******************************************************************************
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30 * File Name : hwsetup.c
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32 * Description : Power up hardware initializations
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33 ******************************************************************************
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34 * History : DD.MM.YYYY Version Description
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35 * : 15.02.2010 1.00 First Release
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36 ******************************************************************************/
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39 /******************************************************************************
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40 Includes <System Includes> , "Project Includes"
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41 ******************************************************************************/
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42 #include <iodefine.h>
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43 #include "yrdkrx62ndef.h"
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44 // #include "lcd.h" Uncomment this if an LCD is present.
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45 #include "r_ether.h"
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47 /******************************************************************************
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49 ******************************************************************************/
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51 /******************************************************************************
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53 ******************************************************************************/
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55 /******************************************************************************
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56 Imported global variables and functions (from other files)
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57 ******************************************************************************/
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59 /******************************************************************************
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60 Exported global variables and functions (to be accessed by other files)
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61 ******************************************************************************/
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63 /******************************************************************************
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64 Private global variables and functions
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65 ******************************************************************************/
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66 void io_set_cpg(void);
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67 void ConfigurePortPins(void);
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68 void EnablePeripheralModules(void);
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70 /******************************************************************************
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71 * Function Name: HardwareSetup
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72 * Description : This function does initial setting for CPG port pins used in
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73 * : the Demo including the MII pins of the Ethernet PHY connection.
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75 * Return Value : none
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76 ******************************************************************************/
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77 void HardwareSetup(void)
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82 /* Setup the port pins */
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83 ConfigurePortPins();
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85 /* Enables peripherals */
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86 EnablePeripheralModules();
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88 #if INCLUDE_LCD == 1
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89 /* Initialize display */
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90 InitialiseDisplay();
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94 /******************************************************************************
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95 * Function Name: EnablePeripheralModules
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96 * Description : Enables Peripheral Modules before use
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98 * Return Value : none
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99 ******************************************************************************/
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100 void EnablePeripheralModules(void)
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102 /* Module standby clear */
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103 SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
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104 SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
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107 /******************************************************************************
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108 * Function Name: ConfigurePortPins
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109 * Description : Configures port pins.
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111 * Return Value : none
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112 ******************************************************************************/
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113 void ConfigurePortPins(void)
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115 /* Port pins default to inputs. To ensure safe initialisation set the pin states
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116 before changing the data direction registers. This will avoid any unintentional
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117 state changes on the external ports.
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118 Many peripheral modules will override the setting of the port registers. Ensure
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119 that the state is safe for external devices if the internal peripheral module is
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120 disabled or powered down. */
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122 /* ==== MII/RMII Pins setting ==== */
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123 /*--------------------------------------*/
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124 /* Port Function Control Register */
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125 /*--------------------------------------*/
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126 #if ETH_MODE_SEL == ETH_MII_MODE
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127 /* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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128 IOPORT.PFENET.BYTE = 0x9A;
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129 #endif /* ETH_MODE_SEL */
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130 #if ETH_MODE_SEL == ETH_RMII_MODE
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131 /* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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132 IOPORT.PFENET.BYTE = 0x82;
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133 #endif /* ETH_MODE_SEL */
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134 /*-------------------------------------------*/
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135 /* Input Buffer Control Register (ICR) */
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136 /*-------------------------------------------*/
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137 #if ETH_MODE_SEL == ETH_MII_MODE
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138 /* P54=1 Set ET_LINKSTA input */
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139 PORT5.ICR.BIT.B4 = 1;
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140 /* P71=1 Set ET_MDIO input */
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141 PORT7.ICR.BIT.B1 = 1;
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142 /* P74=1 Set ET_ERXD1 input */
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143 PORT7.ICR.BIT.B4 = 1;
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144 /* P75=1 Set ET_ERXD0 input */
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145 PORT7.ICR.BIT.B5 = 1;
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146 /* P76=1 Set ET_RX_CLK input */
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147 PORT7.ICR.BIT.B6 = 1;
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148 /* P77=1 Set ET_RX_ER input */
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149 PORT7.ICR.BIT.B7 = 1;
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150 /* P83=1 Set ET_CRS input */
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151 PORT8.ICR.BIT.B3 = 1;
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152 /* PC0=1 Set ET_ERXD3 input */
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153 PORTC.ICR.BIT.B0 = 1;
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154 /* PC1=1 Set ET_ERXD2 input */
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155 PORTC.ICR.BIT.B1 = 1;
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156 /* PC2=1 Set ET_RX_DV input */
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157 PORTC.ICR.BIT.B2 = 1;
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158 /* PC4=1 Set EX_TX_CLK input */
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159 PORTC.ICR.BIT.B4 = 1;
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160 /* PC7=1 Set ET_COL input */
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161 PORTC.ICR.BIT.B7 = 1;
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162 #endif /* ETH_MODE_SEL */
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163 #if ETH_MODE_SEL == ETH_RMII_MODE
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164 /* P54=1 Set ET_LINKSTA input */
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165 PORT5.ICR.BIT.B4 = 1;
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166 /* P71=1 Set ET_MDIO input */
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167 PORT7.ICR.BIT.B1 = 1;
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168 /* P74=1 Set RMII_RXD1 input */
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169 PORT7.ICR.BIT.B4 = 1;
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170 /* P75=1 Set RMII_RXD0 input */
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171 PORT7.ICR.BIT.B5 = 1;
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172 /* P76=1 Set REF50CLK input */
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173 PORT7.ICR.BIT.B6 = 1;
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174 /* P77=1 Set RMII_RX_ER input */
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175 PORT7.ICR.BIT.B7 = 1;
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176 /* P83=1 Set RMII_CRS_DV input */
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177 PORT8.ICR.BIT.B3 = 1;
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178 #endif /* ETH_MODE_SEL */
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180 /* Configure LED 0-5 pin settings */
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181 PORT0.DR.BIT.B2 = 1;
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182 PORT0.DR.BIT.B3 = 1;
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183 PORT0.DR.BIT.B5 = 1;
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184 PORT3.DR.BIT.B4 = 1;
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185 PORT6.DR.BIT.B0 = 1;
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186 PORT7.DR.BIT.B3 = 1;
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187 PORT0.DDR.BIT.B2 = 1;
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188 PORT0.DDR.BIT.B3 = 1;
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189 PORT0.DDR.BIT.B5 = 1;
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190 PORT3.DDR.BIT.B4 = 1;
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191 PORT6.DDR.BIT.B0 = 1;
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192 PORT7.DDR.BIT.B3 = 1;
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194 /* Configure SW 1-3 pin settings */
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195 PORT0.DDR.BIT.B0 = 0;
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196 PORT0.DDR.BIT.B1 = 0;
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197 PORT0.DDR.BIT.B7 = 0;
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198 PORT0.ICR.BIT.B0 = 1;
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199 PORT0.ICR.BIT.B1 = 1;
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200 PORT0.ICR.BIT.B7 = 1;
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202 #if INCLUDE_LCD == 1
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203 /* Set LCD pins as outputs */
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205 PORT8.DDR.BIT.B4 = 1;
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207 PORT8.DDR.BIT.B5 = 1;
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209 PORT9.DDR.BYTE = 0xF0;
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213 /******************************************************************************
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214 * Function Name: io_set_cpg
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215 * Description : Sets up operating speed
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217 * Return Value : none
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218 ******************************************************************************/
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219 void io_set_cpg(void)
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221 /* Set CPU PLL operating frequencies. Changes to the peripheral clock will require
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222 changes to the debugger and flash kernel BRR settings. */
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224 /* ==== CPG setting ==== */
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225 SYSTEM.SCKCR.LONG = 0x00020100; /* Clockin = 12MHz */
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226 /* I Clock = 96MHz, B Clock = 24MHz, */
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227 /* P Clock = 48MHz */
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