1 /******************************************************************************
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3 * Please refer to http://www.renesas.com/disclaimer
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4 ******************************************************************************
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5 Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
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6 *******************************************************************************
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7 * File Name : r_ether.h
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9 * Description : Ethernet module device driver
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10 ******************************************************************************
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11 * History : DD.MM.YYYY Version Description
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12 * : 15.02.2010 1.00 First Release
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13 * : 03.03.2010 1.01 Buffer size is aligned on the 32-byte boundary.
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14 * : 04.06.2010 1.02 RX62N changes
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15 ******************************************************************************/
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20 /******************************************************************************
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21 Includes <System Includes> , "Project Includes"
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22 ******************************************************************************/
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25 /******************************************************************************
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27 ******************************************************************************/
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30 __evenaccess uint32_t status;
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33 __evenaccess uint16_t size;
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34 __evenaccess uint16_t bufsize;
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37 __evenaccess uint16_t bufsize;
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38 __evenaccess uint16_t size;
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42 struct Descriptor *next;
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45 typedef struct Descriptor ethfifo;
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47 typedef enum _NETLNK
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57 /******************************************************************************
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59 ******************************************************************************/
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60 #define BUFSIZE 256 /* Must be 32-bit aligned */
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61 #define ENTRY 8 /* Number of RX and TX buffers */
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63 #define ACT 0x80000000
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64 #define DL 0x40000000
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65 #define FP1 0x20000000
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66 #define FP0 0x10000000
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67 #define FE 0x08000000
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69 #define RFOVER 0x00000200
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70 #define RAD 0x00000100
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71 #define RMAF 0x00000080
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72 #define RRF 0x00000010
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73 #define RTLF 0x00000008
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74 #define RTSF 0x00000004
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75 #define PRE 0x00000002
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76 #define CERF 0x00000001
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78 #define TAD 0x00000100
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79 #define CND 0x00000008
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80 #define DLC 0x00000004
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81 #define CD 0x00000002
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82 #define TRO 0x00000001
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85 * Renesas Ethernet API return defines
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87 #define R_ETHER_OK 0
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88 #define R_ETHER_ERROR -1
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90 /* Ether Interface definitions */
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91 #define ETH_RMII_MODE 0
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92 #define ETH_MII_MODE 1
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93 /* Select Ether Interface Mode */
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94 #define ETH_MODE_SEL ETH_MII_MODE
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96 /******************************************************************************
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98 ******************************************************************************/
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100 /******************************************************************************
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101 Functions Prototypes
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102 ******************************************************************************/
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104 * Renesas Ethernet API prototypes
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106 int32_t R_Ether_Open(uint32_t ch, uint8_t mac_addr[]);
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107 int32_t R_Ether_Close(uint32_t ch);
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108 int32_t R_Ether_Write(uint32_t ch, void *buf, uint32_t len);
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109 int32_t R_Ether_Read(uint32_t ch, void *buf);
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112 /****************************************************/
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113 /* Ethernet statistic collection data */
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116 uint32_t rx_packets; /* total packets received */
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117 uint32_t tx_packets; /* total packets transmitted */
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118 uint32_t rx_errors; /* bad packets received */
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119 uint32_t tx_errors; /* packet transmit problems */
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120 uint32_t rx_dropped; /* no space in buffers */
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121 uint32_t tx_dropped; /* no space available */
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122 uint32_t multicast; /* multicast packets received */
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123 uint32_t collisions;
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125 /* detailed rx_errors: */
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126 uint32_t rx_length_errors;
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127 uint32_t rx_over_errors; /* receiver ring buffer overflow */
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128 uint32_t rx_crc_errors; /* recved pkt with crc error */
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129 uint32_t rx_frame_errors; /* recv'd frame alignment error */
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130 uint32_t rx_fifo_errors; /* recv'r fifo overrun */
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131 uint32_t rx_missed_errors; /* receiver missed packet */
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133 /* detailed tx_errors */
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134 uint32_t tx_aborted_errors;
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135 uint32_t tx_carrier_errors;
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136 uint32_t tx_fifo_errors;
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137 uint32_t tx_heartbeat_errors;
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138 uint32_t tx_window_errors;
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143 const int8_t *name;
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147 uint8_t txing; /* Transmit Active */
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148 uint8_t irqlock; /* EDMAC's interrupt disabled when '1'. */
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149 uint8_t dmaing; /* EDMAC Active */
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150 ethfifo *rxcurrent; /* current receive discripter */
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151 ethfifo *txcurrent; /* current transmit discripter */
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152 uint8_t save_irq; /* Original dev->irq value. */
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153 struct enet_stats stat;
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154 uint8_t mac_addr[6];
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157 #endif /* R_ETHER_H */
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