2 FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
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4 ***************************************************************************
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8 * + New to FreeRTOS, *
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10 * + Looking for basic training, *
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11 * + Wanting to improve your FreeRTOS skills and productivity *
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13 * then take a look at the FreeRTOS eBook *
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15 * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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16 * http://www.FreeRTOS.org/Documentation *
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18 * A pdf reference manual is also available. Both are usually delivered *
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20 * and 8pm GMT (although please allow up to 24 hours in case of *
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21 * exceptional circumstances). Thank you for your support! *
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23 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 ***NOTE*** The exception to the GPL is included to allow you to distribute
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31 a combined work that includes FreeRTOS without being obliged to provide the
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32 source code for proprietary components outside of the FreeRTOS kernel.
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33 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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34 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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35 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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55 * This file contains the non-portable and therefore RX62N specific parts of
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56 * the IntQueue standard demo task - namely the configuration of the timers
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57 * that generate the interrupts and the interrupt entry points.
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60 /* Scheduler includes. */
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61 #include "FreeRTOS.h"
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64 /* Demo includes. */
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65 #include "IntQueueTimer.h"
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66 #include "IntQueue.h"
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68 /* Hardware specifics. */
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69 #include "iodefine.h"
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71 #define tmrTIMER_0_1_FREQUENCY ( 2000UL )
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72 #define tmrTIMER_2_3_FREQUENCY ( 2001UL )
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74 /* Handlers for the two timers used. */
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75 void vT0_1InterruptHandler( void ) __attribute((naked));
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76 void vT2_3InterruptHandler( void ) __attribute((naked));
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78 void vInitialiseTimerForIntQueueTest( void )
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80 /* Ensure interrupts do not start until full configuration is complete. */
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81 portENTER_CRITICAL();
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83 /* Cascade two 8bit timer channels to generate the interrupts.
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84 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
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85 utilised for this test. */
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87 /* Enable the timers. */
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88 SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
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89 SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
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91 /* Enable compare match A interrupt request. */
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92 TMR0.TCR.BIT.CMIEA = 1;
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93 TMR2.TCR.BIT.CMIEA = 1;
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95 /* Clear the timer on compare match A. */
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96 TMR0.TCR.BIT.CCLR = 1;
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97 TMR2.TCR.BIT.CCLR = 1;
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99 /* Set the compare match value. */
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100 TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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101 TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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103 /* 16 bit operation ( count from timer 1,2 ). */
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104 TMR0.TCCR.BIT.CSS = 3;
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105 TMR2.TCCR.BIT.CSS = 3;
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107 /* Use PCLK as the input. */
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108 TMR1.TCCR.BIT.CSS = 1;
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109 TMR3.TCCR.BIT.CSS = 1;
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111 /* Divide PCLK by 8. */
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112 TMR1.TCCR.BIT.CKS = 2;
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113 TMR3.TCCR.BIT.CKS = 2;
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115 /* Enable TMR 0, 2 interrupts. */
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116 IEN( TMR0, CMIA0 ) = 1;
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117 IEN( TMR2, CMIA2 ) = 1;
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119 /* Set the timer interrupts to be above the kernel. The interrupts are
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120 assigned different priorities so they nest with each other. */
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121 IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
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122 IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
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124 portEXIT_CRITICAL();
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126 /* Ensure the interrupts are clear as they are edge detected. */
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127 IR( TMR0, CMIA0 ) = 0;
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128 IR( TMR2, CMIA2 ) = 0;
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130 /*-----------------------------------------------------------*/
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132 void vT0_1InterruptHandler( void )
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134 /* This is a naked function. This macro saves registers then re-enables
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136 portENTER_INTERRUPT();
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138 portYIELD_FROM_ISR( xFirstTimerHandler() );
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140 /* Restore registers, then return. */
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141 portEXIT_INTERRUPT();
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143 /*-----------------------------------------------------------*/
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145 void vT2_3InterruptHandler( void )
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147 /* This is a naked function. This macro saves registers then re-enables
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149 portENTER_INTERRUPT();
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151 portYIELD_FROM_ISR( xSecondTimerHandler() );
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153 /* Restore registers, then return. */
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154 portEXIT_INTERRUPT();
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