2 /******************************************************************************
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4 * Please refer to http://www.renesas.com/disclaimer
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5 ******************************************************************************
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6 Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
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7 *******************************************************************************
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8 * File Name : rsksh7216.h
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10 * Description : RSK 7216 board specific settings
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11 ******************************************************************************
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12 * History : DD.MM.YYYY Version Description
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13 * : 06.10.2009 1.00 First Release
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14 ******************************************************************************/
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19 /******************************************************************************
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20 Includes <System Includes> , "Project Includes"
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21 ******************************************************************************/
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23 /******************************************************************************
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25 ******************************************************************************/
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27 /******************************************************************************
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29 ******************************************************************************/
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31 /* System Clock Settings */
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32 #define XTAL_FREQUENCY (12000000L)
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33 #define ICLK_MUL (8)
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34 #define PCLK_MUL (4)
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35 #define BCLK_MUL (4)
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36 #define ICLK_FREQUENCY (XTAL_FREQUENCY * ICLK_MUL)
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37 #define PCLK_FREQUENCY (XTAL_FREQUENCY * PCLK_MUL)
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38 #define BCLK_FREQUENCY (XTAL_FREQUENCY * BCLK_MUL)
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40 #define CMT0_CLK_SELECT (512)
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42 /* General Values */
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45 #define SET_BIT_HIGH (1)
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46 #define SET_BIT_LOW (0)
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47 #define SET_BYTE_HIGH (0xFF)
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48 #define SET_BYTE_LOW (0x00)
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50 /* Define switches to be polled if not available as interrupts */
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51 #define SW_ACTIVE FALSE
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52 #define SW1 PORT0.DR.BIT.B0
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53 #define SW2 PORT0.DR.BIT.B1
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54 #define SW3 PORT0.DR.BIT.B7
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55 #define SW1_DDR PORT0.DDR.BIT.B0
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56 #define SW2_DDR PORT0.DDR.BIT.B1
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57 #define SW3_DDR PORT0.DDR.BIT.B7
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58 #define SW1_ICR PORT0.ICR.BIT.B0
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59 #define SW2_ICR PORT0.ICR.BIT.B1
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60 #define SW3_ICR PORT0.ICR.BIT.B7
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63 #define LED0 PORT0.DR.BIT.B2
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64 #define LED1 PORT0.DR.BIT.B3
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65 #define LED2 PORT0.DR.BIT.B5
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66 #define LED3 PORT3.DR.BIT.B4
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67 #define LED4 PORT6.DR.BIT.B0
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68 #define LED5 PORT7.DR.BIT.B3
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69 #define LED0_DDR PORT0.DDR.BIT.B2
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70 #define LED1_DDR PORT0.DDR.BIT.B3
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71 #define LED2_DDR PORT0.DDR.BIT.B5
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72 #define LED3_DDR PORT3.DDR.BIT.B4
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73 #define LED4_DDR PORT6.DDR.BIT.B0
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74 #define LED5_DDR PORT7.DDR.BIT.B3
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76 /* 2x8 segment LCD */
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77 #define LCD_RS PORT8.DR.BIT.B4
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78 #define LCD_EN PORT8.DR.BIT.B5
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79 #define LCD_DATA PORT9.DR.BYTE
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80 #define LCD_RS_DDR PORT8.DDR.BIT.B4
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81 #define LCD_EN_DDR PORT8.DDR.BIT.B5
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82 #define LCD_DATA_DDR PORT9.DDR.BYTE
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86 /******************************************************************************
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88 ******************************************************************************/
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90 /******************************************************************************
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91 Functions Prototypes
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92 ******************************************************************************/
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