2 FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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4 ***************************************************************************
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8 * + New to FreeRTOS, *
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9 * + Wanting to learn FreeRTOS or multitasking in general quickly *
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10 * + Looking for basic training, *
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11 * + Wanting to improve your FreeRTOS skills and productivity *
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13 * then take a look at the FreeRTOS books - available as PDF or paperback *
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15 * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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16 * http://www.FreeRTOS.org/Documentation *
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18 * A pdf reference manual is also available. Both are usually delivered *
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19 * to your inbox within 20 minutes to two hours when purchased between 8am *
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20 * and 8pm GMT (although please allow up to 24 hours in case of *
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21 * exceptional circumstances). Thank you for your support! *
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23 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 ***NOTE*** The exception to the GPL is included to allow you to distribute
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31 a combined work that includes FreeRTOS without being obliged to provide the
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32 source code for proprietary components outside of the FreeRTOS kernel.
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33 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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34 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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35 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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55 /* Standard includes. */
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58 /* Scheduler include files. */
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59 #include "FreeRTOS.h"
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63 /* Application includes. */
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66 /*-----------------------------------------------------------*/
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68 /* Constants to setup the microcontroller IO. */
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69 #define mainSDA_ENABLE ( ( unsigned long ) 0x0040 )
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70 #define mainSCL_ENABLE ( ( unsigned long ) 0x0010 )
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72 /* Bit definitions within the I2CONCLR register. */
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73 #define i2cSTA_BIT ( ( unsigned char ) 0x20 )
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74 #define i2cSI_BIT ( ( unsigned char ) 0x08 )
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75 #define i2cSTO_BIT ( ( unsigned char ) 0x10 )
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77 /* Constants required to setup the VIC. */
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78 #define i2cI2C_VIC_CHANNEL ( ( unsigned long ) 0x0009 )
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79 #define i2cI2C_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0200 )
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80 #define i2cI2C_VIC_ENABLE ( ( unsigned long ) 0x0020 )
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82 /* Misc constants. */
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83 #define i2cNO_BLOCK ( ( portTickType ) 0 )
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84 #define i2cQUEUE_LENGTH ( ( unsigned char ) 5 )
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85 #define i2cEXTRA_MESSAGES ( ( unsigned char ) 2 )
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86 #define i2cREAD_TX_LEN ( ( unsigned long ) 2 )
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87 #define i2cACTIVE_MASTER_MODE ( ( unsigned char ) 0x40 )
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88 #define i2cTIMERL ( 200 )
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89 #define i2cTIMERH ( 200 )
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91 /* Array of message definitions. See the header file for more information
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92 on the structure members. There are two more places in the queue than as
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93 defined by i2cQUEUE_LENGTH. This is to ensure that there is always a free
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94 message available - one can be in the process of being transmitted and one
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95 can be left free. */
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96 static xI2CMessage xTxMessages[ i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ];
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98 /* Function in the ARM part of the code used to create the queues. */
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99 extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree );
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101 /* Index to the next free message in the xTxMessages array. */
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102 unsigned long ulNextFreeMessage = ( unsigned long ) 0;
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104 /* Queue of messages that are waiting transmission. */
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105 static xQueueHandle xMessagesForTx;
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107 /* Flag to indicate the state of the I2C ISR state machine. */
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108 static unsigned long *pulBusFree;
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110 /*-----------------------------------------------------------*/
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111 void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, xSemaphoreHandle xMessageCompleteSemaphore, portTickType xBlockTime )
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113 extern volatile xI2CMessage *pxCurrentMessage;
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114 xI2CMessage *pxNextFreeMessage;
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115 signed portBASE_TYPE xReturn;
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117 portENTER_CRITICAL();
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119 /* This message is guaranteed to be free as there are two more messages
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120 than spaces in the queue allowing for one message to be in process of
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121 being transmitted and one to be left free. */
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122 pxNextFreeMessage = &( xTxMessages[ ulNextFreeMessage ] );
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124 /* Fill the message with the data to be sent. */
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126 /* Pointer to the actual data. Only a pointer is stored (i.e. the
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127 actual data is not copied, so the data being pointed to must still
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128 be valid when the message eventually gets sent (it may be queued for
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130 pxNextFreeMessage->pucBuffer = ( unsigned char * ) pucMessage;
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132 /* This is the address of the I2C device we are going to transmit this
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134 pxNextFreeMessage->ucSlaveAddress = ucSlaveAddress | ( unsigned char ) ulDirection;
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136 /* A semaphore can be used to allow the I2C ISR to indicate that the
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137 message has been sent. This can be NULL if you don't want to wait for
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138 the message transmission to complete. */
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139 pxNextFreeMessage->xMessageCompleteSemaphore = xMessageCompleteSemaphore;
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141 /* How many bytes are to be sent? */
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142 pxNextFreeMessage->lMessageLength = lMessageLength;
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144 /* The address within the WIZnet device to which the data will be
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145 written. This could be the address of a register, or alternatively
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146 a location within the WIZnet Tx buffer. */
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147 pxNextFreeMessage->ucBufferAddressLowByte = ( unsigned char ) ( usBufferAddress & 0xff );
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149 /* Second byte of the address. */
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150 usBufferAddress >>= 8;
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151 pxNextFreeMessage->ucBufferAddressHighByte = ( unsigned char ) ( usBufferAddress & 0xff );
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153 /* Increment to the next message in the array - with a wrap around check. */
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154 ulNextFreeMessage++;
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155 if( ulNextFreeMessage >= ( i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ) )
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157 ulNextFreeMessage = ( unsigned long ) 0;
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160 /* Is the I2C interrupt in the middle of transmitting a message? */
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161 if( *pulBusFree == ( unsigned long ) pdTRUE )
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163 /* No message is currently being sent or queued to be sent. We
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164 can start the ISR sending this message immediately. */
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165 pxCurrentMessage = pxNextFreeMessage;
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167 I2C_I2CONCLR = i2cSI_BIT;
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168 I2C_I2CONSET = i2cSTA_BIT;
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170 *pulBusFree = ( unsigned long ) pdFALSE;
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174 /* The I2C interrupt routine is mid sending a message. Queue
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175 this message ready to be sent. */
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176 xReturn = xQueueSend( xMessagesForTx, &pxNextFreeMessage, xBlockTime );
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178 /* We may have blocked while trying to queue the message. If this
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179 was the case then the interrupt would have been enabled and we may
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180 now find that the I2C interrupt routine is no longer sending a
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182 if( ( *pulBusFree == ( unsigned long ) pdTRUE ) && ( xReturn == pdPASS ) )
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184 /* Get the next message in the queue (this should be the
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185 message we just posted) and start off the transmission
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187 xQueueReceive( xMessagesForTx, &pxNextFreeMessage, i2cNO_BLOCK );
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188 pxCurrentMessage = pxNextFreeMessage;
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190 I2C_I2CONCLR = i2cSI_BIT;
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191 I2C_I2CONSET = i2cSTA_BIT;
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193 *pulBusFree = ( unsigned long ) pdFALSE;
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197 portEXIT_CRITICAL();
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199 /*-----------------------------------------------------------*/
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201 void i2cInit( void )
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203 extern void ( vI2C_ISR_Wrapper )( void );
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205 /* Create the queue used to send messages to the ISR. */
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206 vI2CISRCreateQueues( i2cQUEUE_LENGTH, &xMessagesForTx, &pulBusFree );
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208 /* Configure the I2C hardware. */
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210 I2C_I2CONCLR = 0xff;
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212 PCB_PINSEL0 |= mainSDA_ENABLE;
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213 PCB_PINSEL0 |= mainSCL_ENABLE;
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215 I2C_I2SCLL = i2cTIMERL;
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216 I2C_I2SCLH = i2cTIMERH;
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217 I2C_I2CONSET = i2cACTIVE_MASTER_MODE;
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219 portENTER_CRITICAL();
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221 /* Setup the VIC for the i2c interrupt. */
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222 VICIntSelect &= ~( i2cI2C_VIC_CHANNEL_BIT );
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223 VICIntEnable |= i2cI2C_VIC_CHANNEL_BIT;
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224 VICVectAddr2 = ( long ) vI2C_ISR_Wrapper;
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226 VICVectCntl2 = i2cI2C_VIC_CHANNEL | i2cI2C_VIC_ENABLE;
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228 portEXIT_CRITICAL();
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