2 FreeRTOS V5.4.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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49 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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51 NOTE: This driver is primarily to test the scheduler functionality. It does
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52 not effectively use the buffers or DMA and is therefore not intended to be
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53 an example of an efficient driver. */
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55 /* Standard include file. */
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58 /* Scheduler include files. */
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59 #include "FreeRTOS.h"
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63 /* Demo app include files. */
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66 /* Hardware setup. */
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69 #define serLOW_SPEED 0
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70 #define serONE_STOP_BIT 0
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71 #define serEIGHT_DATA_BITS_NO_PARITY 0
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72 #define serNORMAL_IDLE_STATE 0
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73 #define serAUTO_BAUD_OFF 0
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74 #define serLOOPBACK_OFF 0
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75 #define serWAKE_UP_DISABLE 0
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76 #define serNO_HARDWARE_FLOW_CONTROL 0
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77 #define serSTANDARD_IO 0
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78 #define serNO_IRDA 0
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79 #define serCONTINUE_IN_IDLE_MODE 0
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80 #define serUART_ENABLED 1
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81 #define serINTERRUPT_ON_SINGLE_CHAR 0
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82 #define serTX_ENABLE 1
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83 #define serINTERRUPT_ENABLE 1
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84 #define serINTERRUPT_DISABLE 0
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85 #define serCLEAR_FLAG 0
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86 #define serSET_FLAG 1
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89 /* The queues used to communicate between tasks and ISR's. */
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90 static xQueueHandle xRxedChars;
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91 static xQueueHandle xCharsForTx;
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93 static portBASE_TYPE xTxHasEnded;
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94 /*-----------------------------------------------------------*/
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96 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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100 /* Create the queues used by the com test task. */
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101 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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102 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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104 /* Setup the UART. */
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105 U2MODEbits.BRGH = serLOW_SPEED;
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106 U2MODEbits.STSEL = serONE_STOP_BIT;
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107 U2MODEbits.PDSEL = serEIGHT_DATA_BITS_NO_PARITY;
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108 U2MODEbits.ABAUD = serAUTO_BAUD_OFF;
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109 U2MODEbits.LPBACK = serLOOPBACK_OFF;
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110 U2MODEbits.WAKE = serWAKE_UP_DISABLE;
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111 U2MODEbits.UEN = serNO_HARDWARE_FLOW_CONTROL;
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112 U2MODEbits.IREN = serNO_IRDA;
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113 U2MODEbits.USIDL = serCONTINUE_IN_IDLE_MODE;
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114 U2MODEbits.UARTEN = serUART_ENABLED;
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116 U2BRG = (unsigned portSHORT)(( (float)configCPU_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);
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118 U2STAbits.URXISEL = serINTERRUPT_ON_SINGLE_CHAR;
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119 U2STAbits.UTXEN = serTX_ENABLE;
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120 U2STAbits.UTXINV = serNORMAL_IDLE_STATE;
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121 U2STAbits.UTXISEL0 = serINTERRUPT_ON_SINGLE_CHAR;
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122 U2STAbits.UTXISEL1 = serINTERRUPT_ON_SINGLE_CHAR;
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124 /* It is assumed that this function is called prior to the scheduler being
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125 started. Therefore interrupts must not be allowed to occur yet as they
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126 may attempt to perform a context switch. */
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127 portDISABLE_INTERRUPTS();
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129 IFS1bits.U2RXIF = serCLEAR_FLAG;
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130 IFS1bits.U2TXIF = serCLEAR_FLAG;
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131 IPC7bits.U2RXIP = configKERNEL_INTERRUPT_PRIORITY;
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132 IPC7bits.U2TXIP = configKERNEL_INTERRUPT_PRIORITY;
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133 IEC1bits.U2TXIE = serINTERRUPT_ENABLE;
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134 IEC1bits.U2RXIE = serINTERRUPT_ENABLE;
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136 /* Clear the Rx buffer. */
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137 while( U2STAbits.URXDA == serSET_FLAG )
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142 xTxHasEnded = pdTRUE;
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146 /*-----------------------------------------------------------*/
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148 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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150 /* Only one port is supported. */
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153 /* Get the next character from the buffer. Return false if no characters
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154 are available or arrive before xBlockTime expires. */
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155 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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164 /*-----------------------------------------------------------*/
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166 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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168 /* Only one port is supported. */
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171 /* Return false if after the block time there is no room on the Tx queue. */
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172 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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177 /* A critical section should not be required as xTxHasEnded will not be
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178 written to by the ISR if it is already 0 (is this correct?). */
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181 xTxHasEnded = pdFALSE;
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182 IFS1bits.U2TXIF = serSET_FLAG;
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187 /*-----------------------------------------------------------*/
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189 void vSerialClose( xComPortHandle xPort )
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192 /*-----------------------------------------------------------*/
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194 void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
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197 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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199 /* Get the character and post it on the queue of Rxed characters.
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200 If the post causes a task to wake force a context switch as the woken task
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201 may have a higher priority than the task we have interrupted. */
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202 IFS1bits.U2RXIF = serCLEAR_FLAG;
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203 while( U2STAbits.URXDA )
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206 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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209 if( xHigherPriorityTaskWoken != pdFALSE )
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214 /*-----------------------------------------------------------*/
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216 void __attribute__((__interrupt__, auto_psv)) _U2TXInterrupt( void )
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218 signed portCHAR cChar;
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219 portBASE_TYPE xTaskWoken = pdFALSE;
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221 /* If the transmit buffer is full we cannot get the next character.
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222 Another interrupt will occur the next time there is space so this does
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224 IFS1bits.U2TXIF = serCLEAR_FLAG;
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225 while( !( U2STAbits.UTXBF ) )
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227 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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229 /* Send the next character queued for Tx. */
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234 /* Queue empty, nothing to send. */
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235 xTxHasEnded = pdTRUE;
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240 if( xTaskWoken != pdFALSE )
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