2 FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
7 it under the terms of the GNU General Public License as published by
\r
8 the Free Software Foundation; either version 2 of the License, or
\r
9 (at your option) any later version.
\r
11 FreeRTOS.org is distributed in the hope that it will be useful,
\r
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
14 GNU General Public License for more details.
\r
16 You should have received a copy of the GNU General Public License
\r
17 along with FreeRTOS.org; if not, write to the Free Software
\r
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
\r
20 A special exception to the GPL can be applied should you wish to distribute
\r
21 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
22 the source code for any proprietary components. See the licensing section
\r
23 of http://www.FreeRTOS.org for full details of how and when the exception
\r
26 ***************************************************************************
\r
27 See http://www.FreeRTOS.org for documentation, latest information, license
\r
28 and contact details. Please ensure to read the configuration and relevant
\r
29 port sections of the online documentation.
\r
31 Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
\r
32 with commercial development and support options.
\r
33 ***************************************************************************
\r
37 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
\r
39 NOTE: This driver is primarily to test the scheduler functionality. It does
\r
40 not effectively use the buffers or DMA and is therefore not intended to be
\r
41 an example of an efficient driver. */
\r
43 /* Standard include file. */
\r
46 /* Scheduler include files. */
\r
47 #include "FreeRTOS.h"
\r
51 /* Demo app include files. */
\r
54 /* Hardware setup. */
\r
57 #define serLOW_SPEED 0
\r
58 #define serONE_STOP_BIT 0
\r
59 #define serEIGHT_DATA_BITS_NO_PARITY 0
\r
60 #define serNORMAL_IDLE_STATE 0
\r
61 #define serAUTO_BAUD_OFF 0
\r
62 #define serLOOPBACK_OFF 0
\r
63 #define serWAKE_UP_DISABLE 0
\r
64 #define serNO_HARDWARE_FLOW_CONTROL 0
\r
65 #define serSTANDARD_IO 0
\r
66 #define serNO_IRDA 0
\r
67 #define serCONTINUE_IN_IDLE_MODE 0
\r
68 #define serUART_ENABLED 1
\r
69 #define serINTERRUPT_ON_SINGLE_CHAR 0
\r
70 #define serTX_ENABLE 1
\r
71 #define serINTERRUPT_ENABLE 1
\r
72 #define serINTERRUPT_DISABLE 0
\r
73 #define serCLEAR_FLAG 0
\r
74 #define serSET_FLAG 1
\r
77 /* The queues used to communicate between tasks and ISR's. */
\r
78 static xQueueHandle xRxedChars;
\r
79 static xQueueHandle xCharsForTx;
\r
81 static portBASE_TYPE xTxHasEnded;
\r
82 /*-----------------------------------------------------------*/
\r
84 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
\r
88 /* Create the queues used by the com test task. */
\r
89 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
90 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
\r
92 /* Setup the UART. */
\r
93 U2MODEbits.BRGH = serLOW_SPEED;
\r
94 U2MODEbits.STSEL = serONE_STOP_BIT;
\r
95 U2MODEbits.PDSEL = serEIGHT_DATA_BITS_NO_PARITY;
\r
96 U2MODEbits.ABAUD = serAUTO_BAUD_OFF;
\r
97 U2MODEbits.LPBACK = serLOOPBACK_OFF;
\r
98 U2MODEbits.WAKE = serWAKE_UP_DISABLE;
\r
99 U2MODEbits.UEN = serNO_HARDWARE_FLOW_CONTROL;
\r
100 U2MODEbits.IREN = serNO_IRDA;
\r
101 U2MODEbits.USIDL = serCONTINUE_IN_IDLE_MODE;
\r
102 U2MODEbits.UARTEN = serUART_ENABLED;
\r
104 U2BRG = (unsigned portSHORT)(( (float)configCPU_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);
\r
106 U2STAbits.URXISEL = serINTERRUPT_ON_SINGLE_CHAR;
\r
107 U2STAbits.UTXEN = serTX_ENABLE;
\r
108 U2STAbits.UTXINV = serNORMAL_IDLE_STATE;
\r
109 U2STAbits.UTXISEL0 = serINTERRUPT_ON_SINGLE_CHAR;
\r
110 U2STAbits.UTXISEL1 = serINTERRUPT_ON_SINGLE_CHAR;
\r
112 /* It is assumed that this function is called prior to the scheduler being
\r
113 started. Therefore interrupts must not be allowed to occur yet as they
\r
114 may attempt to perform a context switch. */
\r
115 portDISABLE_INTERRUPTS();
\r
117 IFS1bits.U2RXIF = serCLEAR_FLAG;
\r
118 IFS1bits.U2TXIF = serCLEAR_FLAG;
\r
119 IPC7bits.U2RXIP = portKERNEL_INTERRUPT_PRIORITY;
\r
120 IPC7bits.U2TXIP = portKERNEL_INTERRUPT_PRIORITY;
\r
121 IEC1bits.U2TXIE = serINTERRUPT_ENABLE;
\r
122 IEC1bits.U2RXIE = serINTERRUPT_ENABLE;
\r
124 /* Clear the Rx buffer. */
\r
125 while( U2STAbits.URXDA == serSET_FLAG )
\r
130 xTxHasEnded = pdTRUE;
\r
134 /*-----------------------------------------------------------*/
\r
136 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
\r
138 /* Only one port is supported. */
\r
141 /* Get the next character from the buffer. Return false if no characters
\r
142 are available or arrive before xBlockTime expires. */
\r
143 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\r
152 /*-----------------------------------------------------------*/
\r
154 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
\r
156 /* Only one port is supported. */
\r
159 /* Return false if after the block time there is no room on the Tx queue. */
\r
160 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
\r
165 /* A critical section should not be required as xTxHasEnded will not be
\r
166 written to by the ISR if it is already 0 (is this correct?). */
\r
169 xTxHasEnded = pdFALSE;
\r
170 IFS1bits.U2TXIF = serSET_FLAG;
\r
175 /*-----------------------------------------------------------*/
\r
177 void vSerialClose( xComPortHandle xPort )
\r
180 /*-----------------------------------------------------------*/
\r
182 volatile short s = 0;
\r
185 void __attribute__((__interrupt__)) _U2RXInterrupt( void )
\r
188 portBASE_TYPE xYieldRequired = pdFALSE;
\r
190 /* Get the character and post it on the queue of Rxed characters.
\r
191 If the post causes a task to wake force a context switch as the woken task
\r
192 may have a higher priority than the task we have interrupted. */
\r
193 IFS1bits.U2RXIF = serCLEAR_FLAG;
\r
194 while( U2STAbits.URXDA )
\r
197 xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
\r
200 if( xYieldRequired != pdFALSE )
\r
205 /*-----------------------------------------------------------*/
\r
207 void __attribute__((__interrupt__)) _U2TXInterrupt( void )
\r
209 signed portCHAR cChar;
\r
210 portBASE_TYPE xTaskWoken = pdFALSE;
\r
212 /* If the transmit buffer is full we cannot get the next character.
\r
213 Another interrupt will occur the next time there is space so this does
\r
215 IFS1bits.U2TXIF = serCLEAR_FLAG;
\r
216 while( !( U2STAbits.UTXBF ) )
\r
218 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
\r
220 /* Send the next character queued for Tx. */
\r
225 /* Queue empty, nothing to send. */
\r
226 xTxHasEnded = pdTRUE;
\r
231 if( xTaskWoken != pdFALSE )
\r