1 /*****************************************************************************
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2 Exception handlers and startup code for ATMEL AT91SAM7.
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4 Copyright (c) 2004 Rowley Associates Limited.
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6 This file may be distributed under the terms of the License Agreement
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7 provided with this software.
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9 THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE
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10 WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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11 *****************************************************************************/
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13 #define REG_BASE 0xFFFFF000
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14 #define CKGR_MOR_OFFSET 0xC20
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15 #define CKGR_PLLR_OFFSET 0xC2C
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16 #define PMC_MCKR_OFFSET 0xC30
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17 #define PMC_SR_OFFSET 0xC68
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18 #define WDT_MR_OFFSET 0xD44
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19 #define MC_RCR_OFFSET 0xF00
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20 #define MC_FMR_OFFSET 0xF60
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22 #define CKGR_MOR_MOSCEN (1 << 0)
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23 #define CKGR_MOR_OSCBYPASS (1 << 1)
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24 #define CKGR_MOR_OSCOUNT_BIT_OFFSET (8)
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26 #define CKGR_PLLR_DIV_BIT_OFFSET (0)
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27 #define CKGR_PLLR_PLLCOUNT_BIT_OFFSET (8)
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28 #define CKGR_PLLR_OUT_BIT_OFFSET (14)
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29 #define CKGR_PLLR_MUL_BIT_OFFSET (16)
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30 #define CKGR_PLLR_USBDIV_BIT_OFFSET (28)
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32 #define PMC_MCKR_CSS_MAIN_CLOCK (0x1)
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33 #define PMC_MCKR_CSS_PLL_CLOCK (0x3)
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34 #define PMC_MCKR_PRES_CLK (0)
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35 #define PMC_MCKR_PRES_CLK_2 (1 << 2)
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36 #define PMC_MCKR_PRES_CLK_4 (2 << 2)
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37 #define PMC_MCKR_PRES_CLK_8 (3 << 2)
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38 #define PMC_MCKR_PRES_CLK_16 (4 << 2)
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39 #define PMC_MCKR_PRES_CLK_32 (5 << 2)
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40 #define PMC_MCKR_PRES_CLK_64 (6 << 2)
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42 #define PMC_SR_MOSCS (1 << 0)
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43 #define PMC_SR_LOCK (1 << 2)
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44 #define PMC_SR_MCKRDY (1 << 3)
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45 #define PMC_SR_PCKRDY0 (1 << 8)
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46 #define PMC_SR_PCKRDY1 (1 << 9)
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47 #define PMC_SR_PCKRDY2 (1 << 10)
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49 #define MC_RCR_RCB (1 << 0)
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51 #define MC_FMR_FWS_0FWS (0)
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52 #define MC_FMR_FWS_1FWS (1 << 8)
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53 #define MC_FMR_FWS_2FWS (2 << 8)
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54 #define MC_FMR_FWS_3FWS (3 << 8)
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55 #define MC_FMR_FMCN_BIT_OFFSET 16
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57 #define WDT_MR_WDDIS (1 << 15)
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59 .section .vectors, "ax"
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63 /*****************************************************************************
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65 *****************************************************************************/
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67 ldr pc, [pc, #reset_handler_address - . - 8] /* reset */
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68 ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */
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69 ldr pc, [pc, #swi_handler_address - . - 8] /* swi handler */
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70 ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */
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71 ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */
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73 ldr pc, [PC, #-0xF20] /* irq */
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74 ldr pc, [pc, #fiq_handler_address - . - 8] /* fiq */
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76 reset_handler_address:
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78 undef_handler_address:
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80 swi_handler_address:
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82 pabort_handler_address:
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83 .word pabort_handler
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84 dabort_handler_address:
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85 .word dabort_handler
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86 irq_handler_address:
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88 fiq_handler_address:
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91 .section .init, "ax"
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95 /******************************************************************************
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97 ******************************************************************************/
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103 /* Set up FLASH wait state */
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104 ldr r0, =(50 << MC_FMR_FMCN_BIT_OFFSET) | MC_FMR_FWS_1FWS
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105 str r0, [r10, #MC_FMR_OFFSET]
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107 /* Disable Watchdog */
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108 ldr r0, =WDT_MR_WDDIS
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109 str r0, [r10, #WDT_MR_OFFSET]
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111 /* Enable the main oscillator */
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112 ldr r0, =(6 << CKGR_MOR_OSCOUNT_BIT_OFFSET) | CKGR_MOR_MOSCEN
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113 str r0, [r10, #CKGR_MOR_OFFSET]
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115 1:/* Wait for main oscillator to stabilize */
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116 ldr r0, [r10, #PMC_SR_OFFSET]
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117 tst r0, #PMC_SR_MOSCS
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120 /* Set up the PLL */
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121 ldr r0, =(5 << CKGR_PLLR_DIV_BIT_OFFSET) | (28 << CKGR_PLLR_PLLCOUNT_BIT_OFFSET) | (25 << CKGR_PLLR_MUL_BIT_OFFSET)
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122 str r0, [r10, #CKGR_PLLR_OFFSET]
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124 1:/* Wait for PLL to lock */
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125 ldr r0, [r10, #PMC_SR_OFFSET]
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126 tst r0, #PMC_SR_LOCK
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129 /* Select PLL as clock source */
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130 ldr r0, =(PMC_MCKR_CSS_PLL_CLOCK | PMC_MCKR_PRES_CLK_2)
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131 str r0, [r10, #PMC_MCKR_OFFSET]
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133 #ifdef __FLASH_BUILD
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134 /* Copy exception vectors into Internal SRAM */
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135 mov r8, #0x00200000
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142 /* Remap Internal SRAM to 0x00000000 */
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143 ldr r0, =MC_RCR_RCB
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144 strb r0, [r10, #MC_RCR_OFFSET]
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148 /* Jump to the default C runtime startup code. */
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151 /******************************************************************************
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152 Default exception handlers
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153 (These are declared weak symbols so they can be redefined in user code)
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154 ******************************************************************************/
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173 .weak undef_handler, swi_handler, pabort_handler, dabort_handler, irq_handler, fiq_handler
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