2 * These files are taken from the MCF523X source code example package
3 * which is available on the Freescale website. Freescale explicitly
4 * grants the redistribution and modification of these source files.
5 * The complete licensing information is available in the file
6 * LICENSE_FREESCALE.TXT.
8 * File: mcf523x_intc0.h
9 * Purpose: Register and bit definitions for the MCF523X
15 #ifndef __MCF523X_INTC0_H__
16 #define __MCF523X_INTC0_H__
18 /*********************************************************************
20 * Interrupt Controller 0 (INTC0)
22 *********************************************************************/
24 /* Register read/write macros */
25 #define MCF_INTC0_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000C00]))
26 #define MCF_INTC0_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000C04]))
27 #define MCF_INTC0_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000C08]))
28 #define MCF_INTC0_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000C0C]))
29 #define MCF_INTC0_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000C10]))
30 #define MCF_INTC0_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000C14]))
31 #define MCF_INTC0_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000C18]))
32 #define MCF_INTC0_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000C19]))
33 #define MCF_INTC0_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000C40]))
34 #define MCF_INTC0_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000C41]))
35 #define MCF_INTC0_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000C42]))
36 #define MCF_INTC0_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000C43]))
37 #define MCF_INTC0_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000C44]))
38 #define MCF_INTC0_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000C45]))
39 #define MCF_INTC0_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000C46]))
40 #define MCF_INTC0_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000C47]))
41 #define MCF_INTC0_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000C48]))
42 #define MCF_INTC0_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000C49]))
43 #define MCF_INTC0_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4A]))
44 #define MCF_INTC0_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4B]))
45 #define MCF_INTC0_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4C]))
46 #define MCF_INTC0_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4D]))
47 #define MCF_INTC0_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4E]))
48 #define MCF_INTC0_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4F]))
49 #define MCF_INTC0_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000C50]))
50 #define MCF_INTC0_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000C51]))
51 #define MCF_INTC0_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000C52]))
52 #define MCF_INTC0_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000C53]))
53 #define MCF_INTC0_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000C54]))
54 #define MCF_INTC0_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000C55]))
55 #define MCF_INTC0_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000C56]))
56 #define MCF_INTC0_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000C57]))
57 #define MCF_INTC0_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000C58]))
58 #define MCF_INTC0_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000C59]))
59 #define MCF_INTC0_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5A]))
60 #define MCF_INTC0_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5B]))
61 #define MCF_INTC0_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5C]))
62 #define MCF_INTC0_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5D]))
63 #define MCF_INTC0_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5E]))
64 #define MCF_INTC0_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5F]))
65 #define MCF_INTC0_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000C60]))
66 #define MCF_INTC0_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000C61]))
67 #define MCF_INTC0_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000C62]))
68 #define MCF_INTC0_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000C63]))
69 #define MCF_INTC0_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000C64]))
70 #define MCF_INTC0_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000C65]))
71 #define MCF_INTC0_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000C66]))
72 #define MCF_INTC0_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000C67]))
73 #define MCF_INTC0_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000C68]))
74 #define MCF_INTC0_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000C69]))
75 #define MCF_INTC0_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6A]))
76 #define MCF_INTC0_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6B]))
77 #define MCF_INTC0_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6C]))
78 #define MCF_INTC0_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6D]))
79 #define MCF_INTC0_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6E]))
80 #define MCF_INTC0_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6F]))
81 #define MCF_INTC0_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000C70]))
82 #define MCF_INTC0_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000C71]))
83 #define MCF_INTC0_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000C72]))
84 #define MCF_INTC0_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000C73]))
85 #define MCF_INTC0_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000C74]))
86 #define MCF_INTC0_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000C75]))
87 #define MCF_INTC0_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000C76]))
88 #define MCF_INTC0_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000C77]))
89 #define MCF_INTC0_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000C78]))
90 #define MCF_INTC0_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000C79]))
91 #define MCF_INTC0_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7A]))
92 #define MCF_INTC0_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7B]))
93 #define MCF_INTC0_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7C]))
94 #define MCF_INTC0_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7D]))
95 #define MCF_INTC0_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7E]))
96 #define MCF_INTC0_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7F]))
97 #define MCF_INTC0_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000C40+((x)*0x001)]))
98 #define MCF_INTC0_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE0]))
99 #define MCF_INTC0_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4]))
100 #define MCF_INTC0_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE8]))
101 #define MCF_INTC0_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CEC]))
102 #define MCF_INTC0_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF0]))
103 #define MCF_INTC0_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF4]))
104 #define MCF_INTC0_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF8]))
105 #define MCF_INTC0_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CFC]))
106 #define MCF_INTC0_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4+((x)*0x004)]))
108 /* Bit definitions and macros for MCF_INTC0_IPRH */
109 #define MCF_INTC0_IPRH_INT32 (0x00000001)
110 #define MCF_INTC0_IPRH_INT33 (0x00000002)
111 #define MCF_INTC0_IPRH_INT34 (0x00000004)
112 #define MCF_INTC0_IPRH_INT35 (0x00000008)
113 #define MCF_INTC0_IPRH_INT36 (0x00000010)
114 #define MCF_INTC0_IPRH_INT37 (0x00000020)
115 #define MCF_INTC0_IPRH_INT38 (0x00000040)
116 #define MCF_INTC0_IPRH_INT39 (0x00000080)
117 #define MCF_INTC0_IPRH_INT40 (0x00000100)
118 #define MCF_INTC0_IPRH_INT41 (0x00000200)
119 #define MCF_INTC0_IPRH_INT42 (0x00000400)
120 #define MCF_INTC0_IPRH_INT43 (0x00000800)
121 #define MCF_INTC0_IPRH_INT44 (0x00001000)
122 #define MCF_INTC0_IPRH_INT45 (0x00002000)
123 #define MCF_INTC0_IPRH_INT46 (0x00004000)
124 #define MCF_INTC0_IPRH_INT47 (0x00008000)
125 #define MCF_INTC0_IPRH_INT48 (0x00010000)
126 #define MCF_INTC0_IPRH_INT49 (0x00020000)
127 #define MCF_INTC0_IPRH_INT50 (0x00040000)
128 #define MCF_INTC0_IPRH_INT51 (0x00080000)
129 #define MCF_INTC0_IPRH_INT52 (0x00100000)
130 #define MCF_INTC0_IPRH_INT53 (0x00200000)
131 #define MCF_INTC0_IPRH_INT54 (0x00400000)
132 #define MCF_INTC0_IPRH_INT55 (0x00800000)
133 #define MCF_INTC0_IPRH_INT56 (0x01000000)
134 #define MCF_INTC0_IPRH_INT57 (0x02000000)
135 #define MCF_INTC0_IPRH_INT58 (0x04000000)
136 #define MCF_INTC0_IPRH_INT59 (0x08000000)
137 #define MCF_INTC0_IPRH_INT60 (0x10000000)
138 #define MCF_INTC0_IPRH_INT61 (0x20000000)
139 #define MCF_INTC0_IPRH_INT62 (0x40000000)
140 #define MCF_INTC0_IPRH_INT63 (0x80000000)
142 /* Bit definitions and macros for MCF_INTC0_IPRL */
143 #define MCF_INTC0_IPRL_INT1 (0x00000002)
144 #define MCF_INTC0_IPRL_INT2 (0x00000004)
145 #define MCF_INTC0_IPRL_INT3 (0x00000008)
146 #define MCF_INTC0_IPRL_INT4 (0x00000010)
147 #define MCF_INTC0_IPRL_INT5 (0x00000020)
148 #define MCF_INTC0_IPRL_INT6 (0x00000040)
149 #define MCF_INTC0_IPRL_INT7 (0x00000080)
150 #define MCF_INTC0_IPRL_INT8 (0x00000100)
151 #define MCF_INTC0_IPRL_INT9 (0x00000200)
152 #define MCF_INTC0_IPRL_INT10 (0x00000400)
153 #define MCF_INTC0_IPRL_INT11 (0x00000800)
154 #define MCF_INTC0_IPRL_INT12 (0x00001000)
155 #define MCF_INTC0_IPRL_INT13 (0x00002000)
156 #define MCF_INTC0_IPRL_INT14 (0x00004000)
157 #define MCF_INTC0_IPRL_INT15 (0x00008000)
158 #define MCF_INTC0_IPRL_INT16 (0x00010000)
159 #define MCF_INTC0_IPRL_INT17 (0x00020000)
160 #define MCF_INTC0_IPRL_INT18 (0x00040000)
161 #define MCF_INTC0_IPRL_INT19 (0x00080000)
162 #define MCF_INTC0_IPRL_INT20 (0x00100000)
163 #define MCF_INTC0_IPRL_INT21 (0x00200000)
164 #define MCF_INTC0_IPRL_INT22 (0x00400000)
165 #define MCF_INTC0_IPRL_INT23 (0x00800000)
166 #define MCF_INTC0_IPRL_INT24 (0x01000000)
167 #define MCF_INTC0_IPRL_INT25 (0x02000000)
168 #define MCF_INTC0_IPRL_INT26 (0x04000000)
169 #define MCF_INTC0_IPRL_INT27 (0x08000000)
170 #define MCF_INTC0_IPRL_INT28 (0x10000000)
171 #define MCF_INTC0_IPRL_INT29 (0x20000000)
172 #define MCF_INTC0_IPRL_INT30 (0x40000000)
173 #define MCF_INTC0_IPRL_INT31 (0x80000000)
175 /* Bit definitions and macros for MCF_INTC0_IMRH */
176 #define MCF_INTC0_IMRH_INT_MASK32 (0x00000001)
177 #define MCF_INTC0_IMRH_INT_MASK33 (0x00000002)
178 #define MCF_INTC0_IMRH_INT_MASK34 (0x00000004)
179 #define MCF_INTC0_IMRH_INT_MASK35 (0x00000008)
180 #define MCF_INTC0_IMRH_INT_MASK36 (0x00000010)
181 #define MCF_INTC0_IMRH_INT_MASK37 (0x00000020)
182 #define MCF_INTC0_IMRH_INT_MASK38 (0x00000040)
183 #define MCF_INTC0_IMRH_INT_MASK39 (0x00000080)
184 #define MCF_INTC0_IMRH_INT_MASK40 (0x00000100)
185 #define MCF_INTC0_IMRH_INT_MASK41 (0x00000200)
186 #define MCF_INTC0_IMRH_INT_MASK42 (0x00000400)
187 #define MCF_INTC0_IMRH_INT_MASK43 (0x00000800)
188 #define MCF_INTC0_IMRH_INT_MASK44 (0x00001000)
189 #define MCF_INTC0_IMRH_INT_MASK45 (0x00002000)
190 #define MCF_INTC0_IMRH_INT_MASK46 (0x00004000)
191 #define MCF_INTC0_IMRH_INT_MASK47 (0x00008000)
192 #define MCF_INTC0_IMRH_INT_MASK48 (0x00010000)
193 #define MCF_INTC0_IMRH_INT_MASK49 (0x00020000)
194 #define MCF_INTC0_IMRH_INT_MASK50 (0x00040000)
195 #define MCF_INTC0_IMRH_INT_MASK51 (0x00080000)
196 #define MCF_INTC0_IMRH_INT_MASK52 (0x00100000)
197 #define MCF_INTC0_IMRH_INT_MASK53 (0x00200000)
198 #define MCF_INTC0_IMRH_INT_MASK54 (0x00400000)
199 #define MCF_INTC0_IMRH_INT_MASK55 (0x00800000)
200 #define MCF_INTC0_IMRH_INT_MASK56 (0x01000000)
201 #define MCF_INTC0_IMRH_INT_MASK57 (0x02000000)
202 #define MCF_INTC0_IMRH_INT_MASK58 (0x04000000)
203 #define MCF_INTC0_IMRH_INT_MASK59 (0x08000000)
204 #define MCF_INTC0_IMRH_INT_MASK60 (0x10000000)
205 #define MCF_INTC0_IMRH_INT_MASK61 (0x20000000)
206 #define MCF_INTC0_IMRH_INT_MASK62 (0x40000000)
207 #define MCF_INTC0_IMRH_INT_MASK63 (0x80000000)
209 /* Bit definitions and macros for MCF_INTC0_IMRL */
210 #define MCF_INTC0_IMRL_MASKALL (0x00000001)
211 #define MCF_INTC0_IMRL_INT_MASK1 (0x00000002)
212 #define MCF_INTC0_IMRL_INT_MASK2 (0x00000004)
213 #define MCF_INTC0_IMRL_INT_MASK3 (0x00000008)
214 #define MCF_INTC0_IMRL_INT_MASK4 (0x00000010)
215 #define MCF_INTC0_IMRL_INT_MASK5 (0x00000020)
216 #define MCF_INTC0_IMRL_INT_MASK6 (0x00000040)
217 #define MCF_INTC0_IMRL_INT_MASK7 (0x00000080)
218 #define MCF_INTC0_IMRL_INT_MASK8 (0x00000100)
219 #define MCF_INTC0_IMRL_INT_MASK9 (0x00000200)
220 #define MCF_INTC0_IMRL_INT_MASK10 (0x00000400)
221 #define MCF_INTC0_IMRL_INT_MASK11 (0x00000800)
222 #define MCF_INTC0_IMRL_INT_MASK12 (0x00001000)
223 #define MCF_INTC0_IMRL_INT_MASK13 (0x00002000)
224 #define MCF_INTC0_IMRL_INT_MASK14 (0x00004000)
225 #define MCF_INTC0_IMRL_INT_MASK15 (0x00008000)
226 #define MCF_INTC0_IMRL_INT_MASK16 (0x00010000)
227 #define MCF_INTC0_IMRL_INT_MASK17 (0x00020000)
228 #define MCF_INTC0_IMRL_INT_MASK18 (0x00040000)
229 #define MCF_INTC0_IMRL_INT_MASK19 (0x00080000)
230 #define MCF_INTC0_IMRL_INT_MASK20 (0x00100000)
231 #define MCF_INTC0_IMRL_INT_MASK21 (0x00200000)
232 #define MCF_INTC0_IMRL_INT_MASK22 (0x00400000)
233 #define MCF_INTC0_IMRL_INT_MASK23 (0x00800000)
234 #define MCF_INTC0_IMRL_INT_MASK24 (0x01000000)
235 #define MCF_INTC0_IMRL_INT_MASK25 (0x02000000)
236 #define MCF_INTC0_IMRL_INT_MASK26 (0x04000000)
237 #define MCF_INTC0_IMRL_INT_MASK27 (0x08000000)
238 #define MCF_INTC0_IMRL_INT_MASK28 (0x10000000)
239 #define MCF_INTC0_IMRL_INT_MASK29 (0x20000000)
240 #define MCF_INTC0_IMRL_INT_MASK30 (0x40000000)
241 #define MCF_INTC0_IMRL_INT_MASK31 (0x80000000)
243 /* Bit definitions and macros for MCF_INTC0_INTFRCH */
244 #define MCF_INTC0_INTFRCH_INTFRC32 (0x00000001)
245 #define MCF_INTC0_INTFRCH_INTFRC33 (0x00000002)
246 #define MCF_INTC0_INTFRCH_INTFRC34 (0x00000004)
247 #define MCF_INTC0_INTFRCH_INTFRC35 (0x00000008)
248 #define MCF_INTC0_INTFRCH_INTFRC36 (0x00000010)
249 #define MCF_INTC0_INTFRCH_INTFRC37 (0x00000020)
250 #define MCF_INTC0_INTFRCH_INTFRC38 (0x00000040)
251 #define MCF_INTC0_INTFRCH_INTFRC39 (0x00000080)
252 #define MCF_INTC0_INTFRCH_INTFRC40 (0x00000100)
253 #define MCF_INTC0_INTFRCH_INTFRC41 (0x00000200)
254 #define MCF_INTC0_INTFRCH_INTFRC42 (0x00000400)
255 #define MCF_INTC0_INTFRCH_INTFRC43 (0x00000800)
256 #define MCF_INTC0_INTFRCH_INTFRC44 (0x00001000)
257 #define MCF_INTC0_INTFRCH_INTFRC45 (0x00002000)
258 #define MCF_INTC0_INTFRCH_INTFRC46 (0x00004000)
259 #define MCF_INTC0_INTFRCH_INTFRC47 (0x00008000)
260 #define MCF_INTC0_INTFRCH_INTFRC48 (0x00010000)
261 #define MCF_INTC0_INTFRCH_INTFRC49 (0x00020000)
262 #define MCF_INTC0_INTFRCH_INTFRC50 (0x00040000)
263 #define MCF_INTC0_INTFRCH_INTFRC51 (0x00080000)
264 #define MCF_INTC0_INTFRCH_INTFRC52 (0x00100000)
265 #define MCF_INTC0_INTFRCH_INTFRC53 (0x00200000)
266 #define MCF_INTC0_INTFRCH_INTFRC54 (0x00400000)
267 #define MCF_INTC0_INTFRCH_INTFRC55 (0x00800000)
268 #define MCF_INTC0_INTFRCH_INTFRC56 (0x01000000)
269 #define MCF_INTC0_INTFRCH_INTFRC57 (0x02000000)
270 #define MCF_INTC0_INTFRCH_INTFRC58 (0x04000000)
271 #define MCF_INTC0_INTFRCH_INTFRC59 (0x08000000)
272 #define MCF_INTC0_INTFRCH_INTFRC60 (0x10000000)
273 #define MCF_INTC0_INTFRCH_INTFRC61 (0x20000000)
274 #define MCF_INTC0_INTFRCH_INTFRC62 (0x40000000)
275 #define MCF_INTC0_INTFRCH_INTFRC63 (0x80000000)
277 /* Bit definitions and macros for MCF_INTC0_INTFRCL */
278 #define MCF_INTC0_INTFRCL_INTFRC1 (0x00000002)
279 #define MCF_INTC0_INTFRCL_INTFRC2 (0x00000004)
280 #define MCF_INTC0_INTFRCL_INTFRC3 (0x00000008)
281 #define MCF_INTC0_INTFRCL_INTFRC4 (0x00000010)
282 #define MCF_INTC0_INTFRCL_INTFRC5 (0x00000020)
283 #define MCF_INTC0_INTFRCL_INT6 (0x00000040)
284 #define MCF_INTC0_INTFRCL_INT7 (0x00000080)
285 #define MCF_INTC0_INTFRCL_INT8 (0x00000100)
286 #define MCF_INTC0_INTFRCL_INT9 (0x00000200)
287 #define MCF_INTC0_INTFRCL_INT10 (0x00000400)
288 #define MCF_INTC0_INTFRCL_INTFRC11 (0x00000800)
289 #define MCF_INTC0_INTFRCL_INTFRC12 (0x00001000)
290 #define MCF_INTC0_INTFRCL_INTFRC13 (0x00002000)
291 #define MCF_INTC0_INTFRCL_INTFRC14 (0x00004000)
292 #define MCF_INTC0_INTFRCL_INT15 (0x00008000)
293 #define MCF_INTC0_INTFRCL_INTFRC16 (0x00010000)
294 #define MCF_INTC0_INTFRCL_INTFRC17 (0x00020000)
295 #define MCF_INTC0_INTFRCL_INTFRC18 (0x00040000)
296 #define MCF_INTC0_INTFRCL_INTFRC19 (0x00080000)
297 #define MCF_INTC0_INTFRCL_INTFRC20 (0x00100000)
298 #define MCF_INTC0_INTFRCL_INTFRC21 (0x00200000)
299 #define MCF_INTC0_INTFRCL_INTFRC22 (0x00400000)
300 #define MCF_INTC0_INTFRCL_INTFRC23 (0x00800000)
301 #define MCF_INTC0_INTFRCL_INTFRC24 (0x01000000)
302 #define MCF_INTC0_INTFRCL_INTFRC25 (0x02000000)
303 #define MCF_INTC0_INTFRCL_INTFRC26 (0x04000000)
304 #define MCF_INTC0_INTFRCL_INTFRC27 (0x08000000)
305 #define MCF_INTC0_INTFRCL_INTFRC28 (0x10000000)
306 #define MCF_INTC0_INTFRCL_INTFRC29 (0x20000000)
307 #define MCF_INTC0_INTFRCL_INTFRC30 (0x40000000)
308 #define MCF_INTC0_INTFRCL_INTFRC31 (0x80000000)
310 /* Bit definitions and macros for MCF_INTC0_IRLR */
311 #define MCF_INTC0_IRLR_IRQ(x) (((x)&0x7F)<<1)
313 /* Bit definitions and macros for MCF_INTC0_IACKLPR */
314 #define MCF_INTC0_IACKLPR_PRI(x) (((x)&0x0F)<<0)
315 #define MCF_INTC0_IACKLPR_LEVEL(x) (((x)&0x07)<<4)
317 /* Bit definitions and macros for MCF_INTC0_ICRn */
318 #define MCF_INTC0_ICRn_IP(x) (((x)&0x07)<<0)
319 #define MCF_INTC0_ICRn_IL(x) (((x)&0x07)<<3)
321 /********************************************************************/
323 #endif /* __MCF523X_INTC0_H__ */