2 * These files are taken from the MCF523X source code example package
3 * which is available on the Freescale website. Freescale explicitly
4 * grants the redistribution and modification of these source files.
5 * The complete licensing information is available in the file
6 * LICENSE_FREESCALE.TXT.
9 * Purpose: Register and bit definitions for the MCF523X
15 #ifndef __MCF523X_SKHA_H__
16 #define __MCF523X_SKHA_H__
18 /*********************************************************************
20 * Symmetric Key Hardware Accelerator (SKHA)
22 *********************************************************************/
24 /* Register read/write macros */
25 #define MCF_SKHA_SKMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0000]))
26 #define MCF_SKHA_SKCR (*(vuint32*)(void*)(&__IPSBAR[0x1B0004]))
27 #define MCF_SKHA_SKCMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0008]))
28 #define MCF_SKHA_SKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B000C]))
29 #define MCF_SKHA_SKIR (*(vuint32*)(void*)(&__IPSBAR[0x1B0010]))
30 #define MCF_SKHA_SKIMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0014]))
31 #define MCF_SKHA_SKKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B0018]))
32 #define MCF_SKHA_SKDSR (*(vuint32*)(void*)(&__IPSBAR[0x1B001C]))
33 #define MCF_SKHA_SKIN (*(vuint32*)(void*)(&__IPSBAR[0x1B0020]))
34 #define MCF_SKHA_SKOUT (*(vuint32*)(void*)(&__IPSBAR[0x1B0024]))
35 #define MCF_SKHA_SKKDR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0030]))
36 #define MCF_SKHA_SKKDR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0034]))
37 #define MCF_SKHA_SKKDR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0038]))
38 #define MCF_SKHA_SKKDR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B003C]))
39 #define MCF_SKHA_SKKDR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0040]))
40 #define MCF_SKHA_SKKDR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0044]))
41 #define MCF_SKHA_SKKDRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0030+((x)*0x004)]))
42 #define MCF_SKHA_SKCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0070]))
43 #define MCF_SKHA_SKCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0074]))
44 #define MCF_SKHA_SKCR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0078]))
45 #define MCF_SKHA_SKCR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B007C]))
46 #define MCF_SKHA_SKCR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0080]))
47 #define MCF_SKHA_SKCR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0084]))
48 #define MCF_SKHA_SKCR6 (*(vuint32*)(void*)(&__IPSBAR[0x1B0088]))
49 #define MCF_SKHA_SKCR7 (*(vuint32*)(void*)(&__IPSBAR[0x1B008C]))
50 #define MCF_SKHA_SKCR8 (*(vuint32*)(void*)(&__IPSBAR[0x1B0090]))
51 #define MCF_SKHA_SKCR9 (*(vuint32*)(void*)(&__IPSBAR[0x1B0094]))
52 #define MCF_SKHA_SKCR10 (*(vuint32*)(void*)(&__IPSBAR[0x1B0098]))
53 #define MCF_SKHA_SKCR11 (*(vuint32*)(void*)(&__IPSBAR[0x1B009C]))
54 #define MCF_SKHA_SKCRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0070+((x)*0x004)]))
56 /* Bit definitions and macros for MCF_SKHA_SKMR */
57 #define MCF_SKHA_SKMR_ALG(x) (((x)&0x00000003)<<0)
58 #define MCF_SKHA_SKMR_DIR (0x00000004)
59 #define MCF_SKHA_SKMR_CM(x) (((x)&0x00000003)<<3)
60 #define MCF_SKHA_SKMR_DKP (0x00000100)
61 #define MCF_SKHA_SKMR_CTRM(x) (((x)&0x0000000F)<<9)
62 #define MCF_SKHA_SKMR_CM_ECB (0x00000000)
63 #define MCF_SKHA_SKMR_CM_CBC (0x00000008)
64 #define MCF_SKHA_SKMR_CM_CTR (0x00000018)
65 #define MCF_SKHA_SKMR_DIR_DEC (0x00000000)
66 #define MCF_SKHA_SKMR_DIR_ENC (0x00000004)
67 #define MCF_SKHA_SKMR_ALG_AES (0x00000000)
68 #define MCF_SKHA_SKMR_ALG_DES (0x00000001)
69 #define MCF_SKHA_SKMR_ALG_TDES (0x00000002)
71 /* Bit definitions and macros for MCF_SKHA_SKCR */
72 #define MCF_SKHA_SKCR_IE (0x00000001)
74 /* Bit definitions and macros for MCF_SKHA_SKCMR */
75 #define MCF_SKHA_SKCMR_SWR (0x00000001)
76 #define MCF_SKHA_SKCMR_RI (0x00000002)
77 #define MCF_SKHA_SKCMR_CI (0x00000004)
78 #define MCF_SKHA_SKCMR_GO (0x00000008)
80 /* Bit definitions and macros for MCF_SKHA_SKSR */
81 #define MCF_SKHA_SKSR_INT (0x00000001)
82 #define MCF_SKHA_SKSR_DONE (0x00000002)
83 #define MCF_SKHA_SKSR_ERR (0x00000004)
84 #define MCF_SKHA_SKSR_RD (0x00000008)
85 #define MCF_SKHA_SKSR_BUSY (0x00000010)
86 #define MCF_SKHA_SKSR_IFL(x) (((x)&0x000000FF)<<16)
87 #define MCF_SKHA_SKSR_OFL(x) (((x)&0x000000FF)<<24)
89 /* Bit definitions and macros for MCF_SKHA_SKIR */
90 #define MCF_SKHA_SKIR_IFO (0x00000001)
91 #define MCF_SKHA_SKIR_OFU (0x00000002)
92 #define MCF_SKHA_SKIR_NEIF (0x00000004)
93 #define MCF_SKHA_SKIR_NEOF (0x00000008)
94 #define MCF_SKHA_SKIR_IME (0x00000010)
95 #define MCF_SKHA_SKIR_DSE (0x00000020)
96 #define MCF_SKHA_SKIR_KSE (0x00000040)
97 #define MCF_SKHA_SKIR_RMDP (0x00000080)
98 #define MCF_SKHA_SKIR_ERE (0x00000100)
99 #define MCF_SKHA_SKIR_KPE (0x00000200)
100 #define MCF_SKHA_SKIR_KRE (0x00000400)
102 /* Bit definitions and macros for MCF_SKHA_SKIMR */
103 #define MCF_SKHA_SKIMR_IFO (0x00000001)
104 #define MCF_SKHA_SKIMR_OFU (0x00000002)
105 #define MCF_SKHA_SKIMR_NEIF (0x00000004)
106 #define MCF_SKHA_SKIMR_NEOF (0x00000008)
107 #define MCF_SKHA_SKIMR_IME (0x00000010)
108 #define MCF_SKHA_SKIMR_DSE (0x00000020)
109 #define MCF_SKHA_SKIMR_KSE (0x00000040)
110 #define MCF_SKHA_SKIMR_RMDP (0x00000080)
111 #define MCF_SKHA_SKIMR_ERE (0x00000100)
112 #define MCF_SKHA_SKIMR_KPE (0x00000200)
113 #define MCF_SKHA_SKIMR_KRE (0x00000400)
115 /* Bit definitions and macros for MCF_SKHA_SKKSR */
116 #define MCF_SKHA_SKKSR_KEYSIZE(x) (((x)&0x0000003F)<<0)
118 /********************************************************************/
120 #endif /* __MCF523X_SKHA_H__ */