2 FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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31 Also see http://www.SafeRTOS.com a version that has been certified for use
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32 in safety critical systems, plus commercial licensing, development and
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34 ***************************************************************************
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38 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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40 * This file only supports UART 1
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43 /* Standard includes. */
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47 /* Scheduler includes. */
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48 #include "FreeRTOS.h"
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52 /* Demo application includes. */
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55 /* Constants required to setup the hardware. */
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56 #define serTX_AND_RX ( ( unsigned portCHAR ) 0x03 )
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58 /* Misc. constants. */
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59 #define serNO_BLOCK ( ( portTickType ) 0 )
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61 /* Enable the UART Tx interrupt. */
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62 #define vInterruptOn() IFG2 |= UTXIFG1
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64 /* The queue used to hold received characters. */
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65 static xQueueHandle xRxedChars;
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67 /* The queue used to hold characters waiting transmission. */
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68 static xQueueHandle xCharsForTx;
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70 static volatile portSHORT sTHREEmpty;
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72 /* Interrupt service routines. */
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73 interrupt (UART1RX_VECTOR) vRxISR( void );
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74 interrupt (UART1TX_VECTOR) vTxISR( void );
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76 /*-----------------------------------------------------------*/
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78 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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80 unsigned portLONG ulBaudRateCount;
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82 /* Initialise the hardware. */
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84 /* Generate the baud rate constants for the wanted baud rate. */
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85 ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud;
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87 portENTER_CRITICAL();
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89 /* Create the queues used by the com test task. */
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90 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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91 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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96 /* Set pin function. */
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97 P4SEL |= serTX_AND_RX;
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99 /* All other bits remain at zero for n, 8, 1 interrupt driven operation.
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101 U1CTL |= CHAR + LISTEN;
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104 /* Setup baud rate low byte. */
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105 U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
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107 /* Setup baud rate high byte. */
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108 ulBaudRateCount >>= 8UL;
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109 U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
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111 /* Enable ports. */
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112 ME2 |= UTXE1 + URXE1;
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117 /* Nothing in the buffer yet. */
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118 sTHREEmpty = pdTRUE;
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120 /* Enable interrupts. */
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121 IE2 |= URXIE1 + UTXIE1;
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123 portEXIT_CRITICAL();
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125 /* Unlike other ports, this serial code does not allow for more than one
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126 com port. We therefore don't return a pointer to a port structure and can
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127 instead just return NULL. */
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130 /*-----------------------------------------------------------*/
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132 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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134 /* Get the next character from the buffer. Return false if no characters
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135 are available, or arrive before xBlockTime expires. */
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136 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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145 /*-----------------------------------------------------------*/
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147 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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149 signed portBASE_TYPE xReturn;
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151 /* Transmit a character. */
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153 portENTER_CRITICAL();
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155 if( sTHREEmpty == pdTRUE )
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157 /* If sTHREEmpty is true then the UART Tx ISR has indicated that
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158 there are no characters queued to be transmitted - so we can
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159 write the character directly to the shift Tx register. */
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160 sTHREEmpty = pdFALSE;
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161 U1TXBUF = cOutChar;
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166 /* sTHREEmpty is false, so there are still characters waiting to be
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167 transmitted. We have to queue this character so it gets
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168 transmitted in turn. */
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170 /* Return false if after the block time there is no room on the Tx
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171 queue. It is ok to block inside a critical section as each task
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172 maintains it's own critical section status. */
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173 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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175 /* Depending on queue sizing and task prioritisation: While we
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176 were blocked waiting to post on the queue interrupts were not
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177 disabled. It is possible that the serial ISR has emptied the
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178 Tx queue, in which case we need to start the Tx off again
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179 writing directly to the Tx register. */
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180 if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) )
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182 /* Get back the character we just posted. */
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183 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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184 sTHREEmpty = pdFALSE;
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185 U1TXBUF = cOutChar;
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189 portEXIT_CRITICAL();
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193 /*-----------------------------------------------------------*/
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196 * UART RX interrupt service routine.
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198 interrupt (UART1RX_VECTOR) vRxISR( void )
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200 signed portCHAR cChar;
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202 /* Get the character from the UART and post it on the queue of Rxed
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206 if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
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208 /*If the post causes a task to wake force a context switch
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209 as the woken task may have a higher priority than the task we have
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214 /*-----------------------------------------------------------*/
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217 * UART Tx interrupt service routine.
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219 interrupt (UART1TX_VECTOR) vTxISR( void )
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221 signed portCHAR cChar;
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222 portBASE_TYPE xTaskWoken;
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224 /* The previous character has been transmitted. See if there are any
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225 further characters waiting transmission. */
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227 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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229 /* There was another character queued - transmit it now. */
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234 /* There were no other characters to transmit. */
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235 sTHREEmpty = pdTRUE;
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