2 FreeRTOS.org V5.3.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS.org without being obliged to provide
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11 the source code for any proprietary components. Alternative commercial
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12 license and support terms are also available upon request. See the
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13 licensing section of http://www.FreeRTOS.org for full details.
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15 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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20 You should have received a copy of the GNU General Public License along
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21 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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22 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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53 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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55 * This file only supports UART 1
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58 /* Standard includes. */
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62 /* Scheduler includes. */
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63 #include "FreeRTOS.h"
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67 /* Demo application includes. */
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70 /* Constants required to setup the hardware. */
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71 #define serTX_AND_RX ( ( unsigned portCHAR ) 0x03 )
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73 /* Misc. constants. */
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74 #define serNO_BLOCK ( ( portTickType ) 0 )
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76 /* Enable the UART Tx interrupt. */
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77 #define vInterruptOn() IFG2 |= UTXIFG1
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79 /* The queue used to hold received characters. */
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80 static xQueueHandle xRxedChars;
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82 /* The queue used to hold characters waiting transmission. */
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83 static xQueueHandle xCharsForTx;
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85 static volatile portSHORT sTHREEmpty;
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87 /* Interrupt service routines. */
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88 interrupt (UART1RX_VECTOR) wakeup vRxISR( void );
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89 interrupt (UART1TX_VECTOR) wakeup vTxISR( void );
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91 /*-----------------------------------------------------------*/
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93 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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95 unsigned portLONG ulBaudRateCount;
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97 /* Initialise the hardware. */
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99 /* Generate the baud rate constants for the wanted baud rate. */
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100 ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud;
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102 portENTER_CRITICAL();
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104 /* Create the queues used by the com test task. */
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105 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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106 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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111 /* Set pin function. */
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112 P4SEL |= serTX_AND_RX;
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114 /* All other bits remain at zero for n, 8, 1 interrupt driven operation.
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116 U1CTL |= CHAR + LISTEN;
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119 /* Setup baud rate low byte. */
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120 U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
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122 /* Setup baud rate high byte. */
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123 ulBaudRateCount >>= 8UL;
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124 U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
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126 /* Enable ports. */
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127 ME2 |= UTXE1 + URXE1;
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132 /* Nothing in the buffer yet. */
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133 sTHREEmpty = pdTRUE;
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135 /* Enable interrupts. */
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136 IE2 |= URXIE1 + UTXIE1;
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138 portEXIT_CRITICAL();
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140 /* Unlike other ports, this serial code does not allow for more than one
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141 com port. We therefore don't return a pointer to a port structure and can
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142 instead just return NULL. */
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145 /*-----------------------------------------------------------*/
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147 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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149 /* Get the next character from the buffer. Return false if no characters
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150 are available, or arrive before xBlockTime expires. */
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151 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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160 /*-----------------------------------------------------------*/
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162 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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164 signed portBASE_TYPE xReturn;
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166 /* Transmit a character. */
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168 portENTER_CRITICAL();
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170 if( sTHREEmpty == pdTRUE )
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172 /* If sTHREEmpty is true then the UART Tx ISR has indicated that
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173 there are no characters queued to be transmitted - so we can
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174 write the character directly to the shift Tx register. */
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175 sTHREEmpty = pdFALSE;
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176 U1TXBUF = cOutChar;
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181 /* sTHREEmpty is false, so there are still characters waiting to be
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182 transmitted. We have to queue this character so it gets
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183 transmitted in turn. */
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185 /* Return false if after the block time there is no room on the Tx
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186 queue. It is ok to block inside a critical section as each task
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187 maintains it's own critical section status. */
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188 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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190 /* Depending on queue sizing and task prioritisation: While we
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191 were blocked waiting to post on the queue interrupts were not
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192 disabled. It is possible that the serial ISR has emptied the
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193 Tx queue, in which case we need to start the Tx off again
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194 writing directly to the Tx register. */
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195 if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) )
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197 /* Get back the character we just posted. */
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198 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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199 sTHREEmpty = pdFALSE;
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200 U1TXBUF = cOutChar;
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204 portEXIT_CRITICAL();
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208 /*-----------------------------------------------------------*/
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211 * UART RX interrupt service routine.
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213 interrupt (UART1RX_VECTOR) wakeup vRxISR( void )
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215 signed portCHAR cChar;
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216 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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218 /* Get the character from the UART and post it on the queue of Rxed
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222 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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224 if( xHigherPriorityTaskWoken )
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226 /*If the post causes a task to wake force a context switch
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227 as the woken task may have a higher priority than the task we have
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232 /*-----------------------------------------------------------*/
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235 * UART Tx interrupt service routine.
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237 interrupt (UART1TX_VECTOR) wakeup vTxISR( void )
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239 signed portCHAR cChar;
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240 portBASE_TYPE xTaskWoken = pdFALSE;
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242 /* The previous character has been transmitted. See if there are any
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243 further characters waiting transmission. */
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245 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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247 /* There was another character queued - transmit it now. */
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252 /* There were no other characters to transmit. */
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253 sTHREEmpty = pdTRUE;
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