1 //-----------------------------------------------------------------------------
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2 // ATMEL Microcontroller Software Support - ROUSSET -
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3 //-----------------------------------------------------------------------------
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4 // DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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5 // IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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6 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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7 // DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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8 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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9 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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10 // OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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11 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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12 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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13 // EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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14 //-----------------------------------------------------------------------------
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15 // File Name : Cstartup_SAM7.c
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16 // Object : Low level initialisations written in C for Tools
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17 // For AT91SAM7X256 with 2 flash plane
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18 // Creation : JPP 14-Sep-2006
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19 //-----------------------------------------------------------------------------
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23 // The following functions must be write in ARM mode this function called
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24 // directly by exception vector
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25 extern void AT91F_Spurious_handler(void);
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26 extern void AT91F_Default_IRQ_handler(void);
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27 extern void AT91F_Default_FIQ_handler(void);
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29 //*----------------------------------------------------------------------------
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30 //* \fn AT91F_LowLevelInit
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31 //* \brief This function performs very low level HW initialization
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32 //* this function can use a Stack, depending the compilation
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33 //* optimization mode
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34 //*----------------------------------------------------------------------------
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35 void AT91F_LowLevelInit(void) @ "ICODE"
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38 ///////////////////////////////////////////////////////////////////////////
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40 ///////////////////////////////////////////////////////////////////////////
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41 AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
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43 ///////////////////////////////////////////////////////////////////////////
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44 // Init PMC Step 1. Enable Main Oscillator
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45 // Main Oscillator startup time is board specific:
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46 // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
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47 // (0x40 for AT91C_CKGR_OSCOUNT field)
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48 ///////////////////////////////////////////////////////////////////////////
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49 AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
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50 // Wait Main Oscillator stabilization
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51 while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
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53 ///////////////////////////////////////////////////////////////////////////
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55 // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
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56 // PLL Startup time depends on PLL RC filter: worst case is choosen
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57 // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus
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58 // Specification (+/- 0.25% for full speed)
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59 ///////////////////////////////////////////////////////////////////////////
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60 AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 |
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62 (AT91C_CKGR_MUL & (72 << 16)) |
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63 (AT91C_CKGR_DIV & 14);
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64 // Wait for PLL stabilization
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65 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
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66 // Wait until the master clock is established for the case we already
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68 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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70 ///////////////////////////////////////////////////////////////////////////
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72 // Selection of Master Clock MCK equal to (Processor Clock PCK) PLL/2=48MHz
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73 // The PMC_MCKR register must not be programmed in a single write operation
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74 // (see. Product Errata Sheet)
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75 ///////////////////////////////////////////////////////////////////////////
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76 AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
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77 // Wait until the master clock is established
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78 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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80 AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
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81 // Wait until the master clock is established
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82 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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84 ///////////////////////////////////////////////////////////////////////////
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85 // Disable Watchdog (write once register)
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86 ///////////////////////////////////////////////////////////////////////////
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87 AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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89 ///////////////////////////////////////////////////////////////////////////
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90 // Init AIC: assign corresponding handler for each interrupt source
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91 ///////////////////////////////////////////////////////////////////////////
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92 AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
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93 for (i = 1; i < 31; i++) {
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94 AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
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96 AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;
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