2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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31 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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33 Note this driver is used to test the FreeRTOS port. It is NOT intended to
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34 be an example of an efficient implementation!
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37 /* Standard includes. */
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40 /* Scheduler includes. */
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41 #include "FreeRTOS.h"
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45 /* Demo application includes. */
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48 /*-----------------------------------------------------------*/
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50 /* Constants to setup and access the UART. */
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51 #define serDLAB ( ( unsigned char ) 0x80 )
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52 #define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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53 #define serNO_PARITY ( ( unsigned char ) 0x00 )
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54 #define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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55 #define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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56 #define serFIFO_ON ( ( unsigned char ) 0x01 )
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57 #define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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58 #define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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60 /* Constants to setup and access the VIC. */
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61 #define serU1VIC_CHANNEL ( ( unsigned long ) 0x0007 )
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62 #define serU1VIC_CHANNEL_BIT ( ( unsigned long ) 0x0080 )
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63 #define serU1VIC_ENABLE ( ( unsigned long ) 0x0020 )
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66 #define serINVALID_QUEUE ( ( QueueHandle_t ) 0 )
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67 #define serHANDLE ( ( xComPortHandle ) 1 )
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68 #define serNO_BLOCK ( ( TickType_t ) 0 )
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70 /* Constant to access the VIC. */
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71 #define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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73 /* Constants to determine the ISR source. */
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74 #define serSOURCE_THRE ( ( unsigned char ) 0x02 )
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75 #define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
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76 #define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
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77 #define serSOURCE_RX ( ( unsigned char ) 0x04 )
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78 #define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
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79 #define serINTERRUPT_IS_PENDING ( ( unsigned char ) 0x01 )
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81 /*-----------------------------------------------------------*/
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84 * The asm wrapper for the interrupt service routine.
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86 extern void vUART_ISREntry( void );
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89 * The C function called from the asm wrapper.
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91 void vUART_ISRHandler( void );
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93 /*-----------------------------------------------------------*/
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95 /* Queues used to hold received characters, and characters waiting to be
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97 static QueueHandle_t xRxedChars;
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98 static QueueHandle_t xCharsForTx;
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100 /* Communication flag between the interrupt service routine and serial API. */
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101 static volatile long lTHREEmpty;
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103 /*-----------------------------------------------------------*/
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105 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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107 unsigned long ulDivisor, ulWantedClock;
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108 xComPortHandle xReturn = serHANDLE;
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110 /* Create the queues used to hold Rx and Tx characters. */
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111 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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112 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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114 /* Initialise the THRE empty flag. */
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115 lTHREEmpty = pdTRUE;
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118 ( xRxedChars != serINVALID_QUEUE ) &&
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119 ( xCharsForTx != serINVALID_QUEUE ) &&
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120 ( ulWantedBaud != ( unsigned long ) 0 )
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123 portENTER_CRITICAL()
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125 /* Setup the baud rate: Calculate the divisor value. */
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126 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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127 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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129 /* Set the DLAB bit so we can access the divisor. */
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132 /* Setup the divisor. */
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133 U1DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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135 U1DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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137 /* Turn on the FIFO's and clear the buffers. */
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138 U1FCR = ( serFIFO_ON | serCLEAR_FIFO );
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140 /* Setup transmission format. */
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141 U1LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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143 /* Setup the VIC for the UART. */
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144 VICIntSelect &= ~( serU1VIC_CHANNEL_BIT );
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145 VICIntEnable |= serU1VIC_CHANNEL_BIT;
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146 VICVectAddr1 = ( unsigned long ) vUART_ISREntry;
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147 VICVectCntl1 = serU1VIC_CHANNEL | serU1VIC_ENABLE;
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149 /* Enable UART0 interrupts. */
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150 U1IER |= serENABLE_INTERRUPTS;
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152 portEXIT_CRITICAL();
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156 xReturn = ( xComPortHandle ) 0;
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161 /*-----------------------------------------------------------*/
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163 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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165 /* The port handle is not required as this driver only supports UART0. */
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168 /* Get the next character from the buffer. Return false if no characters
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169 are available, or arrive before xBlockTime expires. */
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170 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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179 /*-----------------------------------------------------------*/
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181 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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183 signed char *pxNext;
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185 /* NOTE: This implementation does not handle the queue being full as no
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186 block time is used! */
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188 /* The port handle is not required as this driver only supports UART0. */
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190 ( void ) usStringLength;
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192 /* Send each character in the string, one at a time. */
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193 pxNext = ( signed char * ) pcString;
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196 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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200 /*-----------------------------------------------------------*/
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202 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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204 signed portBASE_TYPE xReturn;
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206 /* The port handle is not required as this driver only supports UART0. */
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209 portENTER_CRITICAL();
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211 /* Is there space to write directly to the UART? */
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212 if( lTHREEmpty == ( long ) pdTRUE )
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214 /* We wrote the character directly to the UART, so was
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216 lTHREEmpty = pdFALSE;
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222 /* We cannot write directly to the UART, so queue the character.
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223 Block for a maximum of xBlockTime if there is no space in the
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224 queue. It is ok to block within a critical section as each
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225 task has it's own critical section management. */
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226 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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228 /* Depending on queue sizing and task prioritisation: While we
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229 were blocked waiting to post interrupts were not disabled. It is
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230 possible that the serial ISR has emptied the Tx queue, in which
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231 case we need to start the Tx off again. */
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232 if( lTHREEmpty == ( long ) pdTRUE )
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234 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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235 lTHREEmpty = pdFALSE;
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240 portEXIT_CRITICAL();
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244 /*-----------------------------------------------------------*/
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246 void vUART_ISRHandler( void )
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249 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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250 unsigned char ucInterrupt;
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252 ucInterrupt = U1IIR;
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254 /* The interrupt pending bit is active low. */
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255 while( ( ucInterrupt & serINTERRUPT_IS_PENDING ) == 0 )
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257 /* What caused the interrupt? */
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258 switch( ucInterrupt & serINTERRUPT_SOURCE_MASK )
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260 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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264 case serSOURCE_THRE : /* The THRE is empty. If there is another
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265 character in the Tx queue, send it now. */
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266 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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272 /* There are no further characters
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273 queued to send so we can indicate
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274 that the THRE is available. */
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275 lTHREEmpty = pdTRUE;
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279 case serSOURCE_RX_TIMEOUT :
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280 case serSOURCE_RX : /* A character was received. Place it in
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281 the queue of received characters. */
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283 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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286 default : /* There is nothing to do, leave the ISR. */
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290 ucInterrupt = U1IIR;
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293 /* Clear the ISR in the VIC. */
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294 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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296 /* Exit the ISR. If a task was woken by either a character being received
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297 or transmitted then a context switch will occur. */
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298 portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
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300 /*-----------------------------------------------------------*/
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