1 /******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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2 * File Name : 75x_map.h
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3 * Author : MCD Application Team
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4 * Date First Issued : 03/10/2006
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5 * Description : This file contains all the peripheral register's definitions
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6 * and memory mapping.
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7 ********************************************************************************
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11 ********************************************************************************
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12 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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14 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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15 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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16 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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17 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 *******************************************************************************/
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20 /* Define to prevent recursive inclusion -------------------------------------*/
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28 /* Includes ------------------------------------------------------------------*/
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29 #include "75x_conf.h"
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30 #include "75x_type.h"
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32 /* Exported types ------------------------------------------------------------*/
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33 /******************************************************************************/
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34 /* IP registers structures */
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35 /******************************************************************************/
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37 /*------------------------ Analog to Digital Converter -----------------------*/
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108 /*------------------------ Controller Area Network ---------------------------*/
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133 } CAN_MsgObj_TypeDef;
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151 CAN_MsgObj_TypeDef sMsgObj[2];
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171 /*--------------------------- Configuration Register -------------------------*/
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177 /*-------------------------------- DMA Controller ----------------------------*/
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204 } DMA_Stream_TypeDef;
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218 /*----------------------- Enhanced Interrupt Controller ----------------------*/
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236 /*------------------------- External Interrupt Controller --------------------*/
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245 /*-------------------------- General Purpose IO ports ------------------------*/
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259 } GPIOREMAP_TypeDef;
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261 /*--------------------------------- I2C interface ----------------------------*/
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282 /*---------------------------- Power, Reset and Clocks -----------------------*/
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296 /*-------------------------------- Real Time Clock ---------------------------*/
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321 /*---------------------------- Serial Memory Interface -----------------------*/
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331 /*--------------------------------- Timer Base -------------------------------*/
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356 /*------------------------------------ TIM -----------------------------------*/
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391 /*------------------------------------ PWM -----------------------------------*/
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428 /*----------------------- Synchronous Serial Peripheral ----------------------*/
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443 /*---------------- Universal Asynchronous Receiver Transmitter ---------------*/
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476 /*---------------------------------- WATCHDOG --------------------------------*/
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495 /*******************************************************************************
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496 * Peripherals' Base addresses
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497 *******************************************************************************/
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499 #define SRAM_BASE 0x40000000
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501 #define CONFIG_BASE 0x60000000
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503 #define SMIR_BASE 0x90000000
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505 #define PERIPH_BASE 0xFFFF0000
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507 #define CFG_BASE (CONFIG_BASE + 0x0010)
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508 #define MRCC_BASE (CONFIG_BASE + 0x0020)
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509 #define ADC_BASE (PERIPH_BASE + 0x8400)
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510 #define TB_BASE (PERIPH_BASE + 0x8800)
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511 #define TIM0_BASE (PERIPH_BASE + 0x8C00)
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512 #define TIM1_BASE (PERIPH_BASE + 0x9000)
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513 #define TIM2_BASE (PERIPH_BASE + 0x9400)
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514 #define PWM_BASE (PERIPH_BASE + 0x9800)
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515 #define WDG_BASE (PERIPH_BASE + 0xB000)
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516 #define SSP0_BASE (PERIPH_BASE + 0xB800)
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517 #define SSP1_BASE (PERIPH_BASE + 0xBC00)
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518 #define CAN_BASE (PERIPH_BASE + 0xC400)
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519 #define I2C_BASE (PERIPH_BASE + 0xCC00)
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520 #define UART0_BASE (PERIPH_BASE + 0xD400)
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521 #define UART1_BASE (PERIPH_BASE + 0xD800)
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522 #define UART2_BASE (PERIPH_BASE + 0xDC00)
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523 #define GPIO0_BASE (PERIPH_BASE + 0xE400)
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524 #define GPIOREMAP_BASE (PERIPH_BASE + 0xE420)
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525 #define GPIO1_BASE (PERIPH_BASE + 0xE440)
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526 #define GPIO2_BASE (PERIPH_BASE + 0xE480)
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527 #define DMA_BASE (PERIPH_BASE + 0xECF0)
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528 #define DMA_Stream0_BASE (PERIPH_BASE + 0xEC00)
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529 #define DMA_Stream1_BASE (PERIPH_BASE + 0xEC40)
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530 #define DMA_Stream2_BASE (PERIPH_BASE + 0xEC80)
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531 #define DMA_Stream3_BASE (PERIPH_BASE + 0xECC0)
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532 #define RTC_BASE (PERIPH_BASE + 0xF000)
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533 #define EXTIT_BASE (PERIPH_BASE + 0xF400)
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534 #define EIC_BASE (PERIPH_BASE + 0xF800)
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536 /*******************************************************************************
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538 *******************************************************************************/
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540 /*------------------- Non Debug Mode -----------------------------------------*/
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543 #define SMI ((SMI_TypeDef *) SMIR_BASE)
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544 #define CFG ((CFG_TypeDef *) CFG_BASE)
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545 #define MRCC ((MRCC_TypeDef *) MRCC_BASE)
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546 #define ADC ((ADC_TypeDef *) ADC_BASE)
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547 #define TB ((TB_TypeDef *) TB_BASE)
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548 #define TIM0 ((TIM_TypeDef *) TIM0_BASE)
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549 #define TIM1 ((TIM_TypeDef *) TIM1_BASE)
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550 #define TIM2 ((TIM_TypeDef *) TIM2_BASE)
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551 #define PWM ((PWM_TypeDef *) PWM_BASE)
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552 #define WDG ((WDG_TypeDef *) WDG_BASE)
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553 #define SSP0 ((SSP_TypeDef *) SSP0_BASE)
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554 #define SSP1 ((SSP_TypeDef *) SSP1_BASE)
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555 #define CAN ((CAN_TypeDef *) CAN_BASE)
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556 #define I2C ((I2C_TypeDef *) I2C_BASE)
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557 #define UART0 ((UART_TypeDef *) UART0_BASE)
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558 #define UART1 ((UART_TypeDef *) UART1_BASE)
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559 #define UART2 ((UART_TypeDef *) UART2_BASE)
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560 #define GPIO0 ((GPIO_TypeDef *) GPIO0_BASE)
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561 #define GPIOREMAP ((GPIOREMAP_TypeDef *) GPIOREMAP_BASE)
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562 #define GPIO1 ((GPIO_TypeDef *) GPIO1_BASE)
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563 #define GPIO2 ((GPIO_TypeDef *) GPIO2_BASE)
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564 #define DMA ((DMA_TypeDef *) DMA_BASE)
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565 #define DMA_Stream0 ((DMA_Stream_TypeDef *) DMA_Stream0_BASE)
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566 #define DMA_Stream1 ((DMA_Stream_TypeDef *) DMA_Stream1_BASE)
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567 #define DMA_Stream2 ((DMA_Stream_TypeDef *) DMA_Stream2_BASE)
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568 #define DMA_Stream3 ((DMA_Stream_TypeDef *) DMA_Stream3_BASE)
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569 #define RTC ((RTC_TypeDef *) RTC_BASE)
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570 #define EXTIT ((EXTIT_TypeDef *) EXTIT_BASE)
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571 #define EIC ((EIC_TypeDef *) EIC_BASE)
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574 EXT SMI_TypeDef *SMI;
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578 EXT CFG_TypeDef *CFG;
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582 EXT MRCC_TypeDef *MRCC;
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586 EXT ADC_TypeDef *ADC;
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590 EXT TB_TypeDef *TB;
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594 EXT TIM_TypeDef *TIM0;
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598 EXT TIM_TypeDef *TIM1;
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602 EXT TIM_TypeDef *TIM2;
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606 EXT PWM_TypeDef *PWM;
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610 EXT WDG_TypeDef *WDG;
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614 EXT SSP_TypeDef *SSP0;
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618 EXT SSP_TypeDef *SSP1;
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622 EXT CAN_TypeDef *CAN;
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626 EXT I2C_TypeDef *I2C;
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630 EXT UART_TypeDef *UART0;
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634 EXT UART_TypeDef *UART1;
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638 EXT UART_TypeDef *UART2;
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642 EXT GPIO_TypeDef *GPIO0;
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646 EXT GPIOREMAP_TypeDef *GPIOREMAP;
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647 #endif /*_GPIOREMAP */
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650 EXT GPIO_TypeDef *GPIO1;
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654 EXT GPIO_TypeDef *GPIO2;
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658 EXT DMA_TypeDef *DMA;
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661 #ifdef _DMA_Stream0
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662 EXT DMA_Stream_TypeDef *DMA_Stream0;
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663 #endif /*_DMA_Stream0 */
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665 #ifdef _DMA_Stream1
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666 EXT DMA_Stream_TypeDef *DMA_Stream1;
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667 #endif /*_DMA_Stream1 */
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669 #ifdef _DMA_Stream2
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670 EXT DMA_Stream_TypeDef *DMA_Stream2;
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671 #endif /*_DMA_Stream2 */
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673 #ifdef _DMA_Stream3
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674 EXT DMA_Stream_TypeDef *DMA_Stream3;
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675 #endif /*_DMA_Stream3 */
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678 EXT RTC_TypeDef *RTC;
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682 EXT EXTIT_TypeDef *EXTIT;
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686 EXT EIC_TypeDef *EIC;
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691 /* Exported constants --------------------------------------------------------*/
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692 /* Exported macro ------------------------------------------------------------*/
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693 /* Exported functions ------------------------------------------------------- */
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695 #endif /* __75x_MAP_H */
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697 /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
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