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31 ******************************************************************************/
32 /*****************************************************************************/
35 * @file xpseudo_asm_gcc.h
37 * This header file contains macros for using inline assembler code. It is
38 * written specifically for the GNU compiler.
41 * MODIFICATION HISTORY:
43 * Ver Who Date Changes
44 * ----- -------- -------- -----------------------------------------------
45 * 5.00 pkp 05/21/14 First release
46 * 6.0 mus 07/27/16 Consolidated file for a53,a9 and r5 processors
49 ******************************************************************************/
51 #ifndef XPSEUDO_ASM_GCC_H /* prevent circular inclusions */
52 #define XPSEUDO_ASM_GCC_H /* by using protection macros */
54 /***************************** Include Files ********************************/
56 #include "xil_types.h"
60 #endif /* __cplusplus */
62 /************************** Constant Definitions ****************************/
64 /**************************** Type Definitions ******************************/
66 /***************** Macros (Inline Functions) Definitions ********************/
68 /* necessary for pre-processor */
69 #define stringify(s) tostring(s)
70 #define tostring(s) #s
72 #if defined (__aarch64__)
73 /* pseudo assembler instructions */
74 #define mfcpsr() ({u32 rval = 0U; \
75 asm volatile("mrs %0, DAIF" : "=r" (rval));\
79 #define mtcpsr(v) __asm__ __volatile__ ("msr DAIF, %0" : : "r" (v))
81 #define cpsiei() //__asm__ __volatile__("cpsie i\n")
82 #define cpsidi() //__asm__ __volatile__("cpsid i\n")
84 #define cpsief() //__asm__ __volatile__("cpsie f\n")
85 #define cpsidf() //__asm__ __volatile__("cpsid f\n")
89 #define mtgpr(rn, v) /*__asm__ __volatile__(\
90 "mov r" stringify(rn) ", %0 \n"\
94 #define mfgpr(rn) /*({u32 rval; \
95 __asm__ __volatile__(\
96 "mov %0,r" stringify(rn) "\n"\
102 /* memory synchronization operations */
104 /* Instruction Synchronization Barrier */
105 #define isb() __asm__ __volatile__ ("isb sy")
107 /* Data Synchronization Barrier */
108 #define dsb() __asm__ __volatile__("dsb sy")
110 /* Data Memory Barrier */
111 #define dmb() __asm__ __volatile__("dmb sy")
114 /* Memory Operations */
115 #define ldr(adr) ({u64 rval; \
116 __asm__ __volatile__(\
118 : "=r" (rval) : "r" (adr)\
125 /* pseudo assembler instructions */
126 #define mfcpsr() ({u32 rval = 0U; \
127 __asm__ __volatile__(\
134 #define mtcpsr(v) __asm__ __volatile__(\
139 #define cpsiei() __asm__ __volatile__("cpsie i\n")
140 #define cpsidi() __asm__ __volatile__("cpsid i\n")
142 #define cpsief() __asm__ __volatile__("cpsie f\n")
143 #define cpsidf() __asm__ __volatile__("cpsid f\n")
147 #define mtgpr(rn, v) __asm__ __volatile__(\
148 "mov r" stringify(rn) ", %0 \n"\
152 #define mfgpr(rn) ({u32 rval; \
153 __asm__ __volatile__(\
154 "mov %0,r" stringify(rn) "\n"\
160 /* memory synchronization operations */
162 /* Instruction Synchronization Barrier */
163 #define isb() __asm__ __volatile__ ("isb" : : : "memory")
165 /* Data Synchronization Barrier */
166 #define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
168 /* Data Memory Barrier */
169 #define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
172 /* Memory Operations */
173 #define ldr(adr) ({u32 rval; \
174 __asm__ __volatile__(\
176 : "=r" (rval) : "r" (adr)\
183 #define ldrb(adr) ({u8 rval; \
184 __asm__ __volatile__(\
186 : "=r" (rval) : "r" (adr)\
191 #define str(adr, val) __asm__ __volatile__(\
193 : : "r" (val), "r" (adr)\
196 #define strb(adr, val) __asm__ __volatile__(\
198 : : "r" (val), "r" (adr)\
201 /* Count leading zeroes (clz) */
202 #define clz(arg) ({u8 rval; \
203 __asm__ __volatile__(\
205 : "=r" (rval) : "r" (arg)\
210 #if defined (__aarch64__)
211 #define mtcpdc(reg,val) __asm__ __volatile__("dc " #reg ",%0" : : "r" (val))
212 #define mtcpic(reg,val) __asm__ __volatile__("ic " #reg ",%0" : : "r" (val))
214 #define mtcpicall(reg) __asm__ __volatile__("ic " #reg)
215 #define mtcptlbi(reg) __asm__ __volatile__("tlbi " #reg)
216 #define mtcpat(reg,val) __asm__ __volatile__("at " #reg ",%0" : : "r" (val))
217 /* CP15 operations */
218 #define mfcp(reg) ({u64 rval = 0U;\
219 __asm__ __volatile__("mrs %0, " #reg : "=r" (rval));\
223 #define mtcp(reg,val) __asm__ __volatile__("msr " #reg ",%0" : : "r" (val))
226 /* CP15 operations */
227 #define mtcp(rn, v) __asm__ __volatile__(\
232 #define mfcp(rn) ({u32 rval = 0U; \
233 __asm__ __volatile__(\
241 /************************** Variable Definitions ****************************/
243 /************************** Function Prototypes *****************************/
247 #endif /* __cplusplus */
249 #endif /* XPSEUDO_ASM_GCC_H */