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31 ******************************************************************************/
32 /*****************************************************************************/
36 * @addtogroup zdma_v1_5
39 * This file contains the implementation of the interface functions for ZDMA
40 * driver. Refer to the header file xzdma.h for more detailed information.
43 * MODIFICATION HISTORY:
45 * Ver Who Date Changes
46 * ----- ------ -------- ------------------------------------------------------
47 * 1.0 vns 2/27/15 First release
48 * vns 16/10/15 Corrected Destination descriptor addresss calculation
49 * in XZDma_CreateBDList API
50 * 1.1 vns 05/11/15 Modified XZDma_SetMode to return XST_FAILURE on
51 * selecting DMA mode other than normal mode in
52 * scatter gather mode data transfer and corrected
53 * XZDma_SetChDataConfig API to set over fetch and
54 * src issue parameters correctly.
55 * 1.3 mus 08/14/17 Add CCI support for A53 in EL1 NS
58 ******************************************************************************/
60 /***************************** Include Files *********************************/
64 /************************** Function Prototypes ******************************/
66 static void StubCallBack(void *CallBackRef, u32 Mask);
67 static void StubDoneCallBack(void *CallBackRef);
68 static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data);
69 static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
71 static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
72 XZDma_LiDscr *SrcDscrPtr,XZDma_LiDscr *DstDscrPtr, u8 IsLast);
73 static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
75 static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
76 XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast);
77 static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
78 u32 CtrlValue, u64 NextDscrAddr);
79 static void XZDma_Enable(XZDma *InstancePtr);
80 static void XZDma_GetConfigurations(XZDma *InstancePtr);
82 /************************** Function Definitions *****************************/
84 /*****************************************************************************/
87 * This function initializes an ZDMA core. This function must be called
88 * prior to using an ZDMA core. Initialization of an ZDMA includes setting
89 * up the instance data and ensuring the hardware is in a quiescent state and
90 * resets all the hardware configurations.
92 * @param InstancePtr is a pointer to the XZDma instance.
93 * @param CfgPtr is a reference to a structure containing information
94 * about a specific XZDma instance.
95 * @param EffectiveAddr is the device base address in the virtual memory
96 * address space. The caller is responsible for keeping the
97 * address mapping from EffectiveAddr to the device physical
98 * base address unchanged once this function is invoked.
99 * Unexpected errors may occur if the address mapping changes
100 * after this function is called. If address translation is not
101 * used, pass in the physical address instead.
104 * - XST_SUCCESS if initialization was successful.
108 ******************************************************************************/
109 s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
113 /* Verify arguments. */
114 Xil_AssertNonvoid(InstancePtr != NULL);
115 Xil_AssertNonvoid(CfgPtr != NULL);
116 Xil_AssertNonvoid(EffectiveAddr != ((u32)0x00));
118 InstancePtr->Config.BaseAddress = CfgPtr->BaseAddress;
119 InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
120 InstancePtr->Config.DmaType = CfgPtr->DmaType;
121 InstancePtr->Config.IsCacheCoherent = CfgPtr->IsCacheCoherent;
123 InstancePtr->Config.BaseAddress = EffectiveAddr;
125 InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY);
127 InstancePtr->IsSgDma = FALSE;
128 InstancePtr->Mode = XZDMA_NORMAL_MODE;
129 InstancePtr->IntrMask = 0x00U;
130 InstancePtr->ChannelState = XZDMA_IDLE;
133 * Set all handlers to stub values, let user configure this
136 InstancePtr->DoneHandler =
137 (XZDma_DoneHandler)((void *)StubDoneCallBack);
138 InstancePtr->ErrorHandler =
139 (XZDma_ErrorHandler)((void *)StubCallBack);
141 XZDma_Reset(InstancePtr);
142 XZDma_GetConfigurations(InstancePtr);
144 return (XST_SUCCESS);
148 /*****************************************************************************/
151 * This function sets the pointer type and mode in which ZDMA needs to transfer
154 * @param InstancePtr is a pointer to the XZDma instance.
155 * @param IsSgDma is a variable which specifies whether transfer has to
156 * to be done in scatter gather mode or simple mode.
157 * - TRUE - Scatter gather pointer type
158 * - FALSE - Simple pointer type
159 * @param Mode is the type of the mode in which data has to be initiated
160 * - XZDMA_NORMAL_MODE - Normal data transfer from source to
161 * destination (Valid for both Scatter
162 * gather and simple types)
163 * - XZDMA_WRONLY_MODE - Write only mode (Valid only for Simple)
164 * - XZDMA_RDONLY_MODE - Read only mode (Valid only for Simple)
167 * - XST_SUCCESS - If mode has been set successfully.
168 * - XST_FAILURE - If mode has not been set.
170 * @note Mode cannot be changed while ZDMA is not in IDLE state.
172 ******************************************************************************/
173 s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode)
178 /* Verify arguments. */
179 Xil_AssertNonvoid(InstancePtr != NULL);
180 Xil_AssertNonvoid((IsSgDma == TRUE) || (IsSgDma == FALSE));
181 Xil_AssertNonvoid(Mode <= XZDMA_RDONLY_MODE);
183 if (InstancePtr->ChannelState != XZDMA_IDLE) {
184 Status = XST_FAILURE;
188 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
189 XZDMA_CH_CTRL0_OFFSET);
191 if (IsSgDma != TRUE) {
192 Data = (Data & (~XZDMA_CTRL0_POINT_TYPE_MASK));
193 if (Mode == XZDMA_NORMAL_MODE) {
194 Data &= (~XZDMA_CTRL0_MODE_MASK);
196 else if (Mode == XZDMA_WRONLY_MODE) {
197 Data |= XZDMA_CTRL0_WRONLY_MASK;
200 Data |= XZDMA_CTRL0_RDONLY_MASK;
202 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
203 XZDMA_CH_CTRL0_OFFSET, Data);
204 InstancePtr->IsSgDma = FALSE;
205 InstancePtr->Mode = Mode;
209 if (Mode != XZDMA_NORMAL_MODE) {
210 Status = XST_FAILURE;
214 Data |= (XZDMA_CTRL0_POINT_TYPE_MASK);
215 Data &= ~(XZDMA_CTRL0_MODE_MASK);
216 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
217 XZDMA_CH_CTRL0_OFFSET, Data);
219 InstancePtr->IsSgDma = TRUE;
220 InstancePtr->Mode = Mode;
223 Status = XST_SUCCESS;
231 /*****************************************************************************/
234 * This function sets the descriptor type and descriptor pointer's start address
235 * of both source and destination based on the memory allocated by user and also
236 * calculates no of descriptors(BDs) can be created in the allocated memory.
238 * @param InstancePtr is a pointer to the XZDma instance.
239 * @param TypeOfDscr is a variable which specifies descriptor type
240 * whether Linear or linked list type of descriptor.
241 * - XZDMA_LINEAR - Linear type of descriptor.
242 * - XZDMA_LINKEDLIST- Linked list type of descriptor.
243 * @param Dscr_MemPtr is a pointer to the allocated memory for creating
244 * descriptors. It Should be aligned to 64 bytes.
246 * @param NoOfBytes specifies the number of bytes allocated for
249 * @return The Count of the descriptors can be created.
251 * @note User should allocate the memory for descriptors which should
252 * be capable of how many transfers he wish to do in one start.
253 * For Linear mode each descriptor needs 128 bit memory so for
254 * one data transfer it requires 2*128 = 256 bits i.e. 32 bytes
255 * Similarly for Linked list mode for each descriptor it needs
256 * 256 bit, so for one data transfer it require 2*256 = 512 bits
259 ******************************************************************************/
260 u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
261 UINTPTR Dscr_MemPtr, u32 NoOfBytes)
265 /* Verify arguments. */
266 Xil_AssertNonvoid(InstancePtr != NULL);
267 Xil_AssertNonvoid((TypeOfDscr == XZDMA_LINEAR) ||
268 (TypeOfDscr == XZDMA_LINKEDLIST));
269 Xil_AssertNonvoid(Dscr_MemPtr != 0x00);
270 Xil_AssertNonvoid(NoOfBytes != 0x00U);
272 InstancePtr->Descriptor.DscrType = TypeOfDscr;
274 if (TypeOfDscr == XZDMA_LINEAR) {
275 Size = sizeof(XZDma_LiDscr);
278 Size = sizeof(XZDma_LlDscr);
280 InstancePtr->Descriptor.DscrCount =
281 (NoOfBytes >> 1) / Size;
282 InstancePtr->Descriptor.SrcDscrPtr = (void *)Dscr_MemPtr;
283 InstancePtr->Descriptor.DstDscrPtr =
284 (void *)(Dscr_MemPtr + (Size * InstancePtr->Descriptor.DscrCount));
286 if (!InstancePtr->Config.IsCacheCoherent)
287 Xil_DCacheInvalidateRange((INTPTR)Dscr_MemPtr, NoOfBytes);
289 return (InstancePtr->Descriptor.DscrCount);
292 /*****************************************************************************/
295 * This function sets the data attributes and control configurations of a
296 * ZDMA core based on the inputs provided.
298 * @param InstancePtr is a pointer to the XZDma instance.
299 * @param Configure is a pointer to the XZDma_ChDataConfig structure
300 * which has all the configuration fields.
301 * The fields of the structure are:
302 * - OverFetch - Allows over fetch or not
303 * - 0 - Not allowed to over-fetch on SRC
304 * - 1 - Allowed to over-fetch on SRC
305 * - SrcIssue - Outstanding transaction on SRC
307 * - SrcBurstType - Burst Type for SRC AXI transaction
308 * - XZDMA_FIXED_BURST - Fixed burst
309 * - XZDMA_INCR_BURST - Incremental burst
310 * - SrcBurstLen - AXI Length for Data Read.
311 * - Range of values is (1,2,4,8,16).
312 * - DstBurstType - Burst Type for SRC AXI transaction
313 * - XZDMA_FIXED_BURST - Fixed burst
314 * - XZDMA_INCR_BURST - Incremental burst
315 * - DstBurstLen - AXI Length for Data write.
316 * - Range of values is (1,2,4,8,16).
317 * - SrcCache - AXI cache bits for Data read
318 * - SrcQos - Configurable QoS bits for AXI Data read
319 * - DstCache - AXI cache bits for Data write
320 * - DstQos - configurable QoS bits for AXI Data write
323 * - XST_FAILURE If ZDMA Core is not in Idle state and
324 * - XST_SUCCESS If Configurations are made successfully
327 * - These configurations will last till we modify or Reset
328 * by XZDma_Reset(XZDma *InstancePtr).
329 * - Configurations should be modified only when ZDMA channel
330 * is IDLE this can be confirmed by using
331 * XZDma_ChannelState(XZDma *InstancePtr) API.
333 ******************************************************************************/
334 s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
339 /* Verify arguments */
340 Xil_AssertNonvoid(InstancePtr != NULL);
341 Xil_AssertNonvoid(Configure != NULL);
343 if (InstancePtr->ChannelState != XZDMA_IDLE) {
344 Status = XST_FAILURE;
347 InstancePtr->DataConfig.DstBurstType = Configure->DstBurstType;
348 InstancePtr->DataConfig.DstBurstLen = Configure->DstBurstLen;
349 InstancePtr->DataConfig.SrcBurstType = Configure->SrcBurstType;
350 InstancePtr->DataConfig.SrcBurstLen = Configure->SrcBurstLen;
351 InstancePtr->DataConfig.OverFetch = Configure->OverFetch;
352 InstancePtr->DataConfig.SrcIssue = Configure->SrcIssue;
353 InstancePtr->DataConfig.SrcCache = Configure->SrcCache;
354 InstancePtr->DataConfig.SrcQos = Configure->SrcQos;
355 InstancePtr->DataConfig.DstCache = Configure->DstCache;
356 InstancePtr->DataConfig.DstQos = Configure->DstQos;
358 /* Setting over fetch */
359 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
360 XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_OVR_FETCH_MASK);
362 Data |= (((u32)(Configure->OverFetch) <<
363 XZDMA_CTRL0_OVR_FETCH_SHIFT) &
364 XZDMA_CTRL0_OVR_FETCH_MASK);
366 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
367 XZDMA_CH_CTRL0_OFFSET, Data);
369 /* Setting source issue */
370 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
371 XZDMA_CH_CTRL1_OFFSET) & (~XZDMA_CTRL1_SRC_ISSUE_MASK);
372 Data |= (u32)(Configure->SrcIssue & XZDMA_CTRL1_SRC_ISSUE_MASK);
374 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
375 XZDMA_CH_CTRL1_OFFSET, Data);
377 /* Setting Burst length and burst type */
378 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
379 XZDMA_CH_DATA_ATTR_OFFSET);
380 Data = (Data & (~(XZDMA_DATA_ATTR_ARBURST_MASK |
381 XZDMA_DATA_ATTR_ARLEN_MASK |
382 XZDMA_DATA_ATTR_AWBURST_MASK |
383 XZDMA_DATA_ATTR_AWLEN_MASK |
384 XZDMA_DATA_ATTR_ARCACHE_MASK |
385 XZDMA_DATA_ATTR_AWCACHE_MASK |
386 XZDMA_DATA_ATTR_AWQOS_MASK |
387 XZDMA_DATA_ATTR_ARQOS_MASK)));
389 Data |= ((((u32)(Configure->SrcBurstType) <<
390 XZDMA_DATA_ATTR_ARBURST_SHIFT) &
391 XZDMA_DATA_ATTR_ARBURST_MASK) |
392 (((u32)(Configure->SrcCache) <<
393 XZDMA_DATA_ATTR_ARCACHE_SHIFT) &
394 XZDMA_DATA_ATTR_ARCACHE_MASK) |
395 (((u32)(Configure->SrcQos) <<
396 XZDMA_DATA_ATTR_ARQOS_SHIFT) &
397 XZDMA_DATA_ATTR_ARQOS_MASK) |
398 (((u32)(Configure->SrcBurstLen) <<
399 XZDMA_DATA_ATTR_ARLEN_SHIFT) &
400 XZDMA_DATA_ATTR_ARLEN_MASK) |
401 (((u32)(Configure->DstBurstType) <<
402 XZDMA_DATA_ATTR_AWBURST_SHIFT) &
403 XZDMA_DATA_ATTR_AWBURST_MASK) |
404 (((u32)(Configure->DstCache) <<
405 XZDMA_DATA_ATTR_AWCACHE_SHIFT) &
406 XZDMA_DATA_ATTR_AWCACHE_MASK) |
407 (((u32)(Configure->DstQos) <<
408 XZDMA_DATA_ATTR_AWQOS_SHIFT) &
409 XZDMA_DATA_ATTR_AWQOS_MASK) |
410 (((u32)(Configure->DstBurstLen)) &
411 XZDMA_DATA_ATTR_AWLEN_MASK));
413 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
414 XZDMA_CH_DATA_ATTR_OFFSET, Data);
415 Status = XST_SUCCESS;
422 /*****************************************************************************/
425 * This function gets the data attributes and control configurations of a
428 * @param InstancePtr is a pointer to the XZDma instance.
429 * @param Configure is a pointer to the XZDma_ChDataConfig structure
430 * which has all the configuration fields.
431 * The fields of the structure are:
432 * - OverFetch - Allows over fetch or not
433 * - 0 - Not allowed to over-fetch on SRC
434 * - 1 - Allowed to over-fetch on SRC
435 * - SrcIssue - Outstanding transaction on SRC
437 * - SrcBurstType - Burst Type for SRC AXI transaction
438 * - XZDMA_FIXED_BURST - Fixed burst
439 * - XZDMA_INCR_BURST - Incremental burst
440 * - SrcBurstLen - AXI Length for Data Read.
441 * - Can be max of 16 to be compatible with AXI3
442 * - DstBurstType - Burst Type for SRC AXI transaction
443 * - XZDMA_FIXED_BURST - Fixed burst
444 * - XZDMA_INCR_BURST - Incremental burst
445 * - DstBurstLen - AXI Length for Data write.
446 * - Can be max of 16 to be compatible with AXI3
447 * - SrcCache - AXI cache bits for Data read
448 * - SrcQos - Configurable QoS bits for AXI Data read
449 * - DstCache - AXI cache bits for Data write
450 * - DstQos - Configurable QoS bits for AXI Data write
456 ******************************************************************************/
457 void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
460 /* Verify arguments */
461 Xil_AssertVoid(InstancePtr != NULL);
462 Xil_AssertVoid(Configure != NULL);
464 Configure->SrcBurstType = InstancePtr->DataConfig.SrcBurstType;
465 Configure->SrcCache = InstancePtr->DataConfig.SrcCache;
466 Configure->SrcQos = InstancePtr->DataConfig.SrcQos;
467 Configure->SrcBurstLen = InstancePtr->DataConfig.SrcBurstLen;
469 Configure->DstBurstType = InstancePtr->DataConfig.DstBurstType;
470 Configure->DstCache = InstancePtr->DataConfig.DstCache;
471 Configure->DstQos = InstancePtr->DataConfig.DstQos;
472 Configure->DstBurstLen = InstancePtr->DataConfig.DstBurstLen;
474 Configure->OverFetch = InstancePtr->DataConfig.OverFetch;
475 Configure->SrcIssue = InstancePtr->DataConfig.SrcIssue;
479 /*****************************************************************************/
482 * This function sets the descriptor attributes based on the inputs provided
485 * @param InstancePtr is a pointer to the XZDma instance.
486 * @param Configure is a pointer to the XZDma_ChDscrConfig structure
487 * which has all the configuration fields.
488 * The fields of the structure are:
489 * - AxCoherent - AXI transactions generated for the descriptor.
492 * - AXCache - AXI cache bit used for DSCR fetch
493 * (both on SRC and DST Side)
494 * - AXQos - QoS bit used for DSCR fetch
495 * (both on SRC and DST Side)
498 * - XST_FAILURE If ZDMA core is not in Idle state and
499 * - XST_SUCCESS If Configurations are made successfully
503 ******************************************************************************/
504 s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
509 /* Verify arguments */
510 Xil_AssertNonvoid(InstancePtr != NULL);
511 Xil_AssertNonvoid(Configure != NULL);
513 if (InstancePtr->ChannelState != XZDMA_IDLE) {
514 Status = XST_FAILURE;
518 InstancePtr->DscrConfig.AXCache = Configure->AXCache;
519 InstancePtr->DscrConfig.AXQos = Configure->AXQos;
520 InstancePtr->DscrConfig.AxCoherent = Configure->AxCoherent;
522 Data = ((((u32)(Configure->AxCoherent) <<
523 XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT) &
524 XZDMA_DSCR_ATTR_AXCOHRNT_MASK) |
525 (((u32)(Configure->AXCache) <<
526 XZDMA_DSCR_ATTR_AXCACHE_SHIFT) &
527 XZDMA_DSCR_ATTR_AXCACHE_MASK) |
528 (((u32)Configure->AXQos) &
529 XZDMA_DSCR_ATTR_AXQOS_MASK));
531 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
532 XZDMA_CH_DSCR_ATTR_OFFSET, Data);
534 Status = XST_SUCCESS;
540 /*****************************************************************************/
543 * This function gets the descriptor attributes of the channel.
545 * @param InstancePtr is a pointer to the XZDma instance.
546 * @param Configure is a pointer to the XZDma_ChDscrConfig structure
547 * which has all the configuration fields.
548 * The fields of the structure are:
549 * - AxCoherent - AXI transactions generated for the descriptor.
552 * - AXCache - AXI cache bit used for DSCR fetch
553 * (both on SRC and DST Side)
554 * - AXQos - QoS bit used for DSCR fetch
555 * (both on SRC and DST Side)
561 ******************************************************************************/
562 void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
565 /* Verify arguments */
566 Xil_AssertVoid(InstancePtr != NULL);
567 Xil_AssertVoid(Configure != NULL);
569 Configure->AXCache = InstancePtr->DscrConfig.AXCache;
570 Configure->AXQos = InstancePtr->DscrConfig.AXQos;
571 Configure->AxCoherent = InstancePtr->DscrConfig.AxCoherent;
575 /*****************************************************************************/
578 * This function preloads the buffers which will be used in write only mode.
579 * In write only mode the data in the provided buffer will be written in
580 * destination address for specified size.
582 * @param InstancePtr is a pointer to the XZDma instance.
583 * @param Buffer is a pointer to an array of 64/128 bit data.
584 * i.e. pointer to 32 bit array of size 2/4
585 * - Array of Size 2 for ADMA
586 * - Array of Size 4 for GDMA
590 * @note Valid only in simple mode.
591 * Prior to call this function ZDMA instance should be set in
592 * Write only mode by using
593 * XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma,
595 * To initiate data transfer after this API need to call
596 * XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
597 * In which only destination fields has to be filled.
599 ******************************************************************************/
600 void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer)
602 u32 *LocBuf = Buffer;
604 /* Verify arguments */
605 Xil_AssertVoid(InstancePtr != NULL);
606 Xil_AssertVoid(Buffer != NULL);
608 if (InstancePtr->Config.DmaType == (u8)0) {
609 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
610 XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
612 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
613 XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
615 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
616 XZDMA_CH_WR_ONLY_WORD2_OFFSET, *LocBuf);
618 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
619 XZDMA_CH_WR_ONLY_WORD3_OFFSET, *LocBuf);
623 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
624 XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
626 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
627 XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
632 /*****************************************************************************/
635 * This function resume the paused state of ZDMA core and starts the transfer
636 * from where it has paused.
638 * @param InstancePtr is a pointer to the XZDma instance.
642 * @note Valid only for scatter gather mode.
644 ******************************************************************************/
645 void XZDma_Resume(XZDma *InstancePtr)
649 /* Verify arguments */
650 Xil_AssertVoid(InstancePtr != NULL);
651 Xil_AssertVoid(InstancePtr->IsSgDma == TRUE);
652 Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_PAUSE);
654 Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
655 XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_CONT_ADDR_MASK);
656 Value |= XZDMA_CTRL0_CONT_MASK;
657 InstancePtr->ChannelState = XZDMA_BUSY;
658 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
659 XZDMA_CH_CTRL0_OFFSET, Value);
662 /*****************************************************************************/
665 * This function resets the ZDMA core.
667 * @param InstancePtr is a pointer to the XZDma instance.
671 * @note This function resets all the configurations made previously.
672 * Disables all the interrupts and clears interrupt status.
674 *****************************************************************************/
675 void XZDma_Reset(XZDma *InstancePtr)
678 /* Verify arguments */
679 Xil_AssertVoid(InstancePtr != NULL);
680 Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_IDLE);
682 /* Disable's the channel */
683 XZDma_DisableCh(InstancePtr);
685 /* Disables all interrupts */
686 XZDma_DisableIntr(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
687 XZDma_IntrClear(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
688 InstancePtr->IntrMask = 0x00U;
690 /* All configurations are being reset */
691 XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL0_OFFSET,
692 XZDMA_CTRL0_RESET_VALUE);
693 XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL1_OFFSET,
694 XZDMA_CTRL1_RESET_VALUE);
695 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
696 XZDMA_CH_DATA_ATTR_OFFSET, XZDMA_DATA_ATTR_RESET_VALUE);
697 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
698 XZDMA_CH_DSCR_ATTR_OFFSET, XZDMA_DSCR_ATTR_RESET_VALUE);
700 /* Clears total byte */
701 XZDma_TotalByteClear(InstancePtr);
703 /* Clears interrupt count of both source and destination channels */
704 (void)XZDma_GetSrcIntrCnt(InstancePtr);
705 (void)XZDma_GetDstIntrCnt(InstancePtr);
707 if (InstancePtr->Config.IsCacheCoherent) {
708 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
709 XZDMA_CH_DSCR_ATTR_OFFSET,
710 InstancePtr->Config.IsCacheCoherent << XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT);
711 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
712 XZDMA_CH_SRC_DSCR_WORD3_OFFSET,
713 InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
714 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
715 XZDMA_CH_DST_DSCR_WORD3_OFFSET,
716 InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
718 InstancePtr->ChannelState = XZDMA_IDLE;
722 /*****************************************************************************/
725 * This function returns the state of ZDMA core.
727 * @param InstancePtr is a pointer to the XZDma instance.
729 * @return This function returns state of ZDMA core
730 * - XZDMA_IDLE - If ZDMA core is in idle state.
731 * - XZDMA_PAUSE - If ZDMA is in paused state.
732 * - XZDMA_BUSY - If ZDMA is in busy state.
735 * XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
737 ******************************************************************************/
738 XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
743 /* Verify arguments */
744 Xil_AssertNonvoid(InstancePtr != NULL);
746 Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
747 (XZDMA_CH_STS_OFFSET)) & (XZDMA_STS_ALL_MASK);
749 if ((Value == XZDMA_STS_DONE_MASK) ||
750 (Value == XZDMA_STS_DONE_ERR_MASK)) {
753 else if (Value == XZDMA_STS_PAUSE_MASK) {
754 Status = XZDMA_PAUSE;
764 /*****************************************************************************/
767 * This function sets all the required fields for initiating data transfer. Data
768 * transfer elements needs to be passed through structure pointer.
769 * Data transfer can be done in any of the three modes (simple, Linear or Linked
770 * List) based on the selected mode but before calling this API make sure that
771 * ZDMA is in Idle state.
773 * @param InstancePtr is a pointer to the XZDma instance.
774 * @param Data is a pointer of array to the XZDma_Transfer structure which
775 * has all the configuration fields for initiating data transfer.
776 * The fields of the structure are:
777 * - SrcAddr - Source address
778 * - DstAddr - Destination address
779 * - Size - size of the data to be transferred in bytes
780 * - SrcCoherent - AXI transactions generated to process the
781 * descriptor payload for source channel
784 * - DstCoherent - AXI transactions generated to process the
785 * descriptor payload for destination channel
788 * - Pause - Valid only for scatter gather mode.
789 * Will pause after completion of this descriptor.
790 * @param Num specifies number of array elements of Data pointer.
791 * - For simple mode Num should be equal to 1
792 * - For Scatter gather mode (either linear or linked list) Num
793 * can be any choice. (But based on which memory should be
794 * allocated by Application) It should be less than the return
795 * value of XZDma_CreateBDList.
798 * - XST_SUCCESS - if ZDMA initiated the transfer.
799 * - XST_FAILURE - if ZDMA has not initiated data transfer.
801 * @note After Pause to resume the transfer need to use the following
804 * User should provide allocated memory and descriptor type in
805 * scatter gather mode through the following API before calling
807 * - XZDma_SetDescriptorType(XZDma *InstancePtr,
808 * XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr,
811 ******************************************************************************/
812 s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
816 /* Verify arguments */
817 Xil_AssertNonvoid(InstancePtr != NULL);
818 Xil_AssertNonvoid(Data != NULL);
819 Xil_AssertNonvoid(Num != 0x00U);
821 if ((InstancePtr->ChannelState == XZDMA_BUSY) &&
822 (Num >= InstancePtr->Descriptor.DscrCount)) {
823 Status = XST_FAILURE;
826 if (InstancePtr->IsSgDma != TRUE) {
827 XZDma_SimpleMode(InstancePtr, Data);
828 Status = XST_SUCCESS;
832 XZDma_ScatterGather(InstancePtr, Data, Num);
833 Status = XST_SUCCESS;
836 XZDma_Enable(InstancePtr);
842 /*****************************************************************************/
845 * This static function sets all the required fields for initiating data
846 * transfer in simple mode.
848 * @param InstancePtr is a pointer to the XZDma instance.
849 * @param Data is a pointer of array to the XZDma_Transfer structure
850 * which has all the configuration fields for initiating data
857 ******************************************************************************/
858 static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data)
863 /* Verify arguments */
864 Xil_AssertVoid(InstancePtr != NULL);
865 Xil_AssertVoid(Data != NULL);
867 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
868 XZDMA_CH_SRC_DSCR_WORD0_OFFSET,
869 (Data->SrcAddr & XZDMA_WORD0_LSB_MASK));
870 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
871 XZDMA_CH_SRC_DSCR_WORD1_OFFSET,
872 (((u64)Data->SrcAddr >> XZDMA_WORD1_MSB_SHIFT) &
873 XZDMA_WORD1_MSB_MASK));
875 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
876 XZDMA_CH_DST_DSCR_WORD0_OFFSET,
877 (Data->DstAddr & XZDMA_WORD0_LSB_MASK));
878 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
879 XZDMA_CH_DST_DSCR_WORD1_OFFSET,
880 (((u64)Data->DstAddr >> XZDMA_WORD1_MSB_SHIFT) &
881 XZDMA_WORD1_MSB_MASK));
883 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
884 XZDMA_CH_SRC_DSCR_WORD2_OFFSET,
885 (Data->Size & XZDMA_WORD2_SIZE_MASK));
886 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
887 XZDMA_CH_DST_DSCR_WORD2_OFFSET,
888 (Data->Size & XZDMA_WORD2_SIZE_MASK));
890 Value = (u32)(Data->SrcCoherent & XZDMA_WORD3_COHRNT_MASK);
891 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
892 XZDMA_CH_SRC_DSCR_WORD3_OFFSET, Value);
894 Value = (u32)(Data->DstCoherent & XZDMA_WORD3_COHRNT_MASK);
895 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
896 XZDMA_CH_DST_DSCR_WORD3_OFFSET, Value);
900 /*****************************************************************************/
903 * This static function sets all the required fields for initiating data
904 * transfer in scatter gather mode.
906 * @param InstancePtr is a pointer to the XZDma instance.
907 * @param Data is a pointer of array to the XZDma_Transfer structure
908 * which has all the configuration fields for initiating data
910 * @param Num specifies number of array elements of Data pointer.
916 ******************************************************************************/
917 static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
922 XZDma_Transfer *LocalData = Data;
923 XZDma_LiDscr *LiSrcDscr =
924 (XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
925 XZDma_LiDscr *LiDstDscr =
926 (XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
927 XZDma_LlDscr *LlSrcDscr =
928 (XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
929 XZDma_LlDscr *LlDstDscr =
930 (XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
932 /* Verify arguments */
933 Xil_AssertVoid(InstancePtr != NULL);
934 Xil_AssertVoid(Data != NULL);
935 Xil_AssertVoid(Num != 0x00U);
937 if (InstancePtr->Descriptor.DscrType == XZDMA_LINEAR) {
940 if (Count == (Num- 1)) {
943 XZDma_LinearMode(InstancePtr, LocalData, LiSrcDscr,
949 } while(Count < Num);
954 if (Count == (Num - 1)) {
957 XZDma_LinkedListMode(InstancePtr, LocalData, LlSrcDscr,
963 } while(Count < Num);
966 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
967 XZDMA_CH_SRC_START_LSB_OFFSET,
968 ((UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) &
969 XZDMA_WORD0_LSB_MASK));
970 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
971 XZDMA_CH_SRC_START_MSB_OFFSET,
972 (((u64)(UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) >>
973 XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
974 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
975 XZDMA_CH_DST_START_LSB_OFFSET,
976 ((UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) &
977 XZDMA_WORD0_LSB_MASK));
978 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
979 XZDMA_CH_DST_START_MSB_OFFSET,
980 (((u64)(UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) >>
981 XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
984 /*****************************************************************************/
987 * This static function sets all the required fields for initiating data
988 * transfer in Linear descriptor type.
990 * @param InstancePtr is a pointer to the XZDma instance.
991 * @param Data is a pointer of array to the XZDma_Transfer structure which
992 * has all the configuration fields for initiating data transfer.
993 * @param SrcDscrPtr is descriptor pointer of source in which Data fields
995 * @param DstDscrPtr is descriptor pointer of destination in which Data
996 * fields has to be filled.
997 * @param IsLast specifies whether provided descriptor pointer is last
999 * - XZDMA_TRUE - If descriptor is last
1000 * - XZDMA_FALSE - If descriptor is not last
1006 ******************************************************************************/
1007 static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
1008 XZDma_LiDscr *SrcDscrPtr, XZDma_LiDscr *DstDscrPtr, u8 IsLast)
1012 /* Verify arguments */
1013 Xil_AssertVoid(InstancePtr != NULL);
1014 Xil_AssertVoid(Data != NULL);
1015 Xil_AssertVoid(SrcDscrPtr != NULL);
1016 Xil_AssertVoid(DstDscrPtr != NULL);
1017 Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
1019 if (Data->Pause == TRUE) {
1020 Value = XZDMA_WORD3_CMD_PAUSE_MASK;
1022 else if (IsLast == TRUE) {
1023 Value = XZDMA_WORD3_CMD_STOP_MASK;
1026 Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
1028 if (Data->SrcCoherent == TRUE) {
1029 Value |= XZDMA_WORD3_COHRNT_MASK;
1032 XZDma_ConfigLinear(SrcDscrPtr, (u64)Data->SrcAddr, Data->Size, Value);
1036 if (Data->DstCoherent == TRUE) {
1037 Value |= XZDMA_WORD3_COHRNT_MASK;
1040 XZDma_ConfigLinear(DstDscrPtr, (u64)Data->DstAddr, Data->Size, Value);
1044 /*****************************************************************************/
1047 * This static function sets all the required fields for initiating data
1048 * transfer in Linear descriptor type.
1050 * @param DscrPtr is a pointer to source/destination descriptor.
1051 * @param Addr is a 64 bit variable which denotes the address of data.
1052 * @param Size specifies the amount of the data to be transferred.
1053 * @param CtrlValue contains all the control fields of descriptor.
1059 ******************************************************************************/
1060 static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
1063 /* Verify arguments */
1064 Xil_AssertVoid(DscrPtr != NULL);
1065 Xil_AssertVoid(Addr != 0x00U);
1067 DscrPtr->Address = Addr;
1068 DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
1069 DscrPtr->Cntl = CtrlValue;
1071 Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
1075 /*****************************************************************************/
1078 * This static function sets all the required fields for initiating data
1079 * transfer in Linked list descriptor type.
1081 * @param InstancePtr is a pointer to the XZDma instance.
1082 * @param Data is a pointer of array to the XZDma_Transfer structure which
1083 * has all the configuration fields for initiating data transfer.
1084 * @param SrcDscrPtr is descriptor pointer of source in which Data fields
1086 * @param DstDscrPtr is descriptor pointer of destination in which Data
1087 * fields has to be filled.
1088 * @param IsLast specifies whether provided descriptor pointer is last
1090 * - TRUE - If descriptor is last
1091 * - FALSE - If descriptor is not last
1097 ******************************************************************************/
1098 static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
1099 XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast)
1102 XZDma_LlDscr *NextSrc = SrcDscrPtr;
1103 XZDma_LlDscr *NextDst = DstDscrPtr;
1104 u64 NextSrcAdrs = 0x00U;
1105 u64 NextDstAdrs = 0x00U;
1107 /* Verify arguments */
1108 Xil_AssertVoid(InstancePtr != NULL);
1109 Xil_AssertVoid(Data != NULL);
1110 Xil_AssertVoid(SrcDscrPtr != NULL);
1111 Xil_AssertVoid(DstDscrPtr != NULL);
1112 Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
1117 if (Data->Pause == TRUE) {
1118 Value = XZDMA_WORD3_CMD_PAUSE_MASK;
1119 if (IsLast != TRUE) {
1120 NextSrcAdrs = (u64)(UINTPTR)NextSrc;
1121 NextDstAdrs = (u64)(UINTPTR)NextDst;
1124 else if (IsLast == TRUE) {
1125 Value = XZDMA_WORD3_CMD_STOP_MASK;
1128 Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
1129 NextSrcAdrs = (u64)(UINTPTR)NextSrc;
1130 NextDstAdrs = (u64)(UINTPTR)NextDst;
1132 if (Data->SrcCoherent == TRUE) {
1133 Value |= XZDMA_WORD3_COHRNT_MASK;
1136 XZDma_ConfigLinkedList(SrcDscrPtr, (u64)Data->SrcAddr,
1137 Data->Size, Value, NextSrcAdrs);
1141 if (Data->DstCoherent == TRUE) {
1142 Value |= XZDMA_WORD3_COHRNT_MASK;
1145 XZDma_ConfigLinkedList(DstDscrPtr, (u64)Data->DstAddr,
1146 Data->Size, Value, NextDstAdrs);
1150 /*****************************************************************************/
1153 * This static function sets all the required fields for initiating data
1154 * transfer in Linked list descriptor type.
1156 * @param DscrPtr is a pointer to source/destination descriptor.
1157 * @param Addr is a 64 bit variable which denotes the address of data.
1158 * @param Size specifies the amount of the data to be transferred.
1159 * @param CtrlValue contains all the control fields of descriptor.
1160 * @param NextDscrAddr is the address of next descriptor.
1166 ******************************************************************************/
1167 static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
1168 u32 CtrlValue, u64 NextDscrAddr)
1170 /* Verify arguments */
1171 Xil_AssertVoid(DscrPtr != NULL);
1172 Xil_AssertVoid(Addr != 0x00U);
1174 DscrPtr->Address = Addr;
1175 DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
1176 DscrPtr->Cntl = CtrlValue;
1177 DscrPtr->NextDscr = NextDscrAddr;
1178 DscrPtr->Reserved = 0U;
1180 Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
1183 /*****************************************************************************/
1185 * This static function enable's all the interrupts which user intended to
1186 * enable and enables the ZDMA channel for initiating data transfer.
1188 * @param InstancePtr is a pointer to the XZDma instance.
1193 ******************************************************************************/
1195 static void XZDma_Enable(XZDma *InstancePtr)
1197 /* Verify arguments */
1198 Xil_AssertVoid(InstancePtr != NULL);
1200 XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_IEN_OFFSET,
1201 (InstancePtr->IntrMask & XZDMA_IXR_ALL_INTR_MASK));
1202 InstancePtr->ChannelState = XZDMA_BUSY;
1203 XZDma_EnableCh(InstancePtr);
1207 /*****************************************************************************/
1209 * This static function gets all the reset configurations of ZDMA.
1211 * @param InstancePtr is a pointer to the XZDma instance.
1217 ******************************************************************************/
1218 static void XZDma_GetConfigurations(XZDma *InstancePtr)
1220 /* Verify arguments */
1221 Xil_AssertVoid(InstancePtr != NULL);
1223 InstancePtr->DataConfig.SrcIssue = (u8)XZDMA_CTRL1_SRC_ISSUE_MASK;
1224 InstancePtr->DataConfig.SrcBurstType = XZDMA_INCR_BURST;
1225 InstancePtr->DataConfig.SrcBurstLen = 0xFU;
1226 InstancePtr->DataConfig.OverFetch = 1U;
1227 InstancePtr->DataConfig.DstBurstType = XZDMA_INCR_BURST;
1228 InstancePtr->DataConfig.DstBurstLen = 0xFU;
1229 InstancePtr->DataConfig.SrcCache = 0x2U;
1230 InstancePtr->DataConfig.DstCache = 0x2U;
1231 InstancePtr->DataConfig.SrcQos = 0x0U;
1232 InstancePtr->DataConfig.DstQos = 0x0U;
1234 InstancePtr->DscrConfig.AXCache = 0U;
1235 InstancePtr->DscrConfig.AXQos = 0U;
1236 InstancePtr->DscrConfig.AxCoherent = 0U;
1239 /*****************************************************************************/
1242 * This routine is a stub for the asynchronous callbacks. The stub is here in
1243 * case the upper layer forgot to set the handlers. On initialization, All
1244 * handlers are set to this callback. It is considered an error for this
1245 * handler to be invoked.
1247 * @param CallBackRef is a callback reference passed in by the upper
1248 * layer when setting the callback functions, and passed back to
1249 * the upper layer when the callback is invoked.
1250 * @param Mask is the type of the interrupts to enable. Use OR'ing of
1251 * XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
1252 * this parameter value.
1258 ******************************************************************************/
1259 static void StubCallBack(void *CallBackRef, u32 Mask)
1261 /* Verify arguments. */
1262 Xil_AssertVoid(CallBackRef != NULL);
1263 Xil_AssertVoid(Mask != (u32)0x00);
1264 Xil_AssertVoidAlways();
1267 /*****************************************************************************/
1270 * This routine is a stub for the DMA done callback. The stub is here in
1271 * case the upper layer forgot to set the handlers. On initialization, Done
1272 * handler are set to this callback.
1274 * @param CallBackRef is a callback reference passed in by the upper
1275 * layer when setting the callback functions, and passed back to
1276 * the upper layer when the callback is invoked.
1282 ******************************************************************************/
1283 static void StubDoneCallBack(void *CallBackRef)
1285 /* Verify arguments. */
1286 Xil_AssertVoid(CallBackRef != NULL);
1287 Xil_AssertVoidAlways();