2 ; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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4 ; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 ; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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10 ; * Complete, revised, and edited pdf reference manuals are also *
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15 ; * in-depth knowledge of how to use FreeRTOS, it will also help *
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27 ; This file is part of the FreeRTOS distribution.
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29 ; FreeRTOS is free software; you can redistribute it and/or modify it under
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30 ; the terms of the GNU General Public License (version 2) as published by the
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31 ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 ; >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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40 ; FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 ; details. You should have received a copy of the GNU General Public License
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42 ; and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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43 ; viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 ; writing to Real Time Engineers Ltd., contact details for whom are available
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51 ; * Having a problem? Start by reading the FAQ "My application does *
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52 ; * not run, what could be wrong?" *
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54 ; * http://www.FreeRTOS.org/FAQHelp.html *
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59 ; http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 ; license and Real Time Engineers Ltd. contact details.
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62 ; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 ; including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 ; fully thread aware and reentrant UDP/IP stack.
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66 ; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 ; Integrity Systems, who sell the code with commercial support,
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68 ; indemnification and middleware, under the OpenRTOS brand.
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70 ; http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 ; engineered and independently SIL3 certified version for use in safety and
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72 ; mission critical applications that require provable dependability.
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75 EXPORT vRegTest1Implementation
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76 EXPORT vRegTest2Implementation
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78 ; This file is built with IAR and ARM compilers. When the ARM compiler
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79 ; is used the compiler options must define __IASMARM__ as 0 using the
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80 ; --predefine "__IASMARM__ SETA 0" command line option. When compiling
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81 ; with IAR __IASMARM__ is automatically set to 1 so no additional assembler
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82 ; options are required.
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83 SECTION .text:CODE:ROOT(2)
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86 ; This function is explained in the comments at the top of main-full.c.
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87 vRegTest1Implementation
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90 IMPORT ulRegTest1LoopCounter
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92 ; Fill each general purpose register with a known value.
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108 ; Fill each FPU register with a known value.
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126 ; Loop, checking each itteration that each register still contains the
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129 ; Yield to increase test coverage
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132 ; Check all the VFP registers still contain the values set above.
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133 ; First save registers that are clobbered by the test.
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138 bne reg1_error_loopf
\r
140 bne reg1_error_loopf
\r
143 bne reg1_error_loopf
\r
145 bne reg1_error_loopf
\r
148 bne reg1_error_loopf
\r
150 bne reg1_error_loopf
\r
153 bne reg1_error_loopf
\r
155 bne reg1_error_loopf
\r
158 bne reg1_error_loopf
\r
160 bne reg1_error_loopf
\r
163 bne reg1_error_loopf
\r
165 bne reg1_error_loopf
\r
168 bne reg1_error_loopf
\r
170 bne reg1_error_loopf
\r
173 bne reg1_error_loopf
\r
175 bne reg1_error_loopf
\r
178 bne reg1_error_loopf
\r
180 bne reg1_error_loopf
\r
183 bne reg1_error_loopf
\r
185 bne reg1_error_loopf
\r
188 bne reg1_error_loopf
\r
190 bne reg1_error_loopf
\r
193 bne reg1_error_loopf
\r
195 bne reg1_error_loopf
\r
198 bne reg1_error_loopf
\r
200 bne reg1_error_loopf
\r
203 bne reg1_error_loopf
\r
205 bne reg1_error_loopf
\r
208 bne reg1_error_loopf
\r
210 bne reg1_error_loopf
\r
213 bne reg1_error_loopf
\r
215 bne reg1_error_loopf
\r
217 ; Restore the registers that were clobbered by the test.
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220 ; VFP register test passed. Jump to the core register test.
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224 ; If this line is hit then a VFP register value was found to be
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230 ; Test each general purpose register to check that it still contains the
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231 ; expected known value, jumping to reg1_error_loop if any register contains
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232 ; an unexpected value.
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234 bne reg1_error_loop
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236 bne reg1_error_loop
\r
238 bne reg1_error_loop
\r
240 bne reg1_error_loop
\r
242 bne reg1_error_loop
\r
244 bne reg1_error_loop
\r
246 bne reg1_error_loop
\r
248 bne reg1_error_loop
\r
250 bne reg1_error_loop
\r
252 bne reg1_error_loop
\r
254 bne reg1_error_loop
\r
256 bne reg1_error_loop
\r
258 bne reg1_error_loop
\r
260 bne reg1_error_loop
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262 ; Everything passed, increment the loop counter.
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264 ldr r0, =ulRegTest1LoopCounter
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274 ; If this line is hit then there was an error in a core register value.
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275 ; The loop ensures the loop counter stops incrementing.
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279 ;/*-----------------------------------------------------------*/
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281 vRegTest2Implementation
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284 IMPORT ulRegTest2LoopCounter
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286 ; Put a known value in each register.
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287 mov r0, #0xFF000000
\r
288 mov r1, #0x11000000
\r
289 mov r2, #0x22000000
\r
290 mov r3, #0x33000000
\r
291 mov r4, #0x44000000
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292 mov r5, #0x55000000
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293 mov r6, #0x66000000
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294 mov r7, #0x77000000
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295 mov r8, #0x88000000
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296 mov r9, #0x99000000
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297 mov r10, #0xAA000000
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298 mov r11, #0xBB000000
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299 mov r12, #0xCC000000
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300 mov r14, #0xEE000000
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302 ; Likewise the floating point registers
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320 ; Loop, checking each itteration that each register still contains the
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323 ; Check all the VFP registers still contain the values set above.
\r
324 ; First save registers that are clobbered by the test.
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328 cmp r0, #0xFF000000
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329 bne reg2_error_loopf
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330 cmp r1, #0x11000000
\r
331 bne reg2_error_loopf
\r
333 cmp r0, #0x22000000
\r
334 bne reg2_error_loopf
\r
335 cmp r1, #0x33000000
\r
336 bne reg2_error_loopf
\r
338 cmp r0, #0x44000000
\r
339 bne reg2_error_loopf
\r
340 cmp r1, #0x55000000
\r
341 bne reg2_error_loopf
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343 cmp r0, #0x66000000
\r
344 bne reg2_error_loopf
\r
345 cmp r1, #0x77000000
\r
346 bne reg2_error_loopf
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348 cmp r0, #0x88000000
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349 bne reg2_error_loopf
\r
350 cmp r1, #0x99000000
\r
351 bne reg2_error_loopf
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353 cmp r0, #0xAA000000
\r
354 bne reg2_error_loopf
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355 cmp r1, #0xBB000000
\r
356 bne reg2_error_loopf
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358 cmp r0, #0xFF000000
\r
359 bne reg2_error_loopf
\r
360 cmp r1, #0x11000000
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361 bne reg2_error_loopf
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363 cmp r0, #0x22000000
\r
364 bne reg2_error_loopf
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365 cmp r1, #0x33000000
\r
366 bne reg2_error_loopf
\r
368 cmp r0, #0x44000000
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369 bne reg2_error_loopf
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370 cmp r1, #0x55000000
\r
371 bne reg2_error_loopf
\r
373 cmp r0, #0x66000000
\r
374 bne reg2_error_loopf
\r
375 cmp r1, #0x77000000
\r
376 bne reg2_error_loopf
\r
378 cmp r0, #0x88000000
\r
379 bne reg2_error_loopf
\r
380 cmp r1, #0x99000000
\r
381 bne reg2_error_loopf
\r
383 cmp r0, #0xAA000000
\r
384 bne reg2_error_loopf
\r
385 cmp r1, #0xBB000000
\r
386 bne reg2_error_loopf
\r
388 cmp r0, #0xFF000000
\r
389 bne reg2_error_loopf
\r
390 cmp r1, #0x11000000
\r
391 bne reg2_error_loopf
\r
393 cmp r0, #0x22000000
\r
394 bne reg2_error_loopf
\r
395 cmp r1, #0x33000000
\r
396 bne reg2_error_loopf
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398 cmp r0, #0x44000000
\r
399 bne reg2_error_loopf
\r
400 cmp r1, #0x55000000
\r
401 bne reg2_error_loopf
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403 cmp r0, #0x66000000
\r
404 bne reg2_error_loopf
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405 cmp r1, #0x77000000
\r
406 bne reg2_error_loopf
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408 ; Restore the registers that were clobbered by the test.
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411 ; VFP register test passed. Jump to the core register test.
\r
415 ; If this line is hit then a VFP register value was found to be
\r
421 cmp r0, #0xFF000000
\r
422 bne reg2_error_loop
\r
423 cmp r1, #0x11000000
\r
424 bne reg2_error_loop
\r
425 cmp r2, #0x22000000
\r
426 bne reg2_error_loop
\r
427 cmp r3, #0x33000000
\r
428 bne reg2_error_loop
\r
429 cmp r4, #0x44000000
\r
430 bne reg2_error_loop
\r
431 cmp r5, #0x55000000
\r
432 bne reg2_error_loop
\r
433 cmp r6, #0x66000000
\r
434 bne reg2_error_loop
\r
435 cmp r7, #0x77000000
\r
436 bne reg2_error_loop
\r
437 cmp r8, #0x88000000
\r
438 bne reg2_error_loop
\r
439 cmp r9, #0x99000000
\r
440 bne reg2_error_loop
\r
441 cmp r10, #0xAA000000
\r
442 bne reg2_error_loop
\r
443 cmp r11, #0xBB000000
\r
444 bne reg2_error_loop
\r
445 cmp r12, #0xCC000000
\r
446 bne reg2_error_loop
\r
447 cmp r14, #0xEE000000
\r
448 bne reg2_error_loop
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450 ; Everything passed, increment the loop counter.
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452 ldr r0, =ulRegTest2LoopCounter
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462 ; If this line is hit then there was an error in a core register value.
\r
463 ; The loop ensures the loop counter stops incrementing.
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