1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2014, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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32 /** \addtogroup dmac_module Working with DMAC
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36 * <li> Enable or disable the a DMAC controller with DMAC_Enable() and or DMAC_Disable().</li>
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37 * <li> Enable or disable %Dma interrupt using DMAC_EnableIt()or DMAC_DisableIt().</li>
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38 * <li> Get %Dma interrupt status by DMAC_GetStatus() and DMAC_GetInterruptMask().</li>
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39 * <li> Enable or disable specified %Dma channel with DMAC_EnableChannel() or DMAC_DisableChannel().</li>
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40 * <li> Get %Dma channel status by DMAC_GetChannelStatus().</li>
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41 * <li> ControlA and ControlB register is set by DMAC_SetControlA() and DMAC_SetControlB().</li>
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42 * <li> Configure source and/or destination start address with DMAC_SetSourceAddr() and/or DMAC_SetDestinationAddr().</li>
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43 * <li> Set %Dma descriptor address using DMAC_SetDescriptorAddr().</li>
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44 * <li> Set source transfer buffer size with DMAC_SetBufferSize().</li>
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45 * <li> Configure source and/or destination Picture-In-Picutre mode with DMAC_SetSourcePip() and/or DMAC_SetDestPip().</li>
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48 * For more accurate information, please look at the DMAC section of the
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51 * \sa \ref dmad_module
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63 /*------------------------------------------------------------------------------
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65 *----------------------------------------------------------------------------*/
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71 /*------------------------------------------------------------------------------
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73 *----------------------------------------------------------------------------*/
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75 /** \addtogroup dmac_defines DMAC Definitions
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78 /** Number of DMA channels */
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79 #define XDMAC_CONTROLLER_NUM 2
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80 /** Number of DMA channels */
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81 #define XDMAC_CHANNEL_NUM 16
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82 /** Max DMA single transfer size */
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83 #define XDMAC_MAX_BT_SIZE 0xFFFF
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86 /*----------------------------------------------------------------------------
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88 *----------------------------------------------------------------------------*/
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89 #define XDMA_GET_DATASIZE(size) ((size==0)? XDMAC_CC_DWIDTH_BYTE : \
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90 ((size==1)? XDMAC_CC_DWIDTH_HALFWORD : \
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91 ((size==2)? XDMAC_CC_DWIDTH_WORD : XDMAC_CC_DWIDTH_DWORD )))
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92 #define XDMA_GET_CC_SAM(s) ((s==0)? XDMAC_CC_SAM_FIXED_AM : \
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93 ((s==1)? XDMAC_CC_SAM_INCREMENTED_AM : \
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94 ((s==2)? XDMAC_CC_SAM_UBS_AM : XDMAC_CC_SAM_UBS_DS_AM )))
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95 #define XDMA_GET_CC_DAM(d) ((d==0)? XDMAC_CC_DAM_FIXED_AM : \
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96 ((d==1)? XDMAC_CC_DAM_INCREMENTED_AM : \
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97 ((d==2)? XDMAC_CC_DAM_UBS_AM : XDMAC_CC_DAM_UBS_DS_AM )))
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98 #define XDMA_GET_CC_MEMSET(m) ((m==0)? XDMAC_CC_MEMSET_NORMAL_MODE : XDMAC_CC_MEMSET_HW_MODE)
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100 /*------------------------------------------------------------------------------
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102 *----------------------------------------------------------------------------*/
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104 /** \addtogroup dmac_struct DMAC Data Structs
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108 /*------------------------------------------------------------------------------
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110 *------------------------------------------------------------------------------*/
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111 /** \addtogroup dmac_functions
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119 extern uint32_t XDMAC_GetType( Xdmac *pXdmac);
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120 extern uint32_t XDMAC_GetConfig( Xdmac *pXdmac);
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121 extern uint32_t XDMAC_GetArbiter( Xdmac *pXdmac);
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122 extern void XDMAC_EnableGIt (Xdmac *pXdmac, uint32_t dwInteruptMask );
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123 extern void XDMAC_DisableGIt (Xdmac *pXdmac, uint32_t dwInteruptMask );
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124 extern uint32_t XDMAC_GetGItMask( Xdmac *pXdmac );
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125 extern uint32_t XDMAC_GetGIsr( Xdmac *pXdmac );
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126 extern uint32_t XDMAC_GetMaskedGIsr( Xdmac *pXdmac );
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127 extern void XDMAC_EnableChannel( Xdmac *pXdmac, uint8_t channel );
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128 extern void XDMAC_EnableChannels( Xdmac *pXdmac, uint8_t bmChannels );
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129 extern void XDMAC_DisableChannel( Xdmac *pXdmac, uint8_t channel );
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130 extern void XDMAC_DisableChannels( Xdmac *pXdmac, uint8_t bmChannels );
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131 extern uint32_t XDMAC_GetGlobalChStatus(Xdmac *pXdmac);
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132 extern void XDMAC_SuspendReadChannel( Xdmac *pXdmac, uint8_t channel );
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133 extern void XDMAC_SuspendWriteChannel( Xdmac *pXdmac, uint8_t channel );
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134 extern void XDMAC_SuspendReadWriteChannel( Xdmac *pXdmac, uint8_t channel );
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135 extern void XDMAC_ResumeReadWriteChannel( Xdmac *pXdmac, uint8_t channel );
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136 extern void XDMAC_SoftwareTransferReq(Xdmac *pXdmac, uint8_t channel);
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137 extern uint32_t XDMAC_GetSoftwareTransferStatus(Xdmac *pXdmac);
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138 extern void XDMAC_SoftwareFlushReq(Xdmac *pXdmac, uint8_t channel);
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139 extern void XDMAC_EnableChannelIt (Xdmac *pXdmac, uint8_t channel, uint32_t dwInteruptMask );
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140 extern void XDMAC_DisableChannelIt (Xdmac *pXdmac, uint8_t channel, uint32_t dwInteruptMask );
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141 extern uint32_t XDMAC_GetChannelItMask (Xdmac *pXdmac, uint8_t channel);
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142 extern uint32_t XDMAC_GetChannelIsr (Xdmac *pXdmac, uint8_t channel);
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143 extern uint32_t XDMAC_GetMaskChannelIsr (Xdmac *pXdmac, uint8_t channel);
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144 extern void XDMAC_SetSourceAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr);
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145 extern void XDMAC_SetDestinationAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr);
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146 extern void XDMAC_SetDescriptorAddr(Xdmac *pXdmac, uint8_t channel, uint32_t addr, uint32_t ndaif);
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147 extern void XDMAC_SetDescriptorControl(Xdmac *pXdmac, uint8_t channel, uint32_t config);
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148 extern void XDMAC_SetMicroblockControl(Xdmac *pXdmac, uint8_t channel, uint32_t ublen);
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149 extern void XDMAC_SetBlockControl(Xdmac *pXdmac, uint8_t channel, uint32_t blen);
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150 extern void XDMAC_SetChannelConfig(Xdmac *pXdmac, uint8_t channel, uint32_t config);
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151 extern uint32_t XDMAC_GetChannelConfig(Xdmac *pXdmac, uint8_t channel);
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152 extern void XDMAC_SetDataStride_MemPattern(Xdmac *pXdmac, uint8_t channel, uint32_t dds_msp);
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153 extern void XDMAC_SetSourceMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t subs);
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154 extern void XDMAC_SetDestinationMicroBlockStride(Xdmac *pXdmac, uint8_t channel, uint32_t dubs);
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155 extern uint32_t XDMAC_GetChDestinationAddr(Xdmac *pXdmac, uint8_t channel);
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162 #endif //#ifndef DMAC_H
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