1 /* Linker script for Altera CycloneV-DK
3 * Version: Sourcery CodeBench Lite 2013.11-67
4 * Support: https://sourcery.mentor.com/GNUToolchain/
6 * Copyright (c) 2007-2010 CodeSourcery, Inc.
7 * Copyright (c) 2010-2014 Mentor Graphics, Inc.
9 * The authors hereby grant permission to use, copy, modify, distribute,
10 * and license this software and its documentation for any purpose, provided
11 * that existing copyright notices are retained in all copies and that this
12 * notice is included verbatim in any distributions. No written agreement,
13 * license, or royalty fee is required for any of the authorized uses.
14 * Modifications to this software may be copyrighted by their authors
15 * and need not follow the licensing terms described here, provided that
16 * the new terms are clearly indicated on the first page of each file where
19 OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
22 GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3arm)
26 boot_rom (rx) : ORIGIN = 0xfffd0000, LENGTH = 64K
27 oc_ram (rwx) : ORIGIN = 0xffff0000, LENGTH = 64K
28 ram (rwx) : ORIGIN = 0x100000, LENGTH = 1023M
31 /* These force the linker to search for particular symbols from
32 * the start of the link process and thus ensure the user's
33 * overrides are picked up
35 EXTERN(__cs3_reset __cs3_reset_cycloneV_dk_ram)
36 EXTERN(__cs3_start_asm _start)
37 /* Bring in the interrupt routines & vector */
39 EXTERN(__cs3_interrupt_vector_arm)
40 EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
42 /* Provide fall-back values */
43 PROVIDE(__cs3_heap_start = _end);
44 PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
45 PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
46 PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
53 __cs3_region_start_ram = .;
55 *(.cs3.region-head.ram)
56 ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");
57 __cs3_interrupt_vector = __cs3_interrupt_vector_arm;
58 *(.cs3.interrupt_vector)
59 /* Make sure we pulled in an interrupt vector. */
60 ASSERT (. != __cs3_interrupt_vector_arm, "No interrupt vector");
62 PROVIDE(__cs3_reset = __cs3_reset_cycloneV_dk_ram);
64 _start = DEFINED(__cs3_start_asm) ? __cs3_start_asm : _start;
67 *(.text .text.* .gnu.linkonce.t.*)
70 *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
72 *(.ARM.extab* .gnu.linkonce.armextab.*)
75 .eh_frame_hdr : ALIGN (4)
77 KEEP (*(.eh_frame_hdr))
78 *(.eh_frame_entry .eh_frame_entry.*)
82 KEEP (*(.eh_frame)) *(.eh_frame.*)
84 /* .ARM.exidx is sorted, so has to go in its own output section. */
85 PROVIDE_HIDDEN (__exidx_start = .);
88 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
90 PROVIDE_HIDDEN (__exidx_end = .);
93 *(.rodata .rodata.* .gnu.linkonce.r.*)
99 __preinit_array_start = .;
100 KEEP (*(.preinit_array))
101 __preinit_array_end = .;
104 __init_array_start = .;
105 KEEP (*(SORT(.init_array.*)))
106 KEEP (*(.init_array))
107 __init_array_end = .;
113 __fini_array_start = .;
114 KEEP (*(.fini_array))
115 KEEP (*(SORT(.fini_array.*)))
116 __fini_array_end = .;
119 KEEP (*crtbegin.o(.ctors))
120 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
121 KEEP (*(SORT(.ctors.*)))
122 KEEP (*crtend.o(.ctors))
125 KEEP (*crtbegin.o(.dtors))
126 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
127 KEEP (*(SORT(.dtors.*)))
128 KEEP (*crtend.o(.dtors))
133 LONG (__cs3_region_init_oc_ram)
134 LONG (__cs3_region_start_oc_ram)
135 LONG (__cs3_region_init_size_oc_ram)
136 LONG (__cs3_region_zero_size_oc_ram)
138 LONG (__cs3_region_init_ram)
139 LONG (__cs3_region_start_ram)
140 LONG (__cs3_region_init_size_ram)
141 LONG (__cs3_region_zero_size_ram)
142 __cs3_regions_end = .;
147 ASSERT (!(__cs3_region_init_oc_ram & 7), "__cs3_region_init_oc_ram not aligned")
148 ASSERT (!(__cs3_region_start_oc_ram & 7), "__cs3_region_start_oc_ram not aligned")
149 ASSERT (!(__cs3_region_init_size_oc_ram & 7), "__cs3_region_init_size_oc_ram not aligned")
150 ASSERT (!(__cs3_region_zero_size_oc_ram & 7), "__cs3_region_zero_size_oc_ram not aligned")
151 ASSERT (!(__cs3_region_init_ram & 7), "__cs3_region_init_ram not aligned")
152 ASSERT (!(__cs3_region_start_ram & 7), "__cs3_region_start_ram not aligned")
153 ASSERT (!(__cs3_region_init_size_ram & 7), "__cs3_region_init_size_ram not aligned")
154 ASSERT (!(__cs3_region_zero_size_ram & 7), "__cs3_region_zero_size_ram not aligned")
155 .cs3.boot_rom : ALIGN (8)
157 __cs3_region_start_boot_rom = .;
158 *(.cs3.region-head.boot_rom)
164 *(.boot_rom.b .bss.boot_rom)
167 /* __cs3_region_end_boot_rom is deprecated */
168 __cs3_region_end_boot_rom = __cs3_region_start_boot_rom + LENGTH(boot_rom);
169 __cs3_region_size_boot_rom = LENGTH(boot_rom);
170 __cs3_region_init_boot_rom = LOADADDR (.cs3.boot_rom);
171 __cs3_region_init_size_boot_rom = LOADADDR (.cs3.boot_rom.bss) - LOADADDR (.cs3.boot_rom);
172 __cs3_region_zero_size_boot_rom = SIZEOF(.cs3.boot_rom.bss);
174 .cs3.oc_ram : ALIGN (8)
176 __cs3_region_start_oc_ram = .;
177 *(.cs3.region-head.oc_ram)
183 *(.oc_ram.b .bss.oc_ram)
186 /* __cs3_region_end_oc_ram is deprecated */
187 __cs3_region_end_oc_ram = __cs3_region_start_oc_ram + LENGTH(oc_ram);
188 __cs3_region_size_oc_ram = LENGTH(oc_ram);
189 __cs3_region_init_oc_ram = LOADADDR (.cs3.oc_ram);
190 __cs3_region_init_size_oc_ram = LOADADDR (.cs3.oc_ram.bss) - LOADADDR (.cs3.oc_ram);
191 __cs3_region_zero_size_oc_ram = SIZEOF(.cs3.oc_ram.bss);
198 *(.data .data.* .gnu.linkonce.d.*)
207 *(.bss .bss.* .gnu.linkonce.b.*)
215 /* __cs3_region_end_ram is deprecated */
216 __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
217 __cs3_region_size_ram = LENGTH(ram);
218 __cs3_region_init_ram = LOADADDR (.text);
219 __cs3_region_init_size_ram = _edata - ADDR (.text);
220 __cs3_region_zero_size_ram = _end - _edata;
222 .stab 0 (NOLOAD) : { *(.stab) }
223 .stabstr 0 (NOLOAD) : { *(.stabstr) }
224 /* DWARF debug sections.
225 * Symbols in the DWARF debugging sections are relative to
226 * the beginning of the section so we begin them at 0.
229 .debug 0 : { *(.debug) }
230 .line 0 : { *(.line) }
231 /* GNU DWARF 1 extensions */
232 .debug_srcinfo 0 : { *(.debug_srcinfo) }
233 .debug_sfnames 0 : { *(.debug_sfnames) }
234 /* DWARF 1.1 and DWARF 2 */
235 .debug_aranges 0 : { *(.debug_aranges) }
236 .debug_pubnames 0 : { *(.debug_pubnames) }
238 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
239 .debug_abbrev 0 : { *(.debug_abbrev) }
240 .debug_line 0 : { *(.debug_line) }
241 .debug_frame 0 : { *(.debug_frame) }
242 .debug_str 0 : { *(.debug_str) }
243 .debug_loc 0 : { *(.debug_loc) }
244 .debug_macinfo 0 : { *(.debug_macinfo) }
246 .debug_ranges 0 : { *(.debug_ranges) }
247 /* SGI/MIPS DWARF 2 extensions */
248 .debug_weaknames 0 : { *(.debug_weaknames) }
249 .debug_funcnames 0 : { *(.debug_funcnames) }
250 .debug_typenames 0 : { *(.debug_typenames) }
251 .debug_varnames 0 : { *(.debug_varnames) }
253 .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
254 .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
255 /DISCARD/ : { *(.note.GNU-stack) }
257 /* checksum: 107f7843360731655cf27621 */