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31 ******************************************************************************/
32 /****************************************************************************/
36 * @addtogroup xadcps_v2_0
40 * The XAdcPs driver supports the Xilinx XADC/ADC device.
42 * The XADC/ADC device has the following features:
43 * - 10-bit, 200-KSPS (kilo samples per second)
44 * Analog-to-Digital Converter (ADC)
45 * - Monitoring of on-chip supply voltages and temperature
46 * - 1 dedicated differential analog-input pair and
47 * 16 auxiliary differential analog-input pairs
48 * - Automatic alarms based on user defined limits for the on-chip
49 * supply voltages and temperature
50 * - Automatic Channel Sequencer, programmable averaging, programmable
51 * acquisition time for the external inputs, unipolar or differential
52 * input selection for the external inputs
53 * - Inbuilt Calibration
54 * - Optional interrupt request generation
57 * The user should refer to the hardware device specification for detailed
58 * information about the device.
60 * This header file contains the prototypes of driver functions that can
61 * be used to access the XADC/ADC device.
64 * <b> XADC Channel Sequencer Modes </b>
66 * The XADC Channel Sequencer supports the following operating modes:
68 * - <b> Default </b>: This is the default mode after power up.
69 * In this mode of operation the XADC operates in
70 * a sequence mode, monitoring the on chip sensors:
71 * Temperature, VCCINT, and VCCAUX.
72 * - <b> One pass through sequence </b>: In this mode the XADC
73 * converts the channels enabled in the Sequencer Channel Enable
74 * registers for a single pass and then stops.
75 * - <b> Continuous cycling of sequence </b>: In this mode the XADC
76 * converts the channels enabled in the Sequencer Channel Enable
77 * registers continuously.
78 * - <b> Single channel mode</b>: In this mode the XADC Channel
79 * Sequencer is disabled and the XADC operates in a
80 * Single Channel Mode.
81 * The XADC can operate either in a Continuous or Event
82 * driven sampling mode in the single channel mode.
83 * - <b> Simultaneous Sampling Mode</b>: In this mode the XADC Channel
84 * Sequencer will automatically sequence through eight fixed pairs
85 * of auxiliary analog input channels for simulataneous conversion.
86 * - <b> Independent ADC mode</b>: In this mode the first ADC (A) is used to
87 * is used to implement a fixed monitoring mode similar to the
88 * default mode but the alarm fucntions ar eenabled.
89 * The second ADC (B) is available to be used with external analog
90 * input channels only.
92 * Read the XADC spec for more information about the sequencer modes.
94 * <b> Initialization and Configuration </b>
96 * The device driver enables higher layer software (e.g., an application) to
97 * communicate to the XADC/ADC device.
99 * XAdcPs_CfgInitialize() API is used to initialize the XADC/ADC
100 * device. The user needs to first call the XAdcPs_LookupConfig() API which
101 * returns the Configuration structure pointer which is passed as a parameter to
102 * the XAdcPs_CfgInitialize() API.
107 * The XADC/ADC device supports interrupt driven mode and the default
108 * operation mode is polling mode.
110 * The interrupt mode is available only if hardware is configured to support
113 * This driver does not provide a Interrupt Service Routine (ISR) for the device.
114 * It is the responsibility of the application to provide one if needed. Refer to
115 * the interrupt example provided with this driver for details on using the
116 * device in interrupt mode.
119 * <b> Virtual Memory </b>
121 * This driver supports Virtual Memory. The RTOS is responsible for calculating
122 * the correct device base address in Virtual Memory space.
127 * This driver is not thread safe. Any needs for threads or thread mutual
128 * exclusion must be satisfied by the layer above this driver.
133 * Asserts are used within all Xilinx drivers to enforce constraints on argument
134 * values. Asserts can be turned off on a system-wide basis by defining, at
135 * compile time, the NDEBUG identifier. By default, asserts are turned on and it
136 * is recommended that users leave asserts on during development.
139 * <b> Building the driver </b>
141 * The XAdcPs driver is composed of several source files. This allows the user
142 * to build and link only those parts of the driver that are necessary.
144 * <b> Limitations of the driver </b>
146 * XADC/ADC device can be accessed through the JTAG port and the PLB
147 * interface. The driver implementation does not support the simultaneous access
148 * of the device by both these interfaces. The user has to care of this situation
149 * in the user application code.
155 * MODIFICATION HISTORY:
157 * Ver Who Date Changes
158 * ----- ----- -------- -----------------------------------------------------
159 * 1.00a ssb 12/22/11 First release based on the XPS/AXI xadc driver
160 * 1.01a bss 02/18/13 Modified XAdcPs_SetSeqChEnables,XAdcPs_SetSeqAvgEnables
161 * XAdcPs_SetSeqInputMode and XAdcPs_SetSeqAcqTime APIs
162 * in xadcps.c to fix CR #693371
163 * 1.03a bss 11/01/13 Modified xadcps_hw.h to use correct Register offsets
167 *****************************************************************************/
168 #ifndef XADCPS_H /* Prevent circular inclusions */
169 #define XADCPS_H /* by using protection macros */
175 /***************************** Include Files ********************************/
177 #include "xil_types.h"
178 #include "xil_assert.h"
180 #include "xadcps_hw.h"
182 /************************** Constant Definitions ****************************/
186 * @name Indexes for the different channels.
189 #define XADCPS_CH_TEMP 0x0 /**< On Chip Temperature */
190 #define XADCPS_CH_VCCINT 0x1 /**< VCCINT */
191 #define XADCPS_CH_VCCAUX 0x2 /**< VCCAUX */
192 #define XADCPS_CH_VPVN 0x3 /**< VP/VN Dedicated analog inputs */
193 #define XADCPS_CH_VREFP 0x4 /**< VREFP */
194 #define XADCPS_CH_VREFN 0x5 /**< VREFN */
195 #define XADCPS_CH_VBRAM 0x6 /**< On-chip VBRAM Data Reg, 7 series */
196 #define XADCPS_CH_SUPPLY_CALIB 0x07 /**< Supply Calib Data Reg */
197 #define XADCPS_CH_ADC_CALIB 0x08 /**< ADC Offset Channel Reg */
198 #define XADCPS_CH_GAINERR_CALIB 0x09 /**< Gain Error Channel Reg */
199 #define XADCPS_CH_VCCPINT 0x0D /**< On-chip PS VCCPINT Channel , Zynq */
200 #define XADCPS_CH_VCCPAUX 0x0E /**< On-chip PS VCCPAUX Channel , Zynq */
201 #define XADCPS_CH_VCCPDRO 0x0F /**< On-chip PS VCCPDRO Channel , Zynq */
202 #define XADCPS_CH_AUX_MIN 16 /**< Channel number for 1st Aux Channel */
203 #define XADCPS_CH_AUX_MAX 31 /**< Channel number for Last Aux channel */
209 * @name Indexes for reading the Calibration Coefficient Data.
212 #define XADCPS_CALIB_SUPPLY_COEFF 0 /**< Supply Offset Calib Coefficient */
213 #define XADCPS_CALIB_ADC_COEFF 1 /**< ADC Offset Calib Coefficient */
214 #define XADCPS_CALIB_GAIN_ERROR_COEFF 2 /**< Gain Error Calib Coefficient*/
219 * @name Indexes for reading the Minimum/Maximum Measurement Data.
222 #define XADCPS_MAX_TEMP 0 /**< Maximum Temperature Data */
223 #define XADCPS_MAX_VCCINT 1 /**< Maximum VCCINT Data */
224 #define XADCPS_MAX_VCCAUX 2 /**< Maximum VCCAUX Data */
225 #define XADCPS_MAX_VBRAM 3 /**< Maximum VBRAM Data */
226 #define XADCPS_MIN_TEMP 4 /**< Minimum Temperature Data */
227 #define XADCPS_MIN_VCCINT 5 /**< Minimum VCCINT Data */
228 #define XADCPS_MIN_VCCAUX 6 /**< Minimum VCCAUX Data */
229 #define XADCPS_MIN_VBRAM 7 /**< Minimum VBRAM Data */
230 #define XADCPS_MAX_VCCPINT 8 /**< Maximum VCCPINT Register , Zynq */
231 #define XADCPS_MAX_VCCPAUX 9 /**< Maximum VCCPAUX Register , Zynq */
232 #define XADCPS_MAX_VCCPDRO 0xA /**< Maximum VCCPDRO Register , Zynq */
233 #define XADCPS_MIN_VCCPINT 0xC /**< Minimum VCCPINT Register , Zynq */
234 #define XADCPS_MIN_VCCPAUX 0xD /**< Minimum VCCPAUX Register , Zynq */
235 #define XADCPS_MIN_VCCPDRO 0xE /**< Minimum VCCPDRO Register , Zynq */
241 * @name Alarm Threshold(Limit) Register (ATR) indexes.
244 #define XADCPS_ATR_TEMP_UPPER 0 /**< High user Temperature */
245 #define XADCPS_ATR_VCCINT_UPPER 1 /**< VCCINT high voltage limit register */
246 #define XADCPS_ATR_VCCAUX_UPPER 2 /**< VCCAUX high voltage limit register */
247 #define XADCPS_ATR_OT_UPPER 3 /**< VCCAUX high voltage limit register */
248 #define XADCPS_ATR_TEMP_LOWER 4 /**< Upper Over Temperature limit Reg */
249 #define XADCPS_ATR_VCCINT_LOWER 5 /**< VCCINT high voltage limit register */
250 #define XADCPS_ATR_VCCAUX_LOWER 6 /**< VCCAUX low voltage limit register */
251 #define XADCPS_ATR_OT_LOWER 7 /**< Lower Over Temperature limit */
252 #define XADCPS_ATR_VBRAM_UPPER_ 8 /**< VRBAM Upper Alarm Reg, 7 Series */
253 #define XADCPS_ATR_VCCPINT_UPPER 9 /**< VCCPINT Upper Alarm Reg, Zynq */
254 #define XADCPS_ATR_VCCPAUX_UPPER 0xA /**< VCCPAUX Upper Alarm Reg, Zynq */
255 #define XADCPS_ATR_VCCPDRO_UPPER 0xB /**< VCCPDRO Upper Alarm Reg, Zynq */
256 #define XADCPS_ATR_VBRAM_LOWER 0xC /**< VRBAM Lower Alarm Reg, 7 Series */
257 #define XADCPS_ATR_VCCPINT_LOWER 0xD /**< VCCPINT Lower Alarm Reg , Zynq */
258 #define XADCPS_ATR_VCCPAUX_LOWER 0xE /**< VCCPAUX Lower Alarm Reg , Zynq */
259 #define XADCPS_ATR_VCCPDRO_LOWER 0xF /**< VCCPDRO Lower Alarm Reg , Zynq */
265 * @name Averaging to be done for the channels.
268 #define XADCPS_AVG_0_SAMPLES 0 /**< No Averaging */
269 #define XADCPS_AVG_16_SAMPLES 1 /**< Average 16 samples */
270 #define XADCPS_AVG_64_SAMPLES 2 /**< Average 64 samples */
271 #define XADCPS_AVG_256_SAMPLES 3 /**< Average 256 samples */
277 * @name Channel Sequencer Modes of operation
280 #define XADCPS_SEQ_MODE_SAFE 0 /**< Default Safe Mode */
281 #define XADCPS_SEQ_MODE_ONEPASS 1 /**< Onepass through Sequencer */
282 #define XADCPS_SEQ_MODE_CONTINPASS 2 /**< Continuous Cycling Sequencer */
283 #define XADCPS_SEQ_MODE_SINGCHAN 3 /**< Single channel -No Sequencing */
284 #define XADCPS_SEQ_MODE_SIMUL_SAMPLING 4 /**< Simultaneous sampling */
285 #define XADCPS_SEQ_MODE_INDEPENDENT 8 /**< Independent mode */
292 * @name Power Down Modes
295 #define XADCPS_PD_MODE_NONE 0 /**< No Power Down */
296 #define XADCPS_PD_MODE_ADCB 1 /**< Power Down ADC B */
297 #define XADCPS_PD_MODE_XADC 2 /**< Power Down ADC A and ADC B */
300 /**************************** Type Definitions ******************************/
303 * This typedef contains configuration information for the XADC/ADC
307 u16 DeviceId; /**< Unique ID of device */
308 u32 BaseAddress; /**< Device base address */
313 * The driver's instance data. The user is required to allocate a variable
314 * of this type for every XADC/ADC device in the system. A pointer to
315 * a variable of this type is then passed to the driver API functions.
318 XAdcPs_Config Config; /**< XAdcPs_Config of current device */
319 u32 IsReady; /**< Device is initialized and ready */
323 /***************** Macros (Inline Functions) Definitions ********************/
325 /****************************************************************************/
328 * This macro checks if the XADC device is in Event Sampling mode.
330 * @param InstancePtr is a pointer to the XAdcPs instance.
333 * - TRUE if the device is in Event Sampling Mode.
334 * - FALSE if the device is in Continuous Sampling Mode.
336 * @note C-Style signature:
337 * int XAdcPs_IsEventSamplingMode(XAdcPs *InstancePtr);
339 *****************************************************************************/
340 #define XAdcPs_IsEventSamplingModeSet(InstancePtr) \
341 (((XAdcPs_ReadInternalReg(InstancePtr, \
342 XADCPS_CFR0_OFFSET) & XADCPS_CFR0_EC_MASK) ? \
346 /****************************************************************************/
349 * This macro checks if the XADC device is in External Mux mode.
351 * @param InstancePtr is a pointer to the XAdcPs instance.
354 * - TRUE if the device is in External Mux Mode.
355 * - FALSE if the device is NOT in External Mux Mode.
357 * @note C-Style signature:
358 * int XAdcPs_IsExternalMuxMode(XAdcPs *InstancePtr);
360 *****************************************************************************/
361 #define XAdcPs_IsExternalMuxModeSet(InstancePtr) \
362 (((XAdcPs_ReadInternalReg(InstancePtr, \
363 XADCPS_CFR0_OFFSET) & XADCPS_CFR0_MUX_MASK) ? \
366 /****************************************************************************/
369 * This macro converts XADC Raw Data to Temperature(centigrades).
371 * @param AdcData is the Raw ADC Data from XADC.
373 * @return The Temperature in centigrades.
375 * @note C-Style signature:
376 * float XAdcPs_RawToTemperature(u32 AdcData);
378 *****************************************************************************/
379 #define XAdcPs_RawToTemperature(AdcData) \
380 ((((float)(AdcData)/65536.0f)/0.00198421639f ) - 273.15f)
382 /****************************************************************************/
385 * This macro converts XADC/ADC Raw Data to Voltage(volts).
387 * @param AdcData is the XADC/ADC Raw Data.
389 * @return The Voltage in volts.
391 * @note C-Style signature:
392 * float XAdcPs_RawToVoltage(u32 AdcData);
394 *****************************************************************************/
395 #define XAdcPs_RawToVoltage(AdcData) \
396 ((((float)(AdcData))* (3.0f))/65536.0f)
398 /****************************************************************************/
401 * This macro converts Temperature in centigrades to XADC/ADC Raw Data.
403 * @param Temperature is the Temperature in centigrades to be
404 * converted to XADC/ADC Raw Data.
406 * @return The XADC/ADC Raw Data.
408 * @note C-Style signature:
409 * int XAdcPs_TemperatureToRaw(float Temperature);
411 *****************************************************************************/
412 #define XAdcPs_TemperatureToRaw(Temperature) \
413 ((int)(((Temperature) + 273.15f)*65536.0f*0.00198421639f))
415 /****************************************************************************/
418 * This macro converts Voltage in Volts to XADC/ADC Raw Data.
420 * @param Voltage is the Voltage in volts to be converted to
423 * @return The XADC/ADC Raw Data.
425 * @note C-Style signature:
426 * int XAdcPs_VoltageToRaw(float Voltage);
428 *****************************************************************************/
429 #define XAdcPs_VoltageToRaw(Voltage) \
430 ((int)((Voltage)*65536.0f/3.0f))
433 /****************************************************************************/
436 * This macro is used for writing to the XADC Registers using the
439 * @param InstancePtr is a pointer to the XAdcPs instance.
443 * @note C-Style signature:
444 * void XAdcPs_WriteFifo(XAdcPs *InstancePtr, u32 Data);
446 *****************************************************************************/
447 #define XAdcPs_WriteFifo(InstancePtr, Data) \
448 XAdcPs_WriteReg((InstancePtr)->Config.BaseAddress, \
449 XADCPS_CMDFIFO_OFFSET, Data);
452 /****************************************************************************/
455 * This macro is used for reading from the XADC Registers using the
458 * @param InstancePtr is a pointer to the XAdcPs instance.
460 * @return Data read from the FIFO
462 * @note C-Style signature:
463 * u32 XAdcPs_ReadFifo(XAdcPs *InstancePtr);
465 *****************************************************************************/
466 #define XAdcPs_ReadFifo(InstancePtr) \
467 XAdcPs_ReadReg((InstancePtr)->Config.BaseAddress, \
468 XADCPS_RDFIFO_OFFSET);
471 /************************** Function Prototypes *****************************/
476 * Functions in xadcps_sinit.c
478 XAdcPs_Config *XAdcPs_LookupConfig(u16 DeviceId);
481 * Functions in xadcps.c
483 int XAdcPs_CfgInitialize(XAdcPs *InstancePtr,
484 XAdcPs_Config *ConfigPtr,
488 u32 XAdcPs_GetStatus(XAdcPs *InstancePtr);
490 u32 XAdcPs_GetAlarmOutputStatus(XAdcPs *InstancePtr);
492 void XAdcPs_StartAdcConversion(XAdcPs *InstancePtr);
494 void XAdcPs_Reset(XAdcPs *InstancePtr);
496 u16 XAdcPs_GetAdcData(XAdcPs *InstancePtr, u8 Channel);
498 u16 XAdcPs_GetCalibCoefficient(XAdcPs *InstancePtr, u8 CoeffType);
500 u16 XAdcPs_GetMinMaxMeasurement(XAdcPs *InstancePtr, u8 MeasurementType);
502 void XAdcPs_SetAvg(XAdcPs *InstancePtr, u8 Average);
503 u8 XAdcPs_GetAvg(XAdcPs *InstancePtr);
505 int XAdcPs_SetSingleChParams(XAdcPs *InstancePtr,
507 int IncreaseAcqCycles,
509 int IsDifferentialMode);
512 void XAdcPs_SetAlarmEnables(XAdcPs *InstancePtr, u16 AlmEnableMask);
513 u16 XAdcPs_GetAlarmEnables(XAdcPs *InstancePtr);
515 void XAdcPs_SetCalibEnables(XAdcPs *InstancePtr, u16 Calibration);
516 u16 XAdcPs_GetCalibEnables(XAdcPs *InstancePtr);
518 void XAdcPs_SetSequencerMode(XAdcPs *InstancePtr, u8 SequencerMode);
519 u8 XAdcPs_GetSequencerMode(XAdcPs *InstancePtr);
521 void XAdcPs_SetAdcClkDivisor(XAdcPs *InstancePtr, u8 Divisor);
522 u8 XAdcPs_GetAdcClkDivisor(XAdcPs *InstancePtr);
524 int XAdcPs_SetSeqChEnables(XAdcPs *InstancePtr, u32 ChEnableMask);
525 u32 XAdcPs_GetSeqChEnables(XAdcPs *InstancePtr);
527 int XAdcPs_SetSeqAvgEnables(XAdcPs *InstancePtr, u32 AvgEnableChMask);
528 u32 XAdcPs_GetSeqAvgEnables(XAdcPs *InstancePtr);
530 int XAdcPs_SetSeqInputMode(XAdcPs *InstancePtr, u32 InputModeChMask);
531 u32 XAdcPs_GetSeqInputMode(XAdcPs *InstancePtr);
533 int XAdcPs_SetSeqAcqTime(XAdcPs *InstancePtr, u32 AcqCyclesChMask);
534 u32 XAdcPs_GetSeqAcqTime(XAdcPs *InstancePtr);
536 void XAdcPs_SetAlarmThreshold(XAdcPs *InstancePtr, u8 AlarmThrReg, u16 Value);
537 u16 XAdcPs_GetAlarmThreshold(XAdcPs *InstancePtr, u8 AlarmThrReg);
539 void XAdcPs_EnableUserOverTemp(XAdcPs *InstancePtr);
540 void XAdcPs_DisableUserOverTemp(XAdcPs *InstancePtr);
543 * Functions in xadcps_selftest.c
545 int XAdcPs_SelfTest(XAdcPs *InstancePtr);
548 * Functions in xadcps_intr.c
550 void XAdcPs_IntrEnable(XAdcPs *InstancePtr, u32 Mask);
551 void XAdcPs_IntrDisable(XAdcPs *InstancePtr, u32 Mask);
552 u32 XAdcPs_IntrGetEnabled(XAdcPs *InstancePtr);
554 u32 XAdcPs_IntrGetStatus(XAdcPs *InstancePtr);
555 void XAdcPs_IntrClear(XAdcPs *InstancePtr, u32 Mask);
562 #endif /* End of protection macro. */