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31 ******************************************************************************/
32 /*****************************************************************************/
37 * This is the driver for one 16-bit timer counter in the Triple Timer Counter
38 * (TTC) module in the Ps block.
40 * The TTC module provides three independent timer/counter modules that can each
41 * be clocked using either the system clock (pclk) or an externally driven
42 * clock (ext_clk). In addition, each counter can independently prescale its
43 * selected clock input (divided by 2 to 65536). Counters can be set to
44 * decrement or increment.
46 * Each of the counters can be programmed to generate interrupt pulses:
47 * . At a regular, predefined period, that is on a timed interval
48 * . When the counter registers overflow
49 * . When the count matches any one of the three 'match' registers
51 * Therefore, up to six different events can trigger a timer interrupt: three
52 * match interrupts, an overflow interrupt, an interval interrupt and an event
53 * timer interrupt. Note that the overflow interrupt and the interval interrupt
54 * are mutually exclusive.
56 * <b>Initialization & Configuration</b>
58 * An XTtcPs_Config structure is used to configure a driver instance.
59 * Information in the XTtcPs_Config structure is the hardware properties
62 * A driver instance is initialized through
63 * XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr
64 * is a pointer to the XTtcPs_Config structure, it can be looked up statically
65 * through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The
66 * EffectiveAddr can be the static base address of the device or virtual
67 * mapped address if address translation is supported.
71 * Interrupt handler is not provided by the driver, as handling of interrupt
72 * is application specific.
75 * The default setting for a timer/counter is:
77 * - Internal clock (pclk) selected
79 * - All Interrupts disabled
80 * - Output waveforms disabled
83 * MODIFICATION HISTORY:
85 * Ver Who Date Changes
86 * ----- ------ -------- -----------------------------------------------------
87 * 1.00a drg/jz 01/20/10 First release..
88 * 2.0 adk 12/10/13 Updated as per the New Tcl API's
92 ******************************************************************************/
94 #ifndef XTTCPS_H /* prevent circular inclusions */
95 #define XTTCPS_H /* by using protection macros */
101 /***************************** Include Files *********************************/
103 #include "xttcps_hw.h"
106 /************************** Constant Definitions *****************************/
108 /** @name Configuration options
110 * Options for the device. Each of the options is bit field, so more than one
111 * options can be specified.
115 #define XTTCPS_OPTION_EXTERNAL_CLK 0x0001 /**< External clock source */
116 #define XTTCPS_OPTION_CLK_EDGE_NEG 0x0002 /**< Clock on trailing edge for
118 #define XTTCPS_OPTION_INTERVAL_MODE 0x0004 /**< Interval mode */
119 #define XTTCPS_OPTION_DECREMENT 0x0008 /**< Decrement the counter */
120 #define XTTCPS_OPTION_MATCH_MODE 0x0010 /**< Match mode */
121 #define XTTCPS_OPTION_WAVE_DISABLE 0x0020 /**< No waveform output */
122 #define XTTCPS_OPTION_WAVE_POLARITY 0x0040 /**< Waveform polarity */
125 /**************************** Type Definitions *******************************/
128 * This typedef contains configuration information for the device.
131 u16 DeviceId; /**< Unique ID for device */
132 u32 BaseAddress; /**< Base address for device */
133 u32 InputClockHz; /**< Input clock frequency */
137 * The XTtcPs driver instance data. The user is required to allocate a
138 * variable of this type for each PS timer/counter device in the system. A
139 * pointer to a variable of this type is then passed to various driver API
143 XTtcPs_Config Config; /**< Configuration structure */
144 u32 IsReady; /**< Device is initialized and ready */
148 /***************** Macros (Inline Functions) Definitions *********************/
151 * Internal helper macros
153 #define InstReadReg(InstancePtr, RegOffset) \
154 (Xil_In32(((InstancePtr)->Config.BaseAddress) + (RegOffset)))
156 #define InstWriteReg(InstancePtr, RegOffset, Data) \
157 (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (RegOffset), (Data)))
159 /*****************************************************************************/
162 * This function starts the counter/timer without resetting the counter value.
164 * @param InstancePtr is a pointer to the XTtcPs instance.
168 * @note C-style signature:
169 * void XTtcPs_Start(XTtcPs *InstancePtr)
171 ****************************************************************************/
172 #define XTtcPs_Start(InstancePtr) \
173 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
174 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
175 ~XTTCPS_CNT_CNTRL_DIS_MASK))
177 /*****************************************************************************/
180 * This function stops the counter/timer. This macro may be called at any time
181 * to stop the counter. The counter holds the last value until it is reset,
182 * restarted or enabled.
184 * @param InstancePtr is a pointer to the XTtcPs instance.
188 * @note C-style signature:
189 * void XTtcPs_Stop(XTtcPs *InstancePtr)
191 ****************************************************************************/
192 #define XTtcPs_Stop(InstancePtr) \
193 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
194 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
195 XTTCPS_CNT_CNTRL_DIS_MASK))
197 /*****************************************************************************/
200 * This function checks whether the timer counter has already started.
202 * @param InstancePtr is a pointer to the XTtcPs instance
204 * @return Non-zero if the device has started, '0' otherwise.
206 * @note C-style signature:
207 * int XTtcPs_IsStarted(XTtcPs *InstancePtr)
209 ****************************************************************************/
210 #define XTtcPs_IsStarted(InstancePtr) \
211 (int)((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
212 XTTCPS_CNT_CNTRL_DIS_MASK) == 0)
214 /*****************************************************************************/
217 * This function returns the current 16-bit counter value. It may be called at
220 * @param InstancePtr is a pointer to the XTtcPs instance.
222 * @return 16-bit counter value.
224 * @note C-style signature:
225 * u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
227 ****************************************************************************/
228 #define XTtcPs_GetCounterValue(InstancePtr) \
229 (u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
231 /*****************************************************************************/
234 * This function sets the interval value to be used in interval mode.
236 * @param InstancePtr is a pointer to the XTtcPs instance.
237 * @param Value is the 16-bit value to be set in the interval register.
241 * @note C-style signature:
242 * void XTtcPs_SetInterval(XTtcPs *InstancePtr, u16 Value)
244 ****************************************************************************/
245 #define XTtcPs_SetInterval(InstancePtr, Value) \
246 InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
248 /*****************************************************************************/
251 * This function gets the interval value from the interval register.
253 * @param InstancePtr is a pointer to the XTtcPs instance.
255 * @return 16-bit interval value
257 * @note C-style signature:
258 * u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
260 ****************************************************************************/
261 #define XTtcPs_GetInterval(InstancePtr) \
262 (u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
264 /*****************************************************************************/
267 * This macro resets the count register. It may be called at any time. The
268 * counter is reset to either 0 or 0xFFFF, or the interval value, depending on
269 * the increment/decrement mode. The state of the counter, as started or
270 * stopped, is not affected by calling reset.
272 * @param InstancePtr is a pointer to the XTtcPs instance.
276 * @note C-style signature:
277 * void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
279 ****************************************************************************/
280 #define XTtcPs_ResetCounterValue(InstancePtr) \
281 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
282 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
283 XTTCPS_CNT_CNTRL_RST_MASK))
285 /*****************************************************************************/
288 * This function enables the interrupts.
290 * @param InstancePtr is a pointer to the XTtcPs instance.
291 * @param InterruptMask defines which interrupt should be enabled.
292 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
293 * This is a bit mask, all set bits will be enabled, cleared bits
294 * will not be disabled.
300 * void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
302 ******************************************************************************/
303 #define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask) \
304 InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
305 (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) | \
308 /*****************************************************************************/
311 * This function disables the interrupts.
313 * @param InstancePtr is a pointer to the XTtcPs instance.
314 * @param InterruptMask defines which interrupt should be disabled.
315 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
316 * This is a bit mask, all set bits will be disabled, cleared bits
317 * will not be disabled.
323 * void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
325 ******************************************************************************/
326 #define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask) \
327 InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
328 (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) & \
331 /*****************************************************************************/
334 * This function reads the interrupt status.
336 * @param InstancePtr is a pointer to the XTtcPs instance.
340 * @note C-style signature:
341 * u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
343 ******************************************************************************/
344 #define XTtcPs_GetInterruptStatus(InstancePtr) \
345 InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
347 /*****************************************************************************/
350 * This function clears the interrupt status.
352 * @param InstancePtr is a pointer to the XTtcPs instance.
353 * @param InterruptMask defines which interrupt should be cleared.
354 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
355 * This is a bit mask, all set bits will be cleared, cleared bits
356 * will not be cleared.
362 * void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
364 ******************************************************************************/
365 #define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask) \
366 InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
370 /************************** Function Prototypes ******************************/
373 * Initialization functions in xttcps_sinit.c
375 XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId);
378 * Required functions, in xttcps.c
380 int XTtcPs_CfgInitialize(XTtcPs *InstancePtr,
381 XTtcPs_Config * ConfigPtr, u32 EffectiveAddr);
383 void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, u16 Value);
384 u16 XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex);
386 void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue);
387 u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr);
389 void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
390 u16 *Interval, u8 *Prescaler);
393 * Functions for options, in file xttcps_options.c
395 int XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options);
396 u32 XTtcPs_GetOptions(XTtcPs *InstancePtr);
399 * Function for self-test, in file xttcps_selftest.c
401 int XTtcPs_SelfTest(XTtcPs *InstancePtr);
407 #endif /* end of protection macro */