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31 ******************************************************************************/
32 /****************************************************************************/
36 * @addtogroup dmaps_v2_0
39 * This file contains the implementation of the interface reset functionality
43 * MODIFICATION HISTORY:
45 * Ver Who Date Changes
46 * ----- ------ -------- ----------------------------------------------
47 * 1.06a kpc 10/07/13 First release
50 *****************************************************************************/
52 /***************************** Include Files ********************************/
53 #include "xdmaps_hw.h"
55 /************************** Constant Definitions ****************************/
57 /**************************** Type Definitions ******************************/
59 /***************** Macros (Inline Functions) Definitions ********************/
60 #ifndef XDMAPS_MAX_WAIT
61 #define XDMAPS_MAX_WAIT 4000
63 /************************** Function Prototypes *****************************/
65 /************************** Variable Definitions ****************************/
67 /*****************************************************************************/
69 * This function perform the reset sequence to the given dmaps interface by
70 * configuring the appropriate control bits in the dmaps specifc registers
71 * the dmaps reset squence involves the following steps
72 * Disable all the interuupts
73 * Clear the pending interrupts
74 * Kill all the active channel threads
75 * Kill the manager thread
77 * @param BaseAddress of the interface
82 * This function will not modify the slcr registers that are relavant for
84 ******************************************************************************/
85 void XDmaPs_ResetHw(u32 BaseAddress)
91 /* Disable all the interrupts */
92 XDmaPs_WriteReg(BaseAddress, XDMAPS_INTEN_OFFSET, 0x00);
93 /* Clear the interrupts */
94 XDmaPs_WriteReg(BaseAddress, XDMAPS_INTCLR_OFFSET, XDMAPS_INTCLR_ALL_MASK);
95 /* Kill the dma channel threads */
96 for (ChanIndex=0; ChanIndex < XDMAPS_CHANNELS_PER_DEV; ChanIndex++) {
97 while ((XDmaPs_ReadReg(BaseAddress, XDMAPS_DBGSTATUS_OFFSET)
98 & XDMAPS_DBGSTATUS_BUSY)
99 && (WaitCount < XDMAPS_MAX_WAIT))
102 DbgInst = XDmaPs_DBGINST0(0, 0x01, ChanIndex, 1);
103 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST0_OFFSET, DbgInst);
104 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST1_OFFSET, 0x0);
105 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGCMD_OFFSET, 0x0);
107 /* Kill the manager thread */
108 DbgInst = XDmaPs_DBGINST0(0, 0x01, 0, 0);
109 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST0_OFFSET, DbgInst);
110 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST1_OFFSET, 0x0);
111 XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGCMD_OFFSET, 0x0);