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   1 /******************************************************************************
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  41 /*****************************************************************************/
  42 /**
  43 *
  44 * @file xpm_counter.c
  45 *
  46 * This file contains APIs for configuring and controlling the Cortex-A9
  47 * Performance Monitor Events. For more information about the event counters,
  48 * see xpm_counter.h.
  49 *
  50 * <pre>
  51 * MODIFICATION HISTORY:
  52 *
  53 * Ver   Who  Date     Changes
  54 * ----- ---- -------- -----------------------------------------------
  55 * 1.00a sdm  07/11/11 First release
  56 * </pre>
  57 *
  58 ******************************************************************************/
  59
  60 /***************************** Include Files *********************************/
  61
  62 #include "xpm_counter.h"
  63
  64 /************************** Constant Definitions ****************************/
  65
  66 /**************************** Type Definitions ******************************/
  67
  68 typedef const u32 PmcrEventCfg[XPM_CTRCOUNT];
  69
  70 /***************** Macros (Inline Functions) Definitions ********************/
  71
  72 /************************** Variable Definitions *****************************/
  73
  74 static PmcrEventCfg PmcrEvents[] = {
  75         {
  76                 XPM_EVENT_SOFTINCR,
  77                 XPM_EVENT_INSRFETCH_CACHEREFILL,
  78                 XPM_EVENT_INSTRFECT_TLBREFILL,
  79                 XPM_EVENT_DATA_CACHEREFILL,
  80                 XPM_EVENT_DATA_CACHEACCESS,
  81                 XPM_EVENT_DATA_TLBREFILL
  82         },
  83         {
  84                 XPM_EVENT_DATA_READS,
  85                 XPM_EVENT_DATA_WRITE,
  86                 XPM_EVENT_EXCEPTION,
  87                 XPM_EVENT_EXCEPRETURN,
  88                 XPM_EVENT_CHANGECONTEXT,
  89                 XPM_EVENT_SW_CHANGEPC
  90         },
  91         {
  92                 XPM_EVENT_IMMEDBRANCH,
  93                 XPM_EVENT_UNALIGNEDACCESS,
  94                 XPM_EVENT_BRANCHMISS,
  95                 XPM_EVENT_CLOCKCYCLES,
  96                 XPM_EVENT_BRANCHPREDICT,
  97                 XPM_EVENT_JAVABYTECODE
  98         },
  99         {
 100                 XPM_EVENT_SWJAVABYTECODE,
 101                 XPM_EVENT_JAVABACKBRANCH,
 102                 XPM_EVENT_COHERLINEMISS,
 103                 XPM_EVENT_COHERLINEHIT,
 104                 XPM_EVENT_INSTRSTALL,
 105                 XPM_EVENT_DATASTALL
 106         },
 107         {
 108                 XPM_EVENT_MAINTLBSTALL,
 109                 XPM_EVENT_STREXPASS,
 110                 XPM_EVENT_STREXFAIL,
 111                 XPM_EVENT_DATAEVICT,
 112                 XPM_EVENT_NODISPATCH,
 113                 XPM_EVENT_ISSUEEMPTY
 114         },
 115         {
 116                 XPM_EVENT_INSTRRENAME,
 117                 XPM_EVENT_PREDICTFUNCRET,
 118                 XPM_EVENT_MAINEXEC,
 119                 XPM_EVENT_SECEXEC,
 120                 XPM_EVENT_LDRSTR,
 121                 XPM_EVENT_FLOATRENAME
 122         },
 123         {
 124                 XPM_EVENT_NEONRENAME,
 125                 XPM_EVENT_PLDSTALL,
 126                 XPM_EVENT_WRITESTALL,
 127                 XPM_EVENT_INSTRTLBSTALL,
 128                 XPM_EVENT_DATATLBSTALL,
 129                 XPM_EVENT_INSTR_uTLBSTALL
 130         },
 131         {
 132                 XPM_EVENT_DATA_uTLBSTALL,
 133                 XPM_EVENT_DMB_STALL,
 134                 XPM_EVENT_INT_CLKEN,
 135                 XPM_EVENT_DE_CLKEN,
 136                 XPM_EVENT_INSTRISB,
 137                 XPM_EVENT_INSTRDSB
 138         },
 139         {
 140                 XPM_EVENT_INSTRDMB,
 141                 XPM_EVENT_EXTINT,
 142                 XPM_EVENT_PLE_LRC,
 143                 XPM_EVENT_PLE_LRS,
 144                 XPM_EVENT_PLE_FLUSH,
 145                 XPM_EVENT_PLE_CMPL
 146         },
 147         {
 148                 XPM_EVENT_PLE_OVFL,
 149                 XPM_EVENT_PLE_PROG,
 150                 XPM_EVENT_PLE_LRC,
 151                 XPM_EVENT_PLE_LRS,
 152                 XPM_EVENT_PLE_FLUSH,
 153                 XPM_EVENT_PLE_CMPL
 154         },
 155         {
 156                 XPM_EVENT_DATASTALL,
 157                 XPM_EVENT_INSRFETCH_CACHEREFILL,
 158                 XPM_EVENT_INSTRFECT_TLBREFILL,
 159                 XPM_EVENT_DATA_CACHEREFILL,
 160                 XPM_EVENT_DATA_CACHEACCESS,
 161                 XPM_EVENT_DATA_TLBREFILL
 162         },
 163 };
 164
 165 /************************** Function Prototypes ******************************/
 166
 167 void Xpm_DisableEventCounters(void);
 168 void Xpm_EnableEventCounters (void);
 169 void Xpm_ResetEventCounters (void);
 170
 171 /******************************************************************************/
 172
 173 /****************************************************************************/
 174 /**
 175 *
 176 * This function disables the Cortex A9 event counters.
 177 *
 178 * @param        None.
 179 *
 180 * @return       None.
 181 *
 182 * @note         None.
 183 *
 184 *****************************************************************************/
 185 void Xpm_DisableEventCounters(void)
 186 {
 187         /* Disable the event counters */
 188         mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
 189 }
 190
 191 /****************************************************************************/
 192 /**
 193 *
 194 * This function enables the Cortex A9 event counters.
 195 *
 196 * @param        None.
 197 *
 198 * @return       None.
 199 *
 200 * @note         None.
 201 *
 202 *****************************************************************************/
 203 void Xpm_EnableEventCounters(void)
 204 {
 205         /* Enable the event counters */
 206         mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
 207 }
 208
 209 /****************************************************************************/
 210 /**
 211 *
 212 * This function resets the Cortex A9 event counters.
 213 *
 214 * @param        None.
 215 *
 216 * @return       None.
 217 *
 218 * @note         None.
 219 *
 220 *****************************************************************************/
 221 void Xpm_ResetEventCounters(void)
 222 {
 223         u32 Reg;
 224
 225 #ifdef __GNUC__
 226         Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
 227 #else
 228         { register unsigned int C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
 229           Reg = C15Reg; }
 230 #endif
 231         Reg |= (1 << 2); /* reset event counters */
 232         mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
 233 }
 234
 235 /****************************************************************************/
 236 /**
 237 *
 238 * This function configures the Cortex A9 event counters controller, with the
 239 * event codes, in a configuration selected by the user and enables the counters.
 240 *
 241 * @param        PmcrCfg is configuration value based on which the event counters
 242 *               are configured.
 243 *               Use XPM_CNTRCFG* values defined in xpm_counter.h.
 244 *
 245 * @return       None.
 246 *
 247 * @note         None.
 248 *
 249 *****************************************************************************/
 250 void Xpm_SetEvents(int PmcrCfg)
 251 {
 252         u32 Counter;
 253         const u32 *Ptr = PmcrEvents[PmcrCfg];
 254
 255         Xpm_DisableEventCounters();
 256
 257         for(Counter = 0; Counter < XPM_CTRCOUNT; Counter++) {
 258
 259                 /* Selecet event counter */
 260                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
 261
 262                 /* Set the event */
 263                 mtcp(XREG_CP15_EVENT_TYPE_SEL, Ptr[Counter]);
 264         }
 265
 266         Xpm_ResetEventCounters();
 267         Xpm_EnableEventCounters();
 268 }
 269
 270 /****************************************************************************/
 271 /**
 272 *
 273 * This function disables the event counters and returns the counter values.
 274 *
 275 * @param        PmCtrValue is a pointer to an array of type u32 PmCtrValue[6].
 276 *               It is an output parameter which is used to return the PM
 277 *               counter values.
 278 *
 279 * @return       None.
 280 *
 281 * @note         None.
 282 *
 283 *****************************************************************************/
 284 void Xpm_GetEventCounters(u32 *PmCtrValue)
 285 {
 286         u32 Counter;
 287
 288         Xpm_DisableEventCounters();
 289
 290         for(Counter = 0; Counter < XPM_CTRCOUNT; Counter++) {
 291
 292                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
 293 #ifdef __GNUC__
 294                 PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
 295 #else
 296                 { register unsigned int Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
 297                   PmCtrValue[Counter] = Cp15Reg; }
 298 #endif
 299         }
 300 }