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32 /*****************************************************************************/
36 * @addtogroup a9_mmu_apis Cortex A9 Processor MMU Functions
38 * MMU functions equip users to enable MMU, disable MMU and modify default
39 * memory attributes of MMU table as per the need.
44 * MODIFICATION HISTORY:
46 * Ver Who Date Changes
47 * ----- ---- -------- ---------------------------------------------------
48 * 1.00a sdm 01/12/12 Initial version
49 * 4.2 pkp 07/21/14 Included xil_types.h file which contains definition for
50 * u32 which resolves issue of CR#805869
51 * 5.4 pkp 23/11/15 Added attribute definitions for Xil_SetTlbAttributes API
55 ******************************************************************************/
62 #endif /* __cplusplus */
64 /***************************** Include Files *********************************/
66 #include "xil_types.h"
68 /***************** Macros (Inline Functions) Definitions *********************/
70 /**************************** Type Definitions *******************************/
72 /************************** Constant Definitions *****************************/
75 #define NORM_NONCACHE 0x11DE2 /* Normal Non-cacheable */
76 #define STRONG_ORDERED 0xC02 /* Strongly ordered */
77 #define DEVICE_MEMORY 0xC06 /* Device memory */
78 #define RESERVED 0x0 /* reserved memory */
80 /* Normal write-through cacheable shareable */
81 #define NORM_WT_CACHE 0x16DEA
83 /* Normal write back cacheable shareable */
84 #define NORM_WB_CACHE 0x15DE6
86 /* shareability attribute */
87 #define SHAREABLE (0x1 << 16)
88 #define NON_SHAREABLE (~(0x1 << 16))
91 #define EXECUTE_NEVER ((0x1 << 4) | (0x1 << 0))
93 /************************** Variable Definitions *****************************/
95 /************************** Function Prototypes ******************************/
97 void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
98 void Xil_EnableMMU(void);
99 void Xil_DisableMMU(void);
103 #endif /* __cplusplus */
105 #endif /* XIL_MMU_H */
107 * @} End of "addtogroup a9_mmu_apis".